diff options
| author | hathach <[email protected]> | 2024-01-15 16:17:42 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2024-01-15 16:17:42 +0700 |
| commit | a67ee4f01bcccf0943761708c029db085347ac63 (patch) | |
| tree | efbfaa06348225a228d977935a8eeecccc7756fc /src/common | |
| parent | c2bbcc9f60a2b7293fad4e24468d3f045fde28ee (diff) | |
| parent | 4b3b401ce37e12eaf4c85a5184d94327c28c70a5 (diff) | |
Merge branch 'master' into cdc_ch34x_support
Diffstat (limited to 'src/common')
| -rw-r--r-- | src/common/tusb_verify.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index 1b5f53dfc..8aa66b4df 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -75,8 +75,8 @@ #define _MESS_FAILED() do {} while (0) #endif -// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33 -#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) +// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33. M55 +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) #define TU_BREAKPOINT() do \ { \ volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ |