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| author | HiFiPhile <[email protected]> | 2024-05-13 22:51:25 +0200 |
|---|---|---|
| committer | GitHub <[email protected]> | 2024-05-13 22:51:25 +0200 |
| commit | ae01de246421df8638f05cab7b1c6e15e0184952 (patch) | |
| tree | c9e03cee143f75fcfd6a43ed3648f6ce7b7bf55c /src/common | |
| parent | 7cf1bdd2848d6c36e9659acaf77c83a1fa99d04f (diff) | |
| parent | ad734e658cc9e39021a93fc21e077f1b1709c0ff (diff) | |
Merge pull request #2416 from Rocky04/test-mode-support
Add DWC2 Test Mode Support
Diffstat (limited to 'src/common')
| -rw-r--r-- | src/common/tusb_mcu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 4e3b89262..3a7d6ad33 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -195,6 +195,7 @@ #elif TU_CHECK_MCU(OPT_MCU_STM32F4) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 + #define TUP_USBIP_DWC2_TEST_MODE // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9 #define TUP_DCD_ENDPOINT_MAX 6 @@ -209,6 +210,7 @@ // MCU with on-chip HS Phy #if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx) #define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS + #define TUP_USBIP_DWC2_TEST_MODE #endif #elif TU_CHECK_MCU(OPT_MCU_STM32H7) @@ -277,6 +279,7 @@ defined(STM32U5F7xx) || defined(STM32U5F9xx) || defined(STM32U5G7xx) || defined(STM32U5G9xx) #define TUP_DCD_ENDPOINT_MAX 9 #define TUP_RHPORT_HIGHSPEED 1 + #define TUP_USBIP_DWC2_TEST_MODE #else #define TUP_DCD_ENDPOINT_MAX 6 #endif |