Merge branch 'master' into zlp-hs-on-fs

6 files changed, 62 insertions, 33 deletions

diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index 9f188f296..06d25d131 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -30,11 +30,6 @@
 
 #define TU_FIFO_DBG 0
 
-// Suppress IAR warning
-// Warning[Pa082]: undefined behavior: the order of volatile accesses is undefined in this statement
-#if defined(__ICCARM__)
-  #pragma diag_suppress = Pa082
-#endif
 
 #if OSAL_MUTEX_REQUIRED
 
@@ -115,7 +110,7 @@ void tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) {
 // Can support multiple i.e both 16 and 32-bit data access if needed
 //--------------------------------------------------------------------+
 #if CFG_TUSB_FIFO_HWFIFO_API
-  #if CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE
+  #if CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE > 0
     #define HWFIFO_ADDR_NEXT_N(_hwfifo, _const, _n) _hwfifo = (_const volatile void *)((uintptr_t)(_hwfifo) + _n)
   #else
     #define HWFIFO_ADDR_NEXT_N(_hwfifo, _const, _n)
@@ -123,6 +118,9 @@ void tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) {
 
   #define HWFIFO_ADDR_NEXT(_hwfifo, _const) HWFIFO_ADDR_NEXT_N(_hwfifo, _const, CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE)
 
+  // the fixed ratio works since in the only case of dynamic/multiple data_stride (rusb2): addr_stride is 0
+  #define HWFIFO_ADDR_DATA_RATIO (CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE / CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE)
+
 //------------- Write -------------//
   #ifndef CFG_TUSB_FIFO_HWFIFO_CUSTOM_WRITE
 TU_ATTR_ALWAYS_INLINE static inline void stride_write(volatile void *hwfifo, const void *src, uint8_t data_stride) {
@@ -240,16 +238,16 @@ void tu_hwfifo_read(const volatile void *hwfifo, uint8_t *dest, uint16_t len, co
     len -= 2;
     HWFIFO_ADDR_NEXT_N(hwfifo, const, 2);
   }
-    #endif
+      #endif
 
-    #ifdef CFG_TUSB_FIFO_HWFIFO_DATA_ODD_8BIT_ACCESS
+      #ifdef CFG_TUSB_FIFO_HWFIFO_DATA_ODD_8BIT_ACCESS
   // 8-bit access is allowed for odd bytes
   while (len > 0) {
     *dest++ = *((const volatile uint8_t *)hwfifo);
     len--;
     HWFIFO_ADDR_NEXT_N(hwfifo, const, 1);
   }
-    #else
+      #else
   // Read odd bytes i.e 1 byte for 16 bit or 1-3 bytes for 32 bit
   if (len > 0) {
     uint32_t tmp;
@@ -257,7 +255,7 @@ void tu_hwfifo_read(const volatile void *hwfifo, uint8_t *dest, uint16_t len, co
     memcpy(dest, &tmp, len);
     HWFIFO_ADDR_NEXT(hwfifo, const);
   }
-    #endif
+      #endif
     #endif
 }
   #endif
@@ -280,15 +278,15 @@ static void hwff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uin
     HWFIFO_ADDR_NEXT_N(hwfifo, const, lin_bytes);
     tu_hwfifo_read(hwfifo, f->buffer, wrap_bytes, access_mode); // wrapped part
   #else
-    // Write full words to linear part of buffer
+    // Write full words to the linear part of the buffer
     const uint8_t  data_stride = access_mode->data_stride;
     const uint32_t odd_mask    = data_stride - 1;
     uint16_t       lin_even    = lin_bytes & ~odd_mask;
     tu_hwfifo_read(hwfifo, ff_buf, lin_even, access_mode);
-    HWFIFO_ADDR_NEXT_N(hwfifo, const, lin_even);
+    HWFIFO_ADDR_NEXT_N(hwfifo, const, lin_even * HWFIFO_ADDR_DATA_RATIO);
     ff_buf += lin_even;
 
-    // There could be odd 1 byte (16bit) or 1-3 bytes (32bit) before the wrap-around boundary
+    // There could be an odd 1 byte (16bit) or 1-3 bytes (32bit) before the wrap-around boundary
     // combine it with the wrapped part to form a full word for data stride
     const uint8_t lin_odd = lin_bytes & odd_mask;
     if (lin_odd > 0) {
@@ -342,7 +340,7 @@ static void hwff_pull_n(const tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t
     const uint32_t odd_mask    = data_stride - 1;
     uint16_t       lin_even    = lin_bytes & ~odd_mask;
     tu_hwfifo_write(hwfifo, ff_buf, lin_even, access_mode);
-    HWFIFO_ADDR_NEXT_N(hwfifo, , lin_even);
+    HWFIFO_ADDR_NEXT_N(hwfifo, , lin_even * HWFIFO_ADDR_DATA_RATIO);
     ff_buf += lin_even;
 
     // There could be odd 1 byte (16bit) or 1-3 bytes (32bit) before the wrap-around boundary
@@ -496,7 +494,9 @@ uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, ui
 // Read n items without removing it from the FIFO, correct read pointer if overflowed
 uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n) {
   ff_lock(f->mutex_rd);
-  const uint16_t ret = tu_fifo_peek_n_access_mode(f, p_buffer, n, f->wr_idx, f->rd_idx, NULL);
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  const uint16_t ret = tu_fifo_peek_n_access_mode(f, p_buffer, n, wr_idx, rd_idx, NULL);
   ff_unlock(f->mutex_rd);
   return ret;
 }
@@ -506,7 +506,8 @@ uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, cons
   ff_lock(f->mutex_rd);
 
   // Peek the data: f->rd_idx might get modified in case of an overflow so we can not use a local variable
-  n         = tu_fifo_peek_n_access_mode(f, buffer, n, f->wr_idx, f->rd_idx, access_mode);
+  const uint16_t wr_idx = f->wr_idx;
+  n         = tu_fifo_peek_n_access_mode(f, buffer, n, wr_idx, f->rd_idx, access_mode);
   f->rd_idx = advance_index(f->depth, f->rd_idx, n);
 
   ff_unlock(f->mutex_rd);
@@ -633,7 +634,8 @@ static bool ff_peek_local(tu_fifo_t *f, void *buf, uint16_t wr_idx, uint16_t rd_
 bool tu_fifo_read(tu_fifo_t *f, void *buffer) {
   // Peek the data
   // f->rd_idx might get modified in case of an overflow so we can not use a local variable
-  const bool ret = ff_peek_local(f, buffer, f->wr_idx, f->rd_idx);
+  const uint16_t wr_idx = f->wr_idx;
+  const bool ret = ff_peek_local(f, buffer, wr_idx, f->rd_idx);
   if (ret) {
     ff_lock(f->mutex_rd);
     f->rd_idx = advance_index(f->depth, f->rd_idx, 1);
@@ -645,7 +647,9 @@ bool tu_fifo_read(tu_fifo_t *f, void *buffer) {
 
 // Read one item without removing it from the FIFO, correct read index if overflowed
 bool tu_fifo_peek(tu_fifo_t *f, void *p_buffer) {
-  return ff_peek_local(f, p_buffer, f->wr_idx, f->rd_idx);
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return ff_peek_local(f, p_buffer, wr_idx, rd_idx);
 }
 
 // Write one element into the buffer
diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h
index 86ba59059..b31a0802e 100644
--- a/src/common/tusb_fifo.h
+++ b/src/common/tusb_fifo.h
@@ -120,9 +120,9 @@ typedef struct {
   uint8_t *buffer;              // buffer pointer
   uint16_t depth;               // max items
   bool     overwritable;        // overwritable when full
-  // 1 byte padding  here
+  // 1 byte padding here
 
-  volatile uint16_t wr_idx;     // write index TODO maybe can drop volatile
+  volatile uint16_t wr_idx;     // write index
   volatile uint16_t rd_idx;     // read index
 
 #if OSAL_MUTEX_REQUIRED
@@ -291,16 +291,22 @@ TU_ATTR_ALWAYS_INLINE static inline bool tu_fifo_empty(const tu_fifo_t *f) {
 
 // return number of items in fifo, capped to fifo's depth
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_count(const tu_fifo_t *f) {
-  return tu_min16(tu_ff_overflow_count(f->depth, f->wr_idx, f->rd_idx), f->depth);
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return tu_min16(tu_ff_overflow_count(f->depth, wr_idx, rd_idx), f->depth);
 }
 
 // check if fifo is full
 TU_ATTR_ALWAYS_INLINE static inline bool tu_fifo_full(const tu_fifo_t *f) {
-  return tu_ff_overflow_count(f->depth, f->wr_idx, f->rd_idx) >= f->depth;
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return tu_ff_overflow_count(f->depth, wr_idx, rd_idx) >= f->depth;
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_remaining(const tu_fifo_t *f) {
-  return tu_ff_remaining_local(f->depth, f->wr_idx, f->rd_idx);
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return tu_ff_remaining_local(f->depth, wr_idx, rd_idx);
 }
 
 #ifdef __cplusplus
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 5b9497b9a..edc7ecc3e 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -71,13 +71,24 @@
   #define TUP_DCD_ENDPOINT_MAX 5
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC54)
+  #include "fsl_device_registers.h"
+
   // TODO USB0 has 5, USB1 has 6
   #define TUP_USBIP_IP3511
+
+  #if !defined(LPC54114_cm4_SERIES) && !defined(LPC54114_cm0plus_SERIES)
+    #define TUP_USBIP_IP3516
+    #define TUP_USBIP_OHCI
+    #define TUP_USBIP_OHCI_NXP
+    #define TUP_OHCI_RHPORTS     1 // 1 downstream port
+  #endif
+
   #define TUP_DCD_ENDPOINT_MAX 6
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC55)
   // TODO USB0 has 5, USB1 has 6
   #define TUP_USBIP_IP3511
+  #define TUP_USBIP_IP3516
   #define TUP_USBIP_OHCI
   #define TUP_USBIP_OHCI_NXP
   #define TUP_OHCI_RHPORTS     1 // 1 downstream port
@@ -172,6 +183,10 @@
   #define TUP_RHPORT_HIGHSPEED 1
   #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
+  // Enable dcache if DMA is enabled
+  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_SAMX7X_DMA_ENABLE
+  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
+
 #elif TU_CHECK_MCU(OPT_MCU_PIC32MZ)
   #define TUP_DCD_ENDPOINT_MAX 8
   #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h
index 7795d7122..543921553 100644
--- a/src/common/tusb_private.h
+++ b/src/common/tusb_private.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef TUSB_PRIVATE_H_
-#define TUSB_PRIVATE_H_
+#ifndef TUSB_PRIVATE_H
+#define TUSB_PRIVATE_H
 
 // Internal Helper used by Host and Device Stack
 
@@ -33,9 +33,11 @@
  extern "C" {
 #endif
 
-//--------------------------------------------------------------------+
-// Configuration
-//--------------------------------------------------------------------+
+typedef void (*tusb_defer_func_t)(uintptr_t param);
+
+ //--------------------------------------------------------------------+
+ // Configuration
+ //--------------------------------------------------------------------+
 
 #define TUP_USBIP_CONTROLLER_NUM 2
 extern tusb_role_t _tusb_rhport_role[TUP_USBIP_CONTROLLER_NUM];
@@ -79,9 +81,8 @@ typedef struct {
 bool tu_edpt_validate(const tusb_desc_endpoint_t *desc_ep, tusb_speed_t speed);
 #else
 TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_validate(const tusb_desc_endpoint_t *desc_ep, tusb_speed_t speed) {
-  (void)desc_ep;
   (void)speed;
-  return true;
+  return tu_edpt_packet_size(desc_ep) > 0;
 }
 #endif
 
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 7d26ac74e..8a48a0f04 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -341,12 +341,10 @@ typedef struct TU_ATTR_PACKED {
   uint8_t  bLength            ; ///< Size of this descriptor in bytes.
   uint8_t  bDescriptorType    ; ///< DEVICE Descriptor Type.
   uint16_t bcdUSB             ; ///< BUSB Specification Release Number in Binary-Coded Decimal (i.e., 2.10 is 210H).
-
   uint8_t  bDeviceClass       ; ///< Class code (assigned by the USB-IF).
   uint8_t  bDeviceSubClass    ; ///< Subclass code (assigned by the USB-IF).
   uint8_t  bDeviceProtocol    ; ///< Protocol code (assigned by the USB-IF).
   uint8_t  bMaxPacketSize0    ; ///< Maximum packet size for endpoint zero (only 8, 16, 32, or 64 are valid). For HS devices is fixed to 64.
-
   uint16_t idVendor           ; ///< Vendor ID (assigned by the USB-IF).
   uint16_t idProduct          ; ///< Product ID (assigned by the manufacturer).
   uint16_t bcdDevice          ; ///< Device release number in binary-coded decimal.
diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h
index c9e06361c..bd00b9d11 100644
--- a/src/common/tusb_verify.h
+++ b/src/common/tusb_verify.h
@@ -73,8 +73,13 @@
   #define TU_MESS_FAILED() do {} while (0)
 #endif
 
+// Custom defined application function
+#ifdef CFG_TUSB_DEBUG_BREAKPOINT
+  extern void CFG_TUSB_DEBUG_BREAKPOINT(void);
+  #define TU_BREAKPOINT() CFG_TUSB_DEBUG_BREAKPOINT()
+
 // Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33. M55
-#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \
+#elif defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \
     defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
   #define TU_BREAKPOINT() do {                                                                              \
     volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \