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authorhathach <[email protected]>2025-07-10 17:18:17 +0700
committerhathach <[email protected]>2025-07-10 17:18:17 +0700
commit77be5f96e48cd6810538173f2311a51592ecd17a (patch)
tree49283b92773740657b03f640f72ce5be8cb92d52 /src/osal/osal_rtthread.h
parentdee6b369235e3440f9237ae0e74f81edca95f6b7 (diff)
parent546e8413b5ed05a8c35b8dbe7792516a3cd631fa (diff)
Merge branch 'master' into fork/roma-jam/feature/add_tusb_teardown
Diffstat (limited to 'src/osal/osal_rtthread.h')
-rw-r--r--src/osal/osal_rtthread.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/src/osal/osal_rtthread.h b/src/osal/osal_rtthread.h
index c27814835..a778f5425 100644
--- a/src/osal/osal_rtthread.h
+++ b/src/osal/osal_rtthread.h
@@ -43,6 +43,32 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
}
//--------------------------------------------------------------------+
+// Spinlock API
+//--------------------------------------------------------------------+
+typedef struct rt_spinlock osal_spinlock_t;
+
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+ osal_spinlock_t _name
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+ rt_spin_lock_init(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
+ rt_spin_lock(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
+ rt_spin_unlock(ctx);
+}
+
+//--------------------------------------------------------------------+
// Semaphore API
//--------------------------------------------------------------------+
typedef struct rt_semaphore osal_semaphore_def_t;