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authorBastien Nocera <[email protected]>2022-12-04 13:58:47 +0700
committerhathach <[email protected]>2022-12-04 19:43:23 +0700
commit6a2cf6728906aa61b44ecfe43b4ceef287b29bf8 (patch)
tree51b6d5483c8e7d0f605411c574fc5f8bc9035e05 /src/portable/bridgetek
parentf24f47d03849874b8c3ad442aa14f6565e205c47 (diff)
Fix typos
Diffstat (limited to 'src/portable/bridgetek')
-rw-r--r--src/portable/bridgetek/ft9xx/dcd_ft9xx.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
index 2445593fe..261a3c9c2 100644
--- a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
+++ b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
@@ -587,7 +587,7 @@ void dcd_remote_wakeup(uint8_t rhport)
SYS->MSC0CFG = SYS->MSC0CFG | MASK_SYS_MSC0CFG_DEV_RMWAKEUP;
- // Atleast 2 ms of delay needed for RESUME Data K state.
+ // At least 2 ms of delay needed for RESUME Data K state.
delayms(2);
SYS->MSC0CFG &= ~MASK_SYS_MSC0CFG_DEV_RMWAKEUP;
@@ -720,7 +720,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc)
else
total_ram = USBD_RAMTOTAL_OUT;
// Work out how much has been allocated to existing endpoints.
- // The total RAM allocated shoudl alsyes be a positive number as this
+ // The total RAM allocated should always be a positive number as this
// algorithm should not let it go below zero.
for (int i = 1; i < USBD_MAX_ENDPOINT_COUNT; i++)
{
@@ -976,7 +976,7 @@ void dcd_int_handler(uint8_t rhport)
USBD_EP_SR_REG(USBD_EP_0) = MASK_USBD_EP0SR_STALL;
}
- // Host has sent a SETUP packet. Recieve this into the setup packet store.
+ // Host has sent a SETUP packet. Receive this into the setup packet store.
_ft90x_dusb_out(USBD_EP_0, (uint8_t *)_ft90x_setup_packet, sizeof(USB_device_request));
// Send the packet to tinyusb.