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authorhathach <[email protected]>2024-10-14 19:42:22 +0700
committerhathach <[email protected]>2024-10-14 19:42:22 +0700
commite83e08343afca86b2bacf26822ef9032571e6f56 (patch)
treef7c11374731a6aa9352464f065169d30d28d16c2 /src/portable/chipidea/ci_hs
parent1f18be93db39dbc57bbf34f982dbe07e209a2ae3 (diff)
change dcd_init() return from void to bool
Diffstat (limited to 'src/portable/chipidea/ci_hs')
-rw-r--r--src/portable/chipidea/ci_hs/dcd_ci_hs.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index 5204dee66..430a0aad1 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -234,13 +234,13 @@ static void bus_reset(uint8_t rhport)
dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t));
}
-void dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
+bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
(void) rh_init;
tu_memclr(&_dcd_data, sizeof(dcd_data_t));
ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport);
- TU_ASSERT(ci_ep_count(dcd_reg) <= TUP_DCD_ENDPOINT_MAX, );
+ TU_ASSERT(ci_ep_count(dcd_reg) <= TUP_DCD_ENDPOINT_MAX);
// Reset controller
dcd_reg->USBCMD |= USBCMD_RESET;
@@ -268,6 +268,8 @@ void dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
usbcmd |= USBCMD_RUN_STOP; // run
dcd_reg->USBCMD = usbcmd;
+
+ return true;
}
void dcd_int_enable(uint8_t rhport)