diff options
| author | hathach <[email protected]> | 2021-10-24 13:11:21 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2021-10-24 13:11:21 +0700 |
| commit | 5af989384bd95dbf16f824bcc48e56f3ea283080 (patch) | |
| tree | 6bf7c17387612edfb8ea1bd010472db291addc32 /src/portable/microchip | |
| parent | 6f5b197a98545c70efeeb4adcad0d41a3d30a57c (diff) | |
remove ep descriptor wMaxPacketSize bitfield due to endian issue
Diffstat (limited to 'src/portable/microchip')
| -rw-r--r-- | src/portable/microchip/samd/dcd_samd.c | 4 | ||||
| -rw-r--r-- | src/portable/microchip/samg/dcd_samg.c | 2 | ||||
| -rw-r--r-- | src/portable/microchip/samx7x/dcd_samx7x.c | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c index 526a6fb63..46aabc5aa 100644 --- a/src/portable/microchip/samd/dcd_samd.c +++ b/src/portable/microchip/samd/dcd_samd.c @@ -214,14 +214,14 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) UsbDeviceDescBank* bank = &sram_registers[epnum][dir]; uint32_t size_value = 0; while (size_value < 7) { - if (1 << (size_value + 3) == desc_edpt->wMaxPacketSize.size) { + if (1 << (size_value + 3) == tu_edpt_packet_size(desc_edpt)) { break; } size_value++; } // unsupported endpoint size - if ( size_value == 7 && desc_edpt->wMaxPacketSize.size != 1023 ) return false; + if ( size_value == 7 && tu_edpt_packet_size(desc_edpt) != 1023 ) return false; bank->PCKSIZE.bit.SIZE = size_value; diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c index 81779c56b..2e9854153 100644 --- a/src/portable/microchip/samg/dcd_samg.c +++ b/src/portable/microchip/samg/dcd_samg.c @@ -258,7 +258,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) // Must not already enabled TU_ASSERT((UDP->UDP_CSR[epnum] & UDP_CSR_EPEDS_Msk) == 0); - xfer_epsize_set(&_dcd_xfer[epnum], ep_desc->wMaxPacketSize.size); + xfer_epsize_set(&_dcd_xfer[epnum], tu_edpt_packet_size(ep_desc)); // Configure type and enable EP csr_write(epnum, UDP_CSR_EPEDS_Msk | UDP_CSR_EPTYPE(ep_desc->bmAttributes.xfer + 4*dir)); diff --git a/src/portable/microchip/samx7x/dcd_samx7x.c b/src/portable/microchip/samx7x/dcd_samx7x.c index 032547e47..d716e8fed 100644 --- a/src/portable/microchip/samx7x/dcd_samx7x.c +++ b/src/portable/microchip/samx7x/dcd_samx7x.c @@ -460,7 +460,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) (void) rhport; uint8_t const epnum = tu_edpt_number(ep_desc->bEndpointAddress); uint8_t const dir = tu_edpt_dir(ep_desc->bEndpointAddress); - uint16_t const epMaxPktSize = ep_desc->wMaxPacketSize.size; + uint16_t const epMaxPktSize = tu_edpt_packet_size(ep_desc); tusb_xfer_type_t const eptype = (tusb_xfer_type_t)ep_desc->bmAttributes.xfer; uint8_t fifoSize = 0; // FIFO size uint16_t defaultEndpointSize = 8; // Default size of Endpoint |
