diff options
| author | hathach <[email protected]> | 2024-08-14 06:33:42 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2024-08-14 06:33:42 +0700 |
| commit | 761399b5e09fd682d7be5ad7570c039922eb18bb (patch) | |
| tree | 6f06f5d974fbbd74cdd83f328ca4e94175a38e80 /src/portable/synopsys | |
| parent | 5122d6d109f8c4b31b6cbe29c685fad30a8961fe (diff) | |
| parent | b8d3c0c4a8e005bcfcc4ed04556e6da54f235ccc (diff) | |
Merge branch 'refs/heads/master' into fork/BrentK-ADI/max32_port
Diffstat (limited to 'src/portable/synopsys')
| -rw-r--r-- | src/portable/synopsys/dwc2/dcd_dwc2.c | 20 | ||||
| -rw-r--r-- | src/portable/synopsys/dwc2/dwc2_esp32.h | 1 |
2 files changed, 5 insertions, 16 deletions
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index dbcd586c5..9a38b46dc 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -1195,25 +1195,13 @@ void dcd_int_handler(uint8_t rhport) { // } } -#if defined(TUP_USBIP_DWC2_TEST_MODE) && CFG_TUD_TEST_MODE - -bool dcd_check_test_mode_support(test_mode_t test_selector) { - // Check if test mode selector is unsupported - if (TEST_FORCE_ENABLE < test_selector || TEST_J > test_selector) { - return false; - } - - return true; -} - -void dcd_enter_test_mode(uint8_t rhport, test_mode_t test_selector) { - // Get port address... +#if CFG_TUD_TEST_MODE +void dcd_enter_test_mode(uint8_t rhport, tusb_feature_test_mode_t test_selector) { dwc2_regs_t* dwc2 = DWC2_REG(rhport); // Enable the test mode - dwc2->dctl = (dwc2->dctl & ~DCTL_TCTL_Msk) | (test_selector << DCTL_TCTL_Pos); + dwc2->dctl = (dwc2->dctl & ~DCTL_TCTL_Msk) | (((uint8_t) test_selector) << DCTL_TCTL_Pos); } - -#endif /* TUP_USBIP_DWC2_TEST_MODE && CFG_TUD_TEST_MODE */ +#endif #endif diff --git a/src/portable/synopsys/dwc2/dwc2_esp32.h b/src/portable/synopsys/dwc2/dwc2_esp32.h index c50dd66b8..932f52f40 100644 --- a/src/portable/synopsys/dwc2/dwc2_esp32.h +++ b/src/portable/synopsys/dwc2/dwc2_esp32.h @@ -35,6 +35,7 @@ #include "esp_intr_alloc.h" #include "soc/periph_defs.h" //#include "soc/usb_periph.h" +#include "freertos/task.h" #define DWC2_REG_BASE 0x60080000UL #define DWC2_EP_MAX 6 // USB_OUT_EP_NUM. TODO ESP32Sx only has 5 tx fifo (5 endpoint IN) |