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authorhathach <[email protected]>2022-02-25 23:04:39 +0700
committerhathach <[email protected]>2022-02-25 23:05:15 +0700
commit0997589c45a7c4dd96da0d9bce37f771520e34c6 (patch)
treeca577df28ae2c52df764263322cffd4cc72f75e6 /src/portable
parent89115253da3ef55d59367977b8103a5e321e56aa (diff)
more symbol rename
Diffstat (limited to 'src/portable')
-rw-r--r--src/portable/chipidea/ci_hs/dcd_ci_hs.c2
-rw-r--r--src/portable/ehci/ehci.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index 6361fe629..21087681c 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -26,7 +26,7 @@
#include "tusb_option.h"
-#if CFG_TUD_ENABLED && defined(DCD_ATTR_CONTROLLER_CHIPIDEA_HS)
+#if CFG_TUD_ENABLED && defined(MCU_ATTR_CONTROLLER_CHIPIDEA_HS)
//--------------------------------------------------------------------+
// INCLUDE
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 419601245..5b42ece48 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -45,7 +45,7 @@
#define EHCI_DBG 2
// Framelist size as small as possible to save SRAM
-#ifdef HCD_ATTR_EHCI
+#ifdef MCU_ATTR_CONTROLLER_CHIPIDEA_HS
// NXP Transdimension: 8 elements
#define FRAMELIST_SIZE_BIT_VALUE 7u
#define FRAMELIST_SIZE_USBCMD_VALUE (((FRAMELIST_SIZE_BIT_VALUE & 3) << EHCI_USBCMD_POS_FRAMELIST_SIZE) | \