diff options
| author | Ha Thach <[email protected]> | 2023-07-24 21:36:15 +0700 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-07-24 21:36:15 +0700 |
| commit | 0b38941362b6ff2fe3fb7aba1507e82798cd9c16 (patch) | |
| tree | 3a0884e47d9d92c9701b8104f4185b0ebb03821a /src/portable | |
| parent | d685ac689bebf778bbf401ff06ba513cee02182c (diff) | |
| parent | fd29fd923a0a64be96fe4bdfa2a5fa9f184ea6c7 (diff) | |
Merge pull request #2173 from hathach/imxrt-dcache-align
change dcache clean/invalidate return type to bool
Diffstat (limited to 'src/portable')
| -rw-r--r-- | src/portable/chipidea/ci_hs/ci_hs_imxrt.h | 15 | ||||
| -rw-r--r-- | src/portable/chipidea/ci_hs/hcd_ci_hs.c | 12 | ||||
| -rw-r--r-- | src/portable/ehci/ehci.c | 9 |
3 files changed, 21 insertions, 15 deletions
diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h index 96f0ba766..c59c107ff 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h +++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h @@ -68,31 +68,34 @@ TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uintptr_t addr) { return !(0x20000000 <= addr && addr < 0x20100000); } -TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void const* addr, uint32_t data_size) { +TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_clean(void const* addr, uint32_t data_size) { const uintptr_t addr32 = (uintptr_t) addr; if (imxrt_is_cache_mem(addr32)) { + TU_ASSERT(tu_is_aligned32(addr32)); SCB_CleanDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size); } + return true; } -TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void const* addr, uint32_t data_size) { +TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_invalidate(void const* addr, uint32_t data_size) { const uintptr_t addr32 = (uintptr_t) addr; if (imxrt_is_cache_mem(addr32)) { // Invalidating does not push cached changes back to RAM so we need to be // *very* careful when we do it. If we're not aligned, then we risk resetting // values back to their RAM state. - // if (addr32 % 32 != 0) { - // TU_BREAKPOINT(); - // } + TU_ASSERT(tu_is_aligned32(addr32)); SCB_InvalidateDCache_by_Addr((void*) addr32, (int32_t) data_size); } + return true; } -TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) { +TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) { const uintptr_t addr32 = (uintptr_t) addr; if (imxrt_is_cache_mem(addr32)) { + TU_ASSERT(tu_is_aligned32(addr32)); SCB_CleanInvalidateDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size); } + return true; } #endif diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index 56167b8f6..6ee91e18e 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -41,16 +41,16 @@ #if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #include "ci_hs_imxrt.h" - void hcd_dcache_clean(void const* addr, uint32_t data_size) { - imxrt_dcache_clean(addr, data_size); + bool hcd_dcache_clean(void const* addr, uint32_t data_size) { + return imxrt_dcache_clean(addr, data_size); } - void hcd_dcache_invalidate(void const* addr, uint32_t data_size) { - imxrt_dcache_invalidate(addr, data_size); + bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) { + return imxrt_dcache_invalidate(addr, data_size); } - void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { - imxrt_dcache_clean_invalidate(addr, data_size); + bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { + return imxrt_dcache_clean_invalidate(addr, data_size); } #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 38711e382..6dfaab2a2 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -162,16 +162,19 @@ static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes) static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type); static inline ehci_link_t* list_next (ehci_link_t const *p_link); -TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) { +TU_ATTR_WEAK bool hcd_dcache_clean(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; + return true; } -TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) { +TU_ATTR_WEAK bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; + return true; } -TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { +TU_ATTR_WEAK bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; + return true; } //--------------------------------------------------------------------+ |
