diff options
| author | HiFiPhile <[email protected]> | 2024-11-30 21:57:47 +0100 |
|---|---|---|
| committer | HiFiPhile <[email protected]> | 2024-11-30 21:57:47 +0100 |
| commit | 0bca377d5210833ac259db6ed9d7d96c724f3e6e (patch) | |
| tree | fd735172fb638f8e8fb88edeaa6af308f62ec07c /src/portable | |
| parent | 0074ed7c6756d3543dc2e89b0081039001ad230c (diff) | |
Fix typo.
Signed-off-by: HiFiPhile <[email protected]>
Diffstat (limited to 'src/portable')
| -rw-r--r-- | src/portable/chipidea/ci_hs/dcd_ci_hs.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index bacc1b99d..331fbfe80 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -467,7 +467,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t #if !CFG_TUD_MEM_DCACHE_ENABLE // fifo has to be aligned to 4k boundary -// It's imcompatible with dcache enabled transfer, since neither address nor size is aligned to cache line +// It's incompatible with dcache enabled transfer, since neither address nor size is aligned to cache line bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) { uint8_t const epnum = tu_edpt_number(ep_addr); |