Merge branch 'master' into nuc121

6 files changed, 736 insertions, 441 deletions

diff --git a/src/portable/microchip/samd51/dcd_samd51.c b/src/portable/microchip/samd/dcd_samd.c
index f58e7cbc7..148995520 100644
--- a/src/portable/microchip/samd51/dcd_samd51.c
+++ b/src/portable/microchip/samd/dcd_samd.c
@@ -26,17 +26,27 @@
 
 #include "tusb_option.h"
 
-#if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_SAMD51
+#if TUSB_OPT_DEVICE_ENABLED && (CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAMD21)
 
-#include "device/dcd.h"
 #include "sam.h"
+#include "device/dcd.h"
 
 /*------------------------------------------------------------------*/
 /* MACRO TYPEDEF CONSTANT ENUM
  *------------------------------------------------------------------*/
-static UsbDeviceDescBank sram_registers[8][2];
+static TU_ATTR_ALIGNED(4) UsbDeviceDescBank sram_registers[8][2];
 static TU_ATTR_ALIGNED(4) uint8_t _setup_packet[8];
 
+
+// ready for receiving SETUP packet
+static inline void prepare_setup(void)
+{
+  // Only make sure the EP0 OUT buffer is ready
+  sram_registers[0][0].ADDR.reg = (uint32_t) _setup_packet;
+  sram_registers[0][0].PCKSIZE.bit.MULTI_PACKET_SIZE = sizeof(_setup_packet);
+  sram_registers[0][0].PCKSIZE.bit.BYTE_COUNT = 0;
+}
+
 // Setup the control endpoint 0.
 static void bus_reset(void)
 {
@@ -51,7 +61,7 @@ static void bus_reset(void)
   ep->EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0 | USB_DEVICE_EPINTENSET_TRCPT1 | USB_DEVICE_EPINTENSET_RXSTP;
 
   // Prepare for setup packet
-  dcd_edpt_xfer(0, 0, _setup_packet, sizeof(_setup_packet));
+  prepare_setup();
 }
 
 
@@ -69,10 +79,10 @@ void dcd_init (uint8_t rhport)
 
   USB->DEVICE.PADCAL.bit.TRANSP = (*((uint32_t*) USB_FUSES_TRANSP_ADDR) & USB_FUSES_TRANSP_Msk) >> USB_FUSES_TRANSP_Pos;
   USB->DEVICE.PADCAL.bit.TRANSN = (*((uint32_t*) USB_FUSES_TRANSN_ADDR) & USB_FUSES_TRANSN_Msk) >> USB_FUSES_TRANSN_Pos;
-  USB->DEVICE.PADCAL.bit.TRIM = (*((uint32_t*) USB_FUSES_TRIM_ADDR) & USB_FUSES_TRIM_Msk) >> USB_FUSES_TRIM_Pos;
+  USB->DEVICE.PADCAL.bit.TRIM   = (*((uint32_t*) USB_FUSES_TRIM_ADDR) & USB_FUSES_TRIM_Msk) >> USB_FUSES_TRIM_Pos;
 
-  USB->DEVICE.QOSCTRL.bit.CQOS = 3;
-  USB->DEVICE.QOSCTRL.bit.DQOS = 3;
+  USB->DEVICE.QOSCTRL.bit.CQOS = 3; // High Quality
+  USB->DEVICE.QOSCTRL.bit.DQOS = 3; // High Quality
 
   // Configure registers
   USB->DEVICE.DESCADD.reg = (uint32_t) &sram_registers;
@@ -81,9 +91,11 @@ void dcd_init (uint8_t rhport)
   while (USB->DEVICE.SYNCBUSY.bit.ENABLE == 1) {}
 
   USB->DEVICE.INTFLAG.reg |= USB->DEVICE.INTFLAG.reg; // clear pending
-  USB->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SOF | USB_DEVICE_INTENSET_EORST;
+  USB->DEVICE.INTENSET.reg = /* USB_DEVICE_INTENSET_SOF | */ USB_DEVICE_INTENSET_EORST;
 }
 
+#if CFG_TUSB_MCU == OPT_MCU_SAMD51
+
 void dcd_int_enable(uint8_t rhport)
 {
   (void) rhport;
@@ -102,15 +114,30 @@ void dcd_int_disable(uint8_t rhport)
   NVIC_DisableIRQ(USB_0_IRQn);
 }
 
+#elif CFG_TUSB_MCU == OPT_MCU_SAMD21
+
+void dcd_int_enable(uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_EnableIRQ(USB_IRQn);
+}
+
+void dcd_int_disable(uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_DisableIRQ(USB_IRQn);
+}
+#endif
+
 void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
 {
-  // Response with status first before changing device address
-  dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
+  (void) dev_addr;
 
-  // Wait for EP0 to finish before switching the address.
-  while (USB->DEVICE.DeviceEndpoint[0].EPSTATUS.bit.BK1RDY == 1) {}
+  // Response with zlp status
+  dcd_edpt_xfer(rhport, 0x80, NULL, 0);
 
-  USB->DEVICE.DADD.reg = USB_DEVICE_DADD_DADD(dev_addr) | USB_DEVICE_DADD_ADDEN;
+  // DCD can only set address after status for this request is complete
+  // do it at dcd_edpt0_status_complete()
 
   // Enable SUSPEND interrupt since the bus signal D+/D- are stable now.
   USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTENCLR_SUSPEND; // clear pending
@@ -135,6 +162,26 @@ void dcd_remote_wakeup(uint8_t rhport)
 /* DCD Endpoint port
  *------------------------------------------------------------------*/
 
+// Invoked when a control transfer's status stage is complete.
+// May help DCD to prepare for next control transfer, this API is optional.
+void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request)
+{
+  (void) rhport;
+
+  if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
+      request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
+      request->bRequest == TUSB_REQ_SET_ADDRESS )
+  {
+    uint8_t const dev_addr = (uint8_t) request->wValue;
+    USB->DEVICE.DADD.reg = USB_DEVICE_DADD_DADD(dev_addr) | USB_DEVICE_DADD_ADDEN;
+  }
+
+  // Just finished status stage, prepare for next setup packet
+  // Note: we may already prepare setup when the last EP0 OUT complete.
+  // but it has no harm to do it again here
+  prepare_setup();
+}
+
 bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
 {
   (void) rhport;
@@ -181,12 +228,6 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
   UsbDeviceDescBank* bank = &sram_registers[epnum][dir];
   UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
 
-  // A setup token can occur immediately after an OUT STATUS packet so make sure we have a valid
-  // buffer for the control endpoint.
-  if (epnum == 0 && dir == 0 && buffer == NULL) {
-    buffer = _setup_packet;
-  }
-
   bank->ADDR.reg = (uint32_t) buffer;
   if ( dir == TUSB_DIR_OUT )
   {
@@ -233,39 +274,63 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
   }
 }
 
-/*------------------------------------------------------------------*/
+//--------------------------------------------------------------------+
+// Interrupt Handler
+//--------------------------------------------------------------------+
+void maybe_transfer_complete(void) {
+  uint32_t epints = USB->DEVICE.EPINTSMRY.reg;
 
-static bool maybe_handle_setup_packet(void) {
-  if (USB->DEVICE.DeviceEndpoint[0].EPINTFLAG.bit.RXSTP)
-  {
-    USB->DEVICE.DeviceEndpoint[0].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP;
+  for (uint8_t epnum = 0; epnum < USB_EPT_NUM; epnum++) {
+    if ((epints & (1 << epnum)) == 0) {
+      continue;
+    }
 
-    // This copies the data elsewhere so we can reuse the buffer.
-    dcd_event_setup_received(0, (uint8_t*) sram_registers[0][0].ADDR.reg, true);
-    return true;
+    UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
+    uint32_t epintflag = ep->EPINTFLAG.reg;
+
+    // Handle IN completions
+    if ((epintflag & USB_DEVICE_EPINTFLAG_TRCPT1) != 0) {
+      UsbDeviceDescBank* bank = &sram_registers[epnum][TUSB_DIR_IN];
+      uint16_t total_transfer_size = bank->PCKSIZE.bit.BYTE_COUNT;
+
+      dcd_event_xfer_complete(0, epnum | TUSB_DIR_IN_MASK, total_transfer_size, XFER_RESULT_SUCCESS, true);
+
+      ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1;
+    }
+
+    // Handle OUT completions
+    if ((epintflag & USB_DEVICE_EPINTFLAG_TRCPT0) != 0) {
+
+      UsbDeviceDescBank* bank = &sram_registers[epnum][TUSB_DIR_OUT];
+      uint16_t total_transfer_size = bank->PCKSIZE.bit.BYTE_COUNT;
+
+      // A SETUP token can occur immediately after an OUT packet
+      // so make sure we have a valid buffer for the control endpoint.
+      if (epnum == 0) {
+        prepare_setup();
+      }
+
+      dcd_event_xfer_complete(0, epnum, total_transfer_size, XFER_RESULT_SUCCESS, true);
+
+      ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0;
+    }
   }
-  return false;
 }
-/*
- *------------------------------------------------------------------*/
-/* USB_EORSM_DNRSM, USB_EORST_RST, USB_LPMSUSP_DDISC, USB_LPM_DCONN,
-USB_MSOF, USB_RAMACER, USB_RXSTP_TXSTP_0, USB_RXSTP_TXSTP_1,
-USB_RXSTP_TXSTP_2, USB_RXSTP_TXSTP_3, USB_RXSTP_TXSTP_4,
-USB_RXSTP_TXSTP_5, USB_RXSTP_TXSTP_6, USB_RXSTP_TXSTP_7,
-USB_STALL0_STALL_0, USB_STALL0_STALL_1, USB_STALL0_STALL_2,
-USB_STALL0_STALL_3, USB_STALL0_STALL_4, USB_STALL0_STALL_5,
-USB_STALL0_STALL_6, USB_STALL0_STALL_7, USB_STALL1_0, USB_STALL1_1,
-USB_STALL1_2, USB_STALL1_3, USB_STALL1_4, USB_STALL1_5, USB_STALL1_6,
-USB_STALL1_7, USB_SUSPEND, USB_TRFAIL0_TRFAIL_0, USB_TRFAIL0_TRFAIL_1,
-USB_TRFAIL0_TRFAIL_2, USB_TRFAIL0_TRFAIL_3, USB_TRFAIL0_TRFAIL_4,
-USB_TRFAIL0_TRFAIL_5, USB_TRFAIL0_TRFAIL_6, USB_TRFAIL0_TRFAIL_7,
-USB_TRFAIL1_PERR_0, USB_TRFAIL1_PERR_1, USB_TRFAIL1_PERR_2,
-USB_TRFAIL1_PERR_3, USB_TRFAIL1_PERR_4, USB_TRFAIL1_PERR_5,
-USB_TRFAIL1_PERR_6, USB_TRFAIL1_PERR_7, USB_UPRSM, USB_WAKEUP */
-void USB_0_Handler(void) {
+
+
+void dcd_isr (uint8_t rhport)
+{
+  (void) rhport;
+
   uint32_t int_status = USB->DEVICE.INTFLAG.reg & USB->DEVICE.INTENSET.reg;
 
   /*------------- Interrupt Processing -------------*/
+  if ( int_status & USB_DEVICE_INTFLAG_SOF )
+  {
+    USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SOF;
+    dcd_event_bus_signal(0, DCD_EVENT_SOF, true);
+  }
+
   // SAMD doesn't distinguish between Suspend and Disconnect state.
   // Both condition will cause SUSPEND interrupt triggered.
   // To prevent being triggered when D+/D- are not stable, SUSPEND interrupt is only
@@ -303,48 +368,44 @@ void USB_0_Handler(void) {
     dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
   }
 
-  // Setup packet received.
-  maybe_handle_setup_packet();
-}
-
-/* USB_SOF_HSOF */
-void USB_1_Handler(void) {
-  USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SOF;
-  dcd_event_bus_signal(0, DCD_EVENT_SOF, true);
-}
-
-void transfer_complete(uint8_t direction) {
-  uint32_t epints = USB->DEVICE.EPINTSMRY.reg;
-  for (uint8_t epnum = 0; epnum < USB_EPT_NUM; epnum++) {
-    if ((epints & (1 << epnum)) == 0) {
-      continue;
-    }
+  // Handle SETUP packet
+  if (USB->DEVICE.DeviceEndpoint[0].EPINTFLAG.bit.RXSTP)
+  {
+    // This copies the data elsewhere so we can reuse the buffer.
+    dcd_event_setup_received(0, _setup_packet, true);
 
-    if (direction == TUSB_DIR_OUT && maybe_handle_setup_packet()) {
-      continue;
-    }
-    UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
+    USB->DEVICE.DeviceEndpoint[0].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP;
+  }
 
-    UsbDeviceDescBank* bank = &sram_registers[epnum][direction];
-    uint16_t total_transfer_size = bank->PCKSIZE.bit.BYTE_COUNT;
+  // Handle complete transfer
+  maybe_transfer_complete();
+}
 
-    uint8_t ep_addr = epnum;
-    if (direction == TUSB_DIR_IN) {
-      ep_addr |= TUSB_DIR_IN_MASK;
-    }
-    dcd_event_xfer_complete(0, ep_addr, total_transfer_size, XFER_RESULT_SUCCESS, true);
+#if CFG_TUSB_MCU == OPT_MCU_SAMD51
 
-    // just finished status stage (total size = 0), prepare for next setup packet
-    if (epnum == 0 && total_transfer_size == 0) {
-      dcd_edpt_xfer(0, 0, _setup_packet, sizeof(_setup_packet));
-    }
+/*
+ *------------------------------------------------------------------*/
+/* USB_EORSM_DNRSM, USB_EORST_RST, USB_LPMSUSP_DDISC, USB_LPM_DCONN,
+USB_MSOF, USB_RAMACER, USB_RXSTP_TXSTP_0, USB_RXSTP_TXSTP_1,
+USB_RXSTP_TXSTP_2, USB_RXSTP_TXSTP_3, USB_RXSTP_TXSTP_4,
+USB_RXSTP_TXSTP_5, USB_RXSTP_TXSTP_6, USB_RXSTP_TXSTP_7,
+USB_STALL0_STALL_0, USB_STALL0_STALL_1, USB_STALL0_STALL_2,
+USB_STALL0_STALL_3, USB_STALL0_STALL_4, USB_STALL0_STALL_5,
+USB_STALL0_STALL_6, USB_STALL0_STALL_7, USB_STALL1_0, USB_STALL1_1,
+USB_STALL1_2, USB_STALL1_3, USB_STALL1_4, USB_STALL1_5, USB_STALL1_6,
+USB_STALL1_7, USB_SUSPEND, USB_TRFAIL0_TRFAIL_0, USB_TRFAIL0_TRFAIL_1,
+USB_TRFAIL0_TRFAIL_2, USB_TRFAIL0_TRFAIL_3, USB_TRFAIL0_TRFAIL_4,
+USB_TRFAIL0_TRFAIL_5, USB_TRFAIL0_TRFAIL_6, USB_TRFAIL0_TRFAIL_7,
+USB_TRFAIL1_PERR_0, USB_TRFAIL1_PERR_1, USB_TRFAIL1_PERR_2,
+USB_TRFAIL1_PERR_3, USB_TRFAIL1_PERR_4, USB_TRFAIL1_PERR_5,
+USB_TRFAIL1_PERR_6, USB_TRFAIL1_PERR_7, USB_UPRSM, USB_WAKEUP */
+void USB_0_Handler(void) {
+  dcd_isr(0);
+}
 
-    if (direction == TUSB_DIR_IN) {
-      ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1;
-    } else {
-      ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0;
-    }
-  }
+/* USB_SOF_HSOF */
+void USB_1_Handler(void) {
+  dcd_isr(0);
 }
 
 // Bank zero is for OUT and SETUP transactions.
@@ -352,7 +413,7 @@ void transfer_complete(uint8_t direction) {
 USB_TRCPT0_3, USB_TRCPT0_4, USB_TRCPT0_5,
 USB_TRCPT0_6, USB_TRCPT0_7 */
 void USB_2_Handler(void) {
-  transfer_complete(TUSB_DIR_OUT);
+  dcd_isr(0);
 }
 
 // Bank one is used for IN transactions.
@@ -360,7 +421,15 @@ void USB_2_Handler(void) {
 USB_TRCPT1_3, USB_TRCPT1_4, USB_TRCPT1_5,
 USB_TRCPT1_6, USB_TRCPT1_7 */
 void USB_3_Handler(void) {
-  transfer_complete(TUSB_DIR_IN);
+  dcd_isr(0);
+}
+
+#elif CFG_TUSB_MCU == OPT_MCU_SAMD21
+
+void USB_Handler(void) {
+  dcd_isr(0);
 }
 
 #endif
+
+#endif
diff --git a/src/portable/microchip/samd21/dcd_samd21.c b/src/portable/microchip/samd21/dcd_samd21.c
deleted file mode 100644
index 231abc7d0..000000000
--- a/src/portable/microchip/samd21/dcd_samd21.c
+++ /dev/null
@@ -1,343 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "tusb_option.h"
-
-#if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_SAMD21
-
-#include "device/dcd.h"
-#include "sam.h"
-
-/*------------------------------------------------------------------*/
-/* MACRO TYPEDEF CONSTANT ENUM
- *------------------------------------------------------------------*/
-static TU_ATTR_ALIGNED(4) UsbDeviceDescBank sram_registers[8][2];
-static TU_ATTR_ALIGNED(4) uint8_t _setup_packet[8];
-
-// Setup the control endpoint 0.
-static void bus_reset(void)
-{
-  // Max size of packets is 64 bytes.
-  UsbDeviceDescBank* bank_out = &sram_registers[0][TUSB_DIR_OUT];
-  bank_out->PCKSIZE.bit.SIZE = 0x3;
-  UsbDeviceDescBank* bank_in = &sram_registers[0][TUSB_DIR_IN];
-  bank_in->PCKSIZE.bit.SIZE = 0x3;
-
-  UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[0];
-  ep->EPCFG.reg = USB_DEVICE_EPCFG_EPTYPE0(0x1) | USB_DEVICE_EPCFG_EPTYPE1(0x1);
-  ep->EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0 | USB_DEVICE_EPINTENSET_TRCPT1 | USB_DEVICE_EPINTENSET_RXSTP;
-
-  // Prepare for setup packet
-  dcd_edpt_xfer(0, 0, _setup_packet, sizeof(_setup_packet));
-}
-
-
-/*------------------------------------------------------------------*/
-/* Controller API
- *------------------------------------------------------------------*/
-void dcd_init (uint8_t rhport)
-{
-  (void) rhport;
-
-  // Reset to get in a clean state.
-  USB->DEVICE.CTRLA.bit.SWRST = true;
-  while (USB->DEVICE.SYNCBUSY.bit.SWRST == 0) {}
-  while (USB->DEVICE.SYNCBUSY.bit.SWRST == 1) {}
-
-  USB->DEVICE.PADCAL.bit.TRANSP = (*((uint32_t*) USB_FUSES_TRANSP_ADDR) & USB_FUSES_TRANSP_Msk) >> USB_FUSES_TRANSP_Pos;
-  USB->DEVICE.PADCAL.bit.TRANSN = (*((uint32_t*) USB_FUSES_TRANSN_ADDR) & USB_FUSES_TRANSN_Msk) >> USB_FUSES_TRANSN_Pos;
-  USB->DEVICE.PADCAL.bit.TRIM = (*((uint32_t*) USB_FUSES_TRIM_ADDR) & USB_FUSES_TRIM_Msk) >> USB_FUSES_TRIM_Pos;
-
-  USB->DEVICE.QOSCTRL.bit.CQOS = USB_QOSCTRL_CQOS_HIGH_Val;
-  USB->DEVICE.QOSCTRL.bit.DQOS = USB_QOSCTRL_DQOS_HIGH_Val;
-
-  // Configure registers
-  USB->DEVICE.DESCADD.reg = (uint32_t) &sram_registers;
-  USB->DEVICE.CTRLB.reg = USB_DEVICE_CTRLB_SPDCONF_FS;
-  USB->DEVICE.CTRLA.reg = USB_CTRLA_MODE_DEVICE | USB_CTRLA_ENABLE | USB_CTRLA_RUNSTDBY;
-  while (USB->DEVICE.SYNCBUSY.bit.ENABLE == 1) {}
-
-  USB->DEVICE.INTFLAG.reg |= USB->DEVICE.INTFLAG.reg; // clear pending
-  USB->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SOF | USB_DEVICE_INTENSET_EORST;
-}
-
-void dcd_int_enable(uint8_t rhport)
-{
-  (void) rhport;
-  NVIC_EnableIRQ(USB_IRQn);
-}
-
-void dcd_int_disable(uint8_t rhport)
-{
-  (void) rhport;
-  NVIC_DisableIRQ(USB_IRQn);
-}
-
-void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
-{
-  // Response with status first before changing device address
-  dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
-
-  // Wait for EP0 to finish before switching the address.
-  while (USB->DEVICE.DeviceEndpoint[0].EPSTATUS.bit.BK1RDY == 1) {}
-
-  USB->DEVICE.DADD.reg = USB_DEVICE_DADD_DADD(dev_addr) | USB_DEVICE_DADD_ADDEN;
-
-  // Enable SUSPEND interrupt since the bus signal D+/D- are stable now.
-  USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTENCLR_SUSPEND; // clear pending
-  USB->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SUSPEND;
-}
-
-void dcd_set_config (uint8_t rhport, uint8_t config_num)
-{
-  (void) rhport;
-  (void) config_num;
-  // Nothing to do
-
-}
-
-void dcd_remote_wakeup(uint8_t rhport)
-{
-  (void) rhport;
-
-  USB->DEVICE.CTRLB.bit.UPRSM = 1;
-}
-
-/*------------------------------------------------------------------*/
-/* DCD Endpoint port
- *------------------------------------------------------------------*/
-
-bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
-{
-  (void) rhport;
-
-  uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress);
-  uint8_t const dir   = tu_edpt_dir(desc_edpt->bEndpointAddress);
-
-  UsbDeviceDescBank* bank = &sram_registers[epnum][dir];
-  uint32_t size_value = 0;
-  while (size_value < 7) {
-    if (1 << (size_value + 3) == desc_edpt->wMaxPacketSize.size) {
-      break;
-    }
-    size_value++;
-  }
-
-  // unsupported endpoint size
-  if ( size_value == 7 && desc_edpt->wMaxPacketSize.size != 1023 ) return false;
-
-  bank->PCKSIZE.bit.SIZE = size_value;
-
-  UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
-
-  if ( dir == TUSB_DIR_OUT )
-  {
-    ep->EPCFG.bit.EPTYPE0 = desc_edpt->bmAttributes.xfer + 1;
-    ep->EPINTENSET.bit.TRCPT0 = true;
-  }else
-  {
-    ep->EPCFG.bit.EPTYPE1 = desc_edpt->bmAttributes.xfer + 1;
-    ep->EPINTENSET.bit.TRCPT1 = true;
-  }
-
-  return true;
-}
-
-bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
-{
-  (void) rhport;
-
-  uint8_t const epnum = tu_edpt_number(ep_addr);
-  uint8_t const dir   = tu_edpt_dir(ep_addr);
-
-  UsbDeviceDescBank* bank = &sram_registers[epnum][dir];
-  UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
-
-  // A setup token can occur immediately after an OUT STATUS packet so make sure we have a valid
-  // buffer for the control endpoint.
-  if (epnum == 0 && dir == 0 && buffer == NULL) {
-      buffer = _setup_packet;
-  }
-
-  bank->ADDR.reg = (uint32_t) buffer;
-  if ( dir == TUSB_DIR_OUT )
-  {
-    bank->PCKSIZE.bit.MULTI_PACKET_SIZE = total_bytes;
-    bank->PCKSIZE.bit.BYTE_COUNT = 0;
-    ep->EPSTATUSCLR.reg |= USB_DEVICE_EPSTATUSCLR_BK0RDY;
-    ep->EPINTFLAG.reg |= USB_DEVICE_EPINTFLAG_TRFAIL0;
-  } else
-  {
-    bank->PCKSIZE.bit.MULTI_PACKET_SIZE = 0;
-    bank->PCKSIZE.bit.BYTE_COUNT = total_bytes;
-    // bank->PCKSIZE.bit.AUTO_ZLP = 1;
-    ep->EPSTATUSSET.reg |= USB_DEVICE_EPSTATUSSET_BK1RDY;
-    ep->EPINTFLAG.reg |= USB_DEVICE_EPINTFLAG_TRFAIL1;
-  }
-
-  return true;
-}
-
-void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
-{
-  (void) rhport;
-
-  uint8_t const epnum = tu_edpt_number(ep_addr);
-  UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
-
-  if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
-      ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1;
-  } else {
-      ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ0;
-  }
-}
-
-void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
-{
-  (void) rhport;
-
-  uint8_t const epnum = tu_edpt_number(ep_addr);
-  UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
-
-  if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
-    ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ1 | USB_DEVICE_EPSTATUSCLR_DTGLIN;
-  } else {
-    ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ0 | USB_DEVICE_EPSTATUSCLR_DTGLOUT;
-  }
-}
-
-/*------------------------------------------------------------------*/
-
-static bool maybe_handle_setup_packet(void) {
-  if (USB->DEVICE.DeviceEndpoint[0].EPINTFLAG.bit.RXSTP)
-  {
-    USB->DEVICE.DeviceEndpoint[0].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP;
-
-    // This copies the data elsewhere so we can reuse the buffer.
-    dcd_event_setup_received(0, (uint8_t*) sram_registers[0][0].ADDR.reg, true);
-    return true;
-  }
-  return false;
-}
-
-void maybe_transfer_complete(void) {
-  uint32_t epints = USB->DEVICE.EPINTSMRY.reg;
-
-  for (uint8_t epnum = 0; epnum < USB_EPT_NUM; epnum++) {
-    if ((epints & (1 << epnum)) == 0) {
-      continue;
-    }
-
-    if (maybe_handle_setup_packet()) {
-      continue;
-    }
-
-    UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
-
-    uint32_t epintflag = ep->EPINTFLAG.reg;
-
-    uint16_t total_transfer_size = 0;
-
-    // Handle IN completions
-    if ((epintflag & USB_DEVICE_EPINTFLAG_TRCPT1) != 0) {
-      ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1;
-
-      UsbDeviceDescBank* bank = &sram_registers[epnum][TUSB_DIR_IN];
-      total_transfer_size = bank->PCKSIZE.bit.BYTE_COUNT;
-
-      uint8_t ep_addr = epnum | TUSB_DIR_IN_MASK;
-      dcd_event_xfer_complete(0, ep_addr, total_transfer_size, XFER_RESULT_SUCCESS, true);
-    }
-
-    // Handle OUT completions
-    if ((epintflag & USB_DEVICE_EPINTFLAG_TRCPT0) != 0) {
-      ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0;
-
-      UsbDeviceDescBank* bank = &sram_registers[epnum][TUSB_DIR_OUT];
-      total_transfer_size = bank->PCKSIZE.bit.BYTE_COUNT;
-
-      uint8_t ep_addr = epnum;
-      dcd_event_xfer_complete(0, ep_addr, total_transfer_size, XFER_RESULT_SUCCESS, true);
-    }
-
-    // Just finished status stage (total size = 0), prepare for next setup packet
-    // TODO could cause issue with actual zero length data used by class such as DFU
-    if (epnum == 0 && total_transfer_size == 0) {
-      dcd_edpt_xfer(0, 0, _setup_packet, sizeof(_setup_packet));
-    }
-  }
-}
-
-void USB_Handler(void)
-{
-  uint32_t int_status = USB->DEVICE.INTFLAG.reg & USB->DEVICE.INTENSET.reg;
-  USB->DEVICE.INTFLAG.reg = int_status; // clear interrupt
-
-  /*------------- Interrupt Processing -------------*/
-  if ( int_status & USB_DEVICE_INTFLAG_SOF )
-  {
-    dcd_event_bus_signal(0, DCD_EVENT_SOF, true);
-  }
-
-  // SAMD doesn't distinguish between Suspend and Disconnect state.
-  // Both condition will cause SUSPEND interrupt triggered.
-  // To prevent being triggered when D+/D- are not stable, SUSPEND interrupt is only
-  // enabled when we received SET_ADDRESS request and cleared on Bus Reset
-  if ( int_status & USB_DEVICE_INTFLAG_SUSPEND )
-  {
-    // Enable wakeup interrupt
-    USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_WAKEUP; // clear pending
-    USB->DEVICE.INTENSET.reg = USB_DEVICE_INTFLAG_WAKEUP;
-
-    dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
-  }
-
-  // Wakeup interrupt is only enabled when we got suspended.
-  // Wakeup interrupt will disable itself
-  if ( int_status & USB_DEVICE_INTFLAG_WAKEUP )
-  {
-    // disable wakeup interrupt itself
-    USB->DEVICE.INTENCLR.reg = USB_DEVICE_INTFLAG_WAKEUP;
-    dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
-  }
-
-  if ( int_status & USB_DEVICE_INTFLAG_EORST )
-  {
-    // Disable both suspend and wakeup interrupt
-    USB->DEVICE.INTENCLR.reg = USB_DEVICE_INTFLAG_WAKEUP | USB_DEVICE_INTFLAG_SUSPEND;
-
-    bus_reset();
-    dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
-  }
-
-  // Setup packet received.
-  maybe_handle_setup_packet();
-
-  // Handle complete transfer
-  maybe_transfer_complete();
-}
-
-#endif
diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c
new file mode 100644
index 000000000..a93b26caa
--- /dev/null
+++ b/src/portable/microchip/samg/dcd_samg.c
@@ -0,0 +1,443 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018, hathach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb_option.h"
+
+#if CFG_TUSB_MCU == OPT_MCU_SAMG
+
+#include "sam.h"
+#include "device/dcd.h"
+
+// TODO should support (SAM3S || SAM4S || SAM4E || SAMG55)
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+//--------------------------------------------------------------------+
+
+#define EP_COUNT    6
+
+// Transfer descriptor
+typedef struct
+{
+  uint8_t* buffer;
+  uint16_t total_len;
+  volatile uint16_t actual_len;
+  uint16_t  epsize;
+} xfer_desc_t;
+
+// Endpoint 0-5, each can only be either OUT or In
+xfer_desc_t _dcd_xfer[EP_COUNT];
+
+void xfer_epsize_set(xfer_desc_t* xfer, uint16_t epsize)
+{
+  xfer->epsize = epsize;
+}
+
+void xfer_begin(xfer_desc_t* xfer, uint8_t * buffer, uint16_t total_bytes)
+{
+  xfer->buffer     = buffer;
+  xfer->total_len  = total_bytes;
+  xfer->actual_len = 0;
+}
+
+void xfer_end(xfer_desc_t* xfer)
+{
+  xfer->buffer     = NULL;
+  xfer->total_len  = 0;
+  xfer->actual_len = 0;
+}
+
+uint16_t xfer_packet_len(xfer_desc_t* xfer)
+{
+  // also cover zero-length packet
+  return tu_min16(xfer->total_len - xfer->actual_len, xfer->epsize);
+}
+
+void xfer_packet_done(xfer_desc_t* xfer)
+{
+  uint16_t const xact_len = xfer_packet_len(xfer);
+
+  xfer->buffer += xact_len;
+  xfer->actual_len += xact_len;
+}
+
+//------------- Transaction helpers -------------//
+
+// Write data to EP FIFO, return number of written bytes
+static void xact_ep_write(uint8_t epnum, uint8_t* buffer, uint16_t xact_len)
+{
+  for(uint16_t i=0; i<xact_len; i++)
+  {
+    UDP->UDP_FDR[epnum] = (uint32_t) buffer[i];
+  }
+}
+
+// Read data from EP FIFO
+static void xact_ep_read(uint8_t epnum, uint8_t* buffer, uint16_t xact_len)
+{
+  for(uint16_t i=0; i<xact_len; i++)
+  {
+    buffer[i] = (uint8_t) UDP->UDP_FDR[epnum];
+  }
+}
+
+/*------------------------------------------------------------------*/
+/* Device API
+ *------------------------------------------------------------------*/
+
+// Set up endpoint 0, clear all other endpoints
+static void bus_reset(void)
+{
+  tu_memclr(_dcd_xfer, sizeof(_dcd_xfer));
+
+  xfer_epsize_set(&_dcd_xfer[0], CFG_TUD_ENDPOINT0_SIZE);
+
+  // Enable EP0 control
+  UDP->UDP_CSR[0] = UDP_CSR_EPEDS_Msk;
+
+  // Enable interrupt : EP0, Suspend, Resume, Wakeup
+  UDP->UDP_IER = UDP_IER_EP0INT_Msk | UDP_IER_RXSUSP_Msk | UDP_IER_RXRSM_Msk | UDP_IER_WAKEUP_Msk;
+
+  // Enable transceiver
+  UDP->UDP_TXVC &= ~UDP_TXVC_TXVDIS_Msk;
+}
+
+// Initialize controller to device mode
+void dcd_init (uint8_t rhport)
+{
+  (void) rhport;
+
+  tu_memclr(_dcd_xfer, sizeof(_dcd_xfer));
+
+  // Enable pull-up, disable transceiver
+  UDP->UDP_TXVC = UDP_TXVC_PUON | UDP_TXVC_TXVDIS_Msk;
+}
+
+// Enable device interrupt
+void dcd_int_enable (uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_EnableIRQ(UDP_IRQn);
+}
+
+// Disable device interrupt
+void dcd_int_disable (uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_DisableIRQ(UDP_IRQn);
+}
+
+// Receive Set Address request, mcu port must also include status IN response
+void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
+{
+  (void) rhport;
+  (void) dev_addr;
+
+  // Response with zlp status
+  dcd_edpt_xfer(rhport, 0x80, NULL, 0);
+
+  // DCD can only set address after status for this request is complete.
+  // do it at dcd_edpt0_status_complete()
+}
+
+// Receive Set Configure request
+void dcd_set_config (uint8_t rhport, uint8_t config_num)
+{
+  (void) rhport;
+  (void) config_num;
+
+  // Configured State
+//  UDP->UDP_GLB_STAT |= UDP_GLB_STAT_CONFG_Msk;
+}
+
+// Wake up host
+void dcd_remote_wakeup (uint8_t rhport)
+{
+  (void) rhport;
+}
+
+//--------------------------------------------------------------------+
+// Endpoint API
+//--------------------------------------------------------------------+
+
+// Invoked when a control transfer's status stage is complete.
+// May help DCD to prepare for next control transfer, this API is optional.
+void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request)
+{
+  (void) rhport;
+
+  if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
+      request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD )
+  {
+    if (request->bRequest == TUSB_REQ_SET_ADDRESS)
+    {
+      uint8_t const dev_addr = (uint8_t) request->wValue;
+
+      // Enable addressed state
+      UDP->UDP_GLB_STAT |= UDP_GLB_STAT_FADDEN_Msk;
+
+      // Set new address & Function enable bit
+      UDP->UDP_FADDR = UDP_FADDR_FEN_Msk | UDP_FADDR_FADD(dev_addr);
+    }else if (request->bRequest == TUSB_REQ_SET_CONFIGURATION)
+    {
+      // Configured State
+      UDP->UDP_GLB_STAT |= UDP_GLB_STAT_CONFG_Msk;
+    }
+  }
+}
+
+// Configure endpoint's registers according to descriptor
+// SAMG doesn't support a same endpoint number with IN and OUT
+//    e.g EP1 OUT & EP1 IN cannot exist together
+bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
+{
+  (void) rhport;
+
+  uint8_t const epnum = tu_edpt_number(ep_desc->bEndpointAddress);
+  uint8_t const dir   = tu_edpt_dir(ep_desc->bEndpointAddress);
+
+  // TODO Isochronous is not supported yet
+  TU_VERIFY(ep_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS);
+  TU_VERIFY(epnum < EP_COUNT);
+
+  // Must not already enabled
+  TU_ASSERT((UDP->UDP_CSR[epnum] & UDP_CSR_EPEDS_Msk) == 0);
+
+  xfer_epsize_set(&_dcd_xfer[epnum], ep_desc->wMaxPacketSize.size);
+
+  // Configure type and eanble EP
+  UDP->UDP_CSR[epnum] = UDP_CSR_EPEDS_Msk | UDP_CSR_EPTYPE(ep_desc->bmAttributes.xfer + 4*dir);
+
+  // Enable EP Interrupt for IN
+  if (dir == TUSB_DIR_IN) UDP->UDP_IER |= (1 << epnum);
+
+  return true;
+}
+
+// Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
+bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
+{
+  (void) rhport;
+
+  uint8_t const epnum = tu_edpt_number(ep_addr);
+  uint8_t const dir   = tu_edpt_dir(ep_addr);
+
+  xfer_desc_t* xfer = &_dcd_xfer[epnum];
+  xfer_begin(xfer, buffer, total_bytes);
+
+  if (dir == TUSB_DIR_IN)
+  {
+    // Set DIR bit for EP0
+    if ( epnum == 0 ) UDP->UDP_CSR[epnum] |= UDP_CSR_DIR_Msk;
+
+    xact_ep_write(epnum, xfer->buffer, xfer_packet_len(xfer));
+
+    // TX ready for transfer
+    UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk;
+  }
+  else
+  {
+    // Clear DIR bit for EP0
+    if ( epnum == 0 ) UDP->UDP_CSR[epnum] &= ~UDP_CSR_DIR_Msk;
+
+    // OUT Data may already received and acked by hardware
+    // Read it as 1st packet then continue with transfer if needed
+    if ( UDP->UDP_CSR[epnum] & (UDP_CSR_RX_DATA_BK0_Msk | UDP_CSR_RX_DATA_BK1_Msk) )
+    {
+//      uint16_t const xact_len = (uint16_t) ((UDP->UDP_CSR[epnum] & UDP_CSR_RXBYTECNT_Msk) >> UDP_CSR_RXBYTECNT_Pos);
+
+//      TU_LOG2("xact_len = %d\r", xact_len);
+
+//      // Read from EP fifo
+//      xact_ep_read(epnum, xfer->buffer, xact_len);
+//      xfer_packet_done(xfer);
+//
+//      // Clear DATA Bank0 bit
+//      UDP->UDP_CSR[epnum] &= ~UDP_CSR_RX_DATA_BK0_Msk;
+//
+//      if ( 0 == xfer_packet_len(xfer) )
+//      {
+//        // Disable OUT EP interrupt when transfer is complete
+//        UDP->UDP_IER &= ~(1 << epnum);
+//
+//        dcd_event_xfer_complete(rhport, epnum, xact_len, XFER_RESULT_SUCCESS, false);
+//        return true; // complete
+//      }
+    }
+
+    // Enable interrupt when starting OUT transfer
+    if (epnum != 0) UDP->UDP_IER |= (1 << epnum);
+  }
+
+  return true;
+}
+
+// Stall endpoint
+void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
+{
+  (void) rhport;
+
+  uint8_t const epnum = tu_edpt_number(ep_addr);
+
+  // Set force stall bit
+  UDP->UDP_CSR[epnum] |= UDP_CSR_FORCESTALL_Msk;
+}
+
+// clear stall, data toggle is also reset to DATA0
+void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
+{
+  (void) rhport;
+
+  uint8_t const epnum = tu_edpt_number(ep_addr);
+
+  // clear stall
+  UDP->UDP_CSR[epnum] &= ~UDP_CSR_FORCESTALL_Msk;
+
+  // must also reset EP to clear data toggle
+  UDP->UDP_RST_EP = tu_bit_set(UDP->UDP_RST_EP, epnum);
+  UDP->UDP_RST_EP = tu_bit_clear(UDP->UDP_RST_EP, epnum);
+}
+
+//--------------------------------------------------------------------+
+// ISR
+//--------------------------------------------------------------------+
+void dcd_isr(uint8_t rhport)
+{
+  uint32_t const intr_mask   = UDP->UDP_IMR;
+  uint32_t const intr_status = UDP->UDP_ISR & intr_mask;
+
+  // clear interrupt
+  UDP->UDP_ICR = intr_status;
+
+  // Bus reset
+  if (intr_status & UDP_ISR_ENDBUSRES_Msk)
+  {
+    bus_reset();
+    dcd_event_bus_signal(rhport, DCD_EVENT_BUS_RESET, true);
+  }
+
+  // SOF
+//  if (intr_status & UDP_ISR_SOFINT_Msk) dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
+
+  // Suspend
+//  if (intr_status & UDP_ISR_RXSUSP_Msk) dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
+
+  // Resume
+//  if (intr_status & UDP_ISR_RXRSM_Msk)  dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
+
+  // Wakeup
+//  if (intr_status & UDP_ISR_WAKEUP_Msk)  dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
+
+  //------------- Endpoints -------------//
+
+  if ( intr_status & TU_BIT(0) )
+  {
+    // setup packet
+    if (UDP->UDP_CSR[0] & UDP_CSR_RXSETUP)
+    {
+      // get setup from FIFO
+      uint8_t setup[8];
+      for(uint8_t i=0; i<sizeof(setup); i++)
+      {
+        setup[i] = (uint8_t) UDP->UDP_FDR[0];
+      }
+
+      // notify usbd
+      dcd_event_setup_received(rhport, setup, true);
+
+      // Clear Setup bit
+      UDP->UDP_CSR[0] &= ~UDP_CSR_RXSETUP_Msk;
+
+      return;
+    }
+  }
+
+  for(uint8_t epnum = 0; epnum < EP_COUNT; epnum++)
+  {
+    if ( intr_status & TU_BIT(epnum) )
+    {
+      xfer_desc_t* xfer = &_dcd_xfer[epnum];
+
+      // Endpoint IN
+      if (UDP->UDP_CSR[epnum] & UDP_CSR_TXCOMP_Msk)
+      {
+        xfer_packet_done(xfer);
+
+        uint16_t const xact_len = xfer_packet_len(xfer);
+
+        if (xact_len)
+        {
+          // write to EP fifo
+          xact_ep_write(epnum, xfer->buffer, xact_len);
+
+          // TX ready for transfer
+          UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk;
+        }else
+        {
+          // xfer is complete
+          dcd_event_xfer_complete(rhport, epnum | TUSB_DIR_IN_MASK, xfer->actual_len, XFER_RESULT_SUCCESS, true);
+        }
+
+        // Clear TX Complete bit
+        UDP->UDP_CSR[epnum] &= ~UDP_CSR_TXCOMP_Msk;
+      }
+
+      // Endpoint OUT
+      // Ping-Pong is a must for Bulk/Iso
+      // When both Bank0 and Bank1 are both set, there is not way to know which one comes first
+      if (UDP->UDP_CSR[epnum] & (UDP_CSR_RX_DATA_BK0_Msk | UDP_CSR_RX_DATA_BK1_Msk))
+      {
+        uint16_t const xact_len = (uint16_t) ((UDP->UDP_CSR[epnum] & UDP_CSR_RXBYTECNT_Msk) >> UDP_CSR_RXBYTECNT_Pos);
+
+        //if (epnum != 0) TU_LOG2("xact_len = %d\r", xact_len);
+
+        // Read from EP fifo
+        xact_ep_read(epnum, xfer->buffer, xact_len);
+        xfer_packet_done(xfer);
+
+        if ( 0 == xfer_packet_len(xfer) )
+        {
+          // Disable OUT EP interrupt when transfer is complete
+          if (epnum != 0) UDP->UDP_IDR |= (1 << epnum);
+
+          dcd_event_xfer_complete(rhport, epnum, xact_len, XFER_RESULT_SUCCESS, true);
+//          xfer_end(xfer);
+        }
+
+        // Clear DATA Bank0 bit
+        UDP->UDP_CSR[epnum] &= ~(UDP_CSR_RX_DATA_BK0_Msk | UDP_CSR_RX_DATA_BK1_Msk);
+      }
+
+      // Stall sent to host
+      if (UDP->UDP_CSR[epnum] & UDP_CSR_STALLSENT_Msk)
+      {
+        UDP->UDP_CSR[epnum] &= ~UDP_CSR_STALLSENT_Msk;
+      }
+    }
+  }
+}
+
+#endif
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 9e99ea1de..a1f40d971 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -175,7 +175,6 @@ static inline xfer_ctl_t* xfer_ctl_ptr(uint32_t epnum, uint32_t dir)
 
 static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[6];
 
-static uint8_t newDADDR; // Used to set the new device address during the CTR IRQ handler
 static uint8_t remoteWakeCountdown; // When wake is requested
 
 // EP Buffers assigned from end of memory location, to minimize their chance of crashing
@@ -298,14 +297,14 @@ void dcd_int_disable(uint8_t rhport)
 // Receive Set Address request, mcu port must also include status IN response
 void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 {
-  (void)rhport;
-  // We cannot immediatly change it; it must be queued to change after the STATUS packet is sent.
-  // (CTR handler will actually change the address once it sees that the transmission is complete)
-  newDADDR = dev_addr;
+  (void) rhport;
+  (void) dev_addr;
 
   // Respond with status
   dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
 
+  // DCD can only set address after status for this request is complete.
+  // do it at dcd_edpt0_status_complete()
 }
 
 // Receive Set Config request
@@ -362,7 +361,7 @@ static void dcd_handle_bus_reset(void)
   ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8*MAX_EP_COUNT; // 8 bytes per endpoint (two TX and two RX words, each)
   dcd_edpt_open (0, &ep0OUT_desc);
   dcd_edpt_open (0, &ep0IN_desc);
-  newDADDR = 0u;
+
   USB->DADDR = USB_DADDR_EF; // Set enable flag, and leaving the device address as zero.
 }
 
@@ -398,13 +397,7 @@ static uint16_t dcd_ep_ctr_handler(void)
         if((xfer->total_len == xfer->queued_len))
         {
           dcd_event_xfer_complete(0u, (uint8_t)(0x80 + EPindex), xfer->total_len, XFER_RESULT_SUCCESS, true);
-          if((newDADDR != 0) && ( xfer->total_len == 0U))
-          {
-            // Delayed setting of the DADDR after the 0-len DATA packet acking the request is sent.
-            reg16_clear_bits(&USB->DADDR, USB_DADDR_ADD);
-            USB->DADDR = (uint16_t)(USB->DADDR | newDADDR); // leave the enable bit set
-            newDADDR = 0;
-          }
+
           if(xfer->total_len == 0) // Probably a status message?
           {
             pcd_clear_rx_dtog(USB,EPindex);
@@ -602,6 +595,24 @@ static void dcd_fs_irqHandler(void) {
 // Endpoint API
 //--------------------------------------------------------------------+
 
+// Invoked when a control transfer's status stage is complete.
+// May help DCD to prepare for next control transfer, this API is optional.
+void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request)
+{
+  (void) rhport;
+
+  if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
+      request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
+      request->bRequest == TUSB_REQ_SET_ADDRESS )
+  {
+    uint8_t const dev_addr = (uint8_t) request->wValue;
+
+    // Setting new address after the whole request is complete
+    reg16_clear_bits(&USB->DADDR, USB_DADDR_ADD);
+    USB->DADDR = (uint16_t)(USB->DADDR | dev_addr); // leave the enable bit set
+  }
+}
+
 // The STM32F0 doesn't seem to like |= or &= to manipulate the EP#R registers,
 // so I'm using the #define from HAL here, instead.
 
diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c
index b25cfccae..c16211a9d 100644
--- a/src/portable/st/synopsys/dcd_synopsys.c
+++ b/src/portable/st/synopsys/dcd_synopsys.c
@@ -232,7 +232,6 @@ void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
   (void) rhport;
 
   USB_OTG_DeviceTypeDef * dev = DEVICE_BASE;
-
   dev->DCFG |= (dev_addr << USB_OTG_DCFG_DAD_Pos) & USB_OTG_DCFG_DAD_Msk;
 
   // Response with status after changing device address
diff --git a/src/portable/template/dcd_template.c b/src/portable/template/dcd_template.c
new file mode 100644
index 000000000..102910509
--- /dev/null
+++ b/src/portable/template/dcd_template.c
@@ -0,0 +1,116 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018, hathach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb_option.h"
+
+#if CFG_TUSB_MCU == OPT_MCU_NONE
+
+#include "device/dcd.h"
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+//--------------------------------------------------------------------+
+
+
+/*------------------------------------------------------------------*/
+/* Device API
+ *------------------------------------------------------------------*/
+
+// Initialize controller to device mode
+void dcd_init (uint8_t rhport)
+{
+  (void) rhport;
+}
+
+// Enable device interrupt
+void dcd_int_enable (uint8_t rhport)
+{
+  (void) rhport;
+}
+
+// Disable device interrupt
+void dcd_int_disable (uint8_t rhport)
+{
+  (void) rhport;
+}
+
+// Receive Set Address request, mcu port must also include status IN response
+void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
+{
+  (void) rhport;
+  (void) dev_addr;
+}
+
+// Receive Set Configure request
+void dcd_set_config (uint8_t rhport, uint8_t config_num)
+{
+  (void) rhport;
+  (void) config_num;
+}
+
+// Wake up host
+void dcd_remote_wakeup (uint8_t rhport)
+{
+  (void) rhport;
+}
+
+//--------------------------------------------------------------------+
+// Endpoint API
+//--------------------------------------------------------------------+
+
+// Configure endpoint's registers according to descriptor
+bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
+{
+  (void) rhport;
+  (void) ep_desc;
+  return false;
+}
+
+// Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
+bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
+{
+  (void) rhport;
+  (void) ep_addr;
+  (void) buffer;
+  (void) total_bytes;
+  return false;
+}
+
+// Stall endpoint
+void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
+{
+  (void) rhport;
+  (void) ep_addr;
+}
+
+// clear stall, data toggle is also reset to DATA0
+void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
+{
+  (void) rhport;
+  (void) ep_addr;
+}
+
+#endif