diff options
| author | hathach <[email protected]> | 2023-09-28 12:55:59 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2023-09-28 12:55:59 +0700 |
| commit | 6b8933cfe838b369c58d4fc9ced8aa5c9382a6d6 (patch) | |
| tree | 50ebbc8cacd48b5767b588ab6c1ef95388817394 /src/portable | |
| parent | 7dc1a66f917408992cf672009a307f7200a3fd32 (diff) | |
fix build with new freertos host example
Diffstat (limited to 'src/portable')
| -rw-r--r-- | src/portable/analog/max3421/hcd_max3421.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c index 6613956de..77912a4c9 100644 --- a/src/portable/analog/max3421/hcd_max3421.c +++ b/src/portable/analog/max3421/hcd_max3421.c @@ -428,8 +428,8 @@ bool hcd_init(uint8_t rhport) { reg_write(rhport, PINCTL_ADDR, PINCTL_FDUPSPI, false); // V1 is 0x01, V2 is 0x12, V3 is 0x13 - uint8_t const revision = reg_read(rhport, REVISION_ADDR, false); - TU_LOG2_HEX(revision); +// uint8_t const revision = reg_read(rhport, REVISION_ADDR, false); +// TU_LOG2_HEX(revision); // reset reg_write(rhport, USBCTL_ADDR, USBCTL_CHIPRES, false); |