diff options
| author | hathach <[email protected]> | 2024-11-25 19:11:19 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2024-11-25 19:11:19 +0700 |
| commit | 833eb7d22d641b2c2b1dd701f86d823f67b12d6d (patch) | |
| tree | 03a5e9f865b50ab1f6aa79816dbe7955b2343a7f /src/portable | |
| parent | 66741e35c2661ccaa6a8f8cd6d2f6d7aab049f2c (diff) | |
change dcd_dcache_*() API return type from void to bool
Diffstat (limited to 'src/portable')
| -rw-r--r-- | src/portable/chipidea/ci_hs/dcd_ci_hs.c | 30 | ||||
| -rw-r--r-- | src/portable/synopsys/dwc2/dcd_dwc2.c | 21 | ||||
| -rw-r--r-- | src/portable/synopsys/dwc2/dwc2_esp32.h | 12 |
3 files changed, 23 insertions, 40 deletions
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 430a0aad1..d9f7ca8ea 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -34,43 +34,29 @@ #if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #include "ci_hs_imxrt.h" - void dcd_dcache_clean(void const* addr, uint32_t data_size) { - imxrt_dcache_clean(addr, data_size); + bool dcd_dcache_clean(void const* addr, uint32_t data_size) { + return imxrt_dcache_clean(addr, data_size); } - void dcd_dcache_invalidate(void const* addr, uint32_t data_size) { - imxrt_dcache_invalidate(addr, data_size); + bool dcd_dcache_invalidate(void const* addr, uint32_t data_size) { + return imxrt_dcache_invalidate(addr, data_size); } - void dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { - imxrt_dcache_clean_invalidate(addr, data_size); + bool dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { + return imxrt_dcache_clean_invalidate(addr, data_size); } -#else - -#if TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) +#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) #include "ci_hs_lpc18_43.h" #elif TU_CHECK_MCU(OPT_MCU_MCXN9) // MCX N9 only port 1 use this controller #include "ci_hs_mcx.h" + #else #error "Unsupported MCUs" #endif - TU_ATTR_WEAK void dcd_dcache_clean(void const* addr, uint32_t data_size) { - (void) addr; (void) data_size; - } - - TU_ATTR_WEAK void dcd_dcache_invalidate(void const* addr, uint32_t data_size) { - (void) addr; (void) data_size; - } - - TU_ATTR_WEAK void dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { - (void) addr; (void) data_size; - } -#endif - //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index 6c7b94778..8a9d06bc2 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -83,22 +83,19 @@ CFG_TUD_MEM_SECTION static struct { // DMA //-------------------------------------------------------------------- #if CFG_TUD_MEM_DCACHE_ENABLE -void dcd_dcache_clean(const void* addr, uint32_t data_size) { - if (addr && data_size) { - dwc2_dcache_clean(addr, data_size); - } +bool dcd_dcache_clean(const void* addr, uint32_t data_size) { + TU_VERIFY(addr && data_size); + return dwc2_dcache_clean(addr, data_size); } -void dcd_dcache_invalidate(const void* addr, uint32_t data_size) { - if (addr && data_size) { - dwc2_dcache_invalidate(addr, data_size); - } +bool dcd_dcache_invalidate(const void* addr, uint32_t data_size) { + TU_VERIFY(addr && data_size); + return dwc2_dcache_invalidate(addr, data_size); } -void dcd_dcache_clean_invalidate(const void* addr, uint32_t data_size) { - if (addr && data_size) { - dwc2_dcache_clean_invalidate(addr, data_size); - } +bool dcd_dcache_clean_invalidate(const void* addr, uint32_t data_size) { + TU_VERIFY(addr && data_size); + return dwc2_dcache_clean_invalidate(addr, data_size); } #endif diff --git a/src/portable/synopsys/dwc2/dwc2_esp32.h b/src/portable/synopsys/dwc2/dwc2_esp32.h index 6220716d3..ddbfd0d10 100644 --- a/src/portable/synopsys/dwc2/dwc2_esp32.h +++ b/src/portable/synopsys/dwc2/dwc2_esp32.h @@ -130,22 +130,22 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t round_up_to_cache_line_size(uint32_ return size; } -TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcache_clean(const void* addr, uint32_t data_size) { +TU_ATTR_ALWAYS_INLINE static inline bool dwc2_dcache_clean(const void* addr, uint32_t data_size) { const int flag = ESP_CACHE_MSYNC_FLAG_TYPE_DATA | ESP_CACHE_MSYNC_FLAG_DIR_C2M; data_size = round_up_to_cache_line_size(data_size); - assert(ESP_OK == esp_cache_msync((void*)addr, data_size, flag)); + return ESP_OK == esp_cache_msync((void*)addr, data_size, flag); } -TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcache_invalidate(const void* addr, uint32_t data_size) { +TU_ATTR_ALWAYS_INLINE static inline bool dwc2_dcache_invalidate(const void* addr, uint32_t data_size) { const int flag = ESP_CACHE_MSYNC_FLAG_TYPE_DATA | ESP_CACHE_MSYNC_FLAG_DIR_M2C; data_size = round_up_to_cache_line_size(data_size); - assert(ESP_OK == esp_cache_msync((void*)addr, data_size, flag)); + return ESP_OK == esp_cache_msync((void*)addr, data_size, flag); } -TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcache_clean_invalidate(const void* addr, uint32_t data_size) { +TU_ATTR_ALWAYS_INLINE static inline bool dwc2_dcache_clean_invalidate(const void* addr, uint32_t data_size) { const int flag = ESP_CACHE_MSYNC_FLAG_TYPE_DATA | ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_DIR_M2C; data_size = round_up_to_cache_line_size(data_size); - assert(ESP_OK == esp_cache_msync((void*)addr, data_size, flag)); + return ESP_OK == esp_cache_msync((void*)addr, data_size, flag); } #endif |
