Merge branch 'master' into fork/ArcaneNibble/ohci-upstream

27 files changed, 360 insertions, 151 deletions

diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h
index 87659701b..719bdeafc 100644
--- a/src/portable/ehci/ehci.h
+++ b/src/portable/ehci/ehci.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_EHCI_H_
-#define _TUSB_EHCI_H_
+#ifndef TUSB_EHCI_H_
+#define TUSB_EHCI_H_
 
 
 /* Abbreviation
@@ -458,4 +458,4 @@ TU_VERIFY_STATIC(sizeof(ehci_cap_registers_t) == 16, "size is not correct");
  }
 #endif
 
-#endif /* _TUSB_EHCI_H_ */
+#endif /* TUSB_EHCI_H_ */
diff --git a/src/portable/ehci/ehci_api.h b/src/portable/ehci/ehci_api.h
index 12e0a73d7..79fbe702a 100644
--- a/src/portable/ehci/ehci_api.h
+++ b/src/portable/ehci/ehci_api.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_EHCI_API_H_
-#define _TUSB_EHCI_API_H_
+#ifndef TUSB_EHCI_API_H_
+#define TUSB_EHCI_API_H_
 
 #ifdef __cplusplus
  extern "C" {
diff --git a/src/portable/mentor/musb/musb_max32.h b/src/portable/mentor/musb/musb_max32.h
index 35849b5f8..599de2ca1 100644
--- a/src/portable/mentor/musb/musb_max32.h
+++ b/src/portable/mentor/musb/musb_max32.h
@@ -31,7 +31,17 @@
 extern "C" {
 #endif
 
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wredundant-decls"
+#endif
+
 #include "mxc_device.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 #include "usbhs_regs.h"
 
 #define MUSB_CFG_SHARED_FIFO   1 // shared FIFO for TX and RX endpoints
diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c
index 357aa1549..e43439f2a 100644
--- a/src/portable/microchip/samd/dcd_samd.c
+++ b/src/portable/microchip/samd/dcd_samd.c
@@ -26,10 +26,7 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED && \
-    (CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \
-     CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X || \
-     CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21)
+#if CFG_TUD_ENABLED && TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAMD21, OPT_MCU_SAML2X, OPT_MCU_SAMD51, OPT_MCU_SAME5X)
 
 #include "sam.h"
 #include "device/dcd.h"
@@ -106,10 +103,8 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   return true;
 }
 
-#if CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X
-
-void dcd_int_enable(uint8_t rhport)
-{
+#if TU_CHECK_MCU(OPT_MCU_SAMD51, OPT_MCU_SAME5X)
+void dcd_int_enable(uint8_t rhport) {
   (void) rhport;
   NVIC_EnableIRQ(USB_0_IRQn);
   NVIC_EnableIRQ(USB_1_IRQn);
@@ -117,8 +112,7 @@ void dcd_int_enable(uint8_t rhport)
   NVIC_EnableIRQ(USB_3_IRQn);
 }
 
-void dcd_int_disable(uint8_t rhport)
-{
+void dcd_int_disable(uint8_t rhport) {
   (void) rhport;
   NVIC_DisableIRQ(USB_3_IRQn);
   NVIC_DisableIRQ(USB_2_IRQn);
@@ -126,17 +120,13 @@ void dcd_int_disable(uint8_t rhport)
   NVIC_DisableIRQ(USB_0_IRQn);
 }
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \
-      CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21
-
-void dcd_int_enable(uint8_t rhport)
-{
+#elif TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAMD21, OPT_MCU_SAML2X)
+void dcd_int_enable(uint8_t rhport) {
   (void) rhport;
   NVIC_EnableIRQ(USB_IRQn);
 }
 
-void dcd_int_disable(uint8_t rhport)
-{
+void dcd_int_disable(uint8_t rhport) {
   (void) rhport;
   NVIC_DisableIRQ(USB_IRQn);
 }
diff --git a/src/portable/microchip/samd/hcd_samd.c b/src/portable/microchip/samd/hcd_samd.c
index 1f4b2b233..0de7ddeb6 100644
--- a/src/portable/microchip/samd/hcd_samd.c
+++ b/src/portable/microchip/samd/hcd_samd.c
@@ -26,11 +26,8 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUH_ENABLED && \
-    !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421) &&                     \
-    (CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21  || \
-     CFG_TUSB_MCU == OPT_MCU_SAMD51 ||  CFG_TUSB_MCU == OPT_MCU_SAME5X || \
-     CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21)
+#if CFG_TUH_ENABLED && !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421) && \
+    TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAMD21, OPT_MCU_SAML2X, OPT_MCU_SAMD51, OPT_MCU_SAME5X)
 
 #include "host/hcd.h"
 #include "sam.h"
@@ -428,7 +425,7 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   return true;
 }
 
-#if CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X
+#if TU_CHECK_MCU(OPT_MCU_SAMD51, OPT_MCU_SAME5X)
 
 // Enable USB interrupt
 void hcd_int_enable(uint8_t rhport)
@@ -450,8 +447,7 @@ void hcd_int_disable(uint8_t rhport)
   NVIC_DisableIRQ(USB_0_IRQn);
 }
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \
-      CFG_TUSB_MCU == OPT_MCU_SAML22 ||  CFG_TUSB_MCU == OPT_MCU_SAML21
+#elif TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAMD21, OPT_MCU_SAML2X)
 
 // Enable USB interrupt
 void hcd_int_enable(uint8_t rhport)
diff --git a/src/portable/nuvoton/nuc120/dcd_nuc120.c b/src/portable/nuvoton/nuc120/dcd_nuc120.c
index b0b6fe857..0edebf159 100644
--- a/src/portable/nuvoton/nuc120/dcd_nuc120.c
+++ b/src/portable/nuvoton/nuc120/dcd_nuc120.c
@@ -275,6 +275,19 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   return true;
 }
 
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false; // TODO not implemented yet
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false; // TODO not implemented yet
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
diff --git a/src/portable/nuvoton/nuc121/dcd_nuc121.c b/src/portable/nuvoton/nuc121/dcd_nuc121.c
index f4af97ca7..804a35565 100644
--- a/src/portable/nuvoton/nuc121/dcd_nuc121.c
+++ b/src/portable/nuvoton/nuc121/dcd_nuc121.c
@@ -38,8 +38,18 @@
 #if CFG_TUD_ENABLED && ( (CFG_TUSB_MCU == OPT_MCU_NUC121) || (CFG_TUSB_MCU == OPT_MCU_NUC126) )
 
 #include "device/dcd.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wredundant-decls"
+#endif
+
 #include "NuMicro.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 // Since TinyUSB doesn't use SOF for now, and this interrupt too often (1ms interval)
 // We disable SOF for now until needed later on
 #ifndef USE_SOF
@@ -293,8 +303,9 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   /* construct USB Configuration Register value and then write it */
   uint32_t cfg = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
   cfg |= (TUSB_DIR_IN == dir) ? USBD_CFG_EPMODE_IN : USBD_CFG_EPMODE_OUT;
-  if (TUSB_XFER_ISOCHRONOUS == type)
+  if (TUSB_XFER_ISOCHRONOUS == type) {
     cfg |= USBD_CFG_TYPE_ISO;
+  }
   ep->CFG = cfg;
 
   /* make a note of the endpoint size */
@@ -303,6 +314,19 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   return true;
 }
 
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false; // TODO not implemented yet
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false; // TODO not implemented yet
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c
index 1c98a0a49..6195015ae 100644
--- a/src/portable/nuvoton/nuc505/dcd_nuc505.c
+++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c
@@ -38,8 +38,18 @@
 #if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_NUC505)
 
 #include "device/dcd.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wredundant-decls"
+#endif
+
 #include "NUC505Series.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 /*
  * The DMA functionality of the USBD peripheral does not appear to succeed with
  * transfer lengths that are longer (> 64 bytes) and are not a multiple of 4.
@@ -357,6 +367,19 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   return true;
 }
 
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false; // TODO not implemented yet
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false; // TODO not implemented yet
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
index 654b80866..25c9f9985 100644
--- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
+++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DCD_LPC17_40_H_
-#define _TUSB_DCD_LPC17_40_H_
+#ifndef TUSB_DCD_LPC17_40_H_
+#define TUSB_DCD_LPC17_40_H_
 
 #include "common/tusb_common.h"
 
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index ee89555a3..6d4594450 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -41,13 +41,16 @@
 #include "host/usbh.h"
 #include "ohci.h"
 
-// TODO remove
-#include "chip.h"
+#if defined(TUP_USBIP_OHCI_NXP)
+  #include "ohci_nxp.h"
+#else
+  #error Unsupported OHCI IP
+#endif
 
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
-#define OHCI_REG               ((ohci_registers_t *) LPC_USB_BASE)
+
 
 enum {
   OHCI_CONTROL_FUNCSTATE_RESET = 0,
@@ -194,6 +197,8 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   (void) rhport;
   (void) rh_init;
 
+  ohci_phy_init(rhport);
+
   //------------- Data Structure init -------------//
   tu_memclr(&ohci_data, sizeof(ohci_data_t));
   // assign all interrupt pointers to period head ed
diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h
index a6f31c7a5..d9ebe1d54 100644
--- a/src/portable/ohci/ohci.h
+++ b/src/portable/ohci/ohci.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_OHCI_H_
-#define _TUSB_OHCI_H_
+#ifndef TUSB_OHCI_H_
+#define TUSB_OHCI_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -213,10 +213,10 @@ typedef struct TU_ATTR_ALIGNED(256) {
 //--------------------------------------------------------------------+
 typedef volatile struct
 {
-  uint32_t revision;
+  uint32_t revision;                               // 0x00
 
   union {
-    uint32_t control;
+    uint32_t control;                              // 0x04
     struct {
       uint32_t control_bulk_service_ratio : 2;
       uint32_t periodic_list_enable       : 1;
@@ -232,7 +232,7 @@ typedef volatile struct
   };
 
   union {
-    uint32_t command_status;
+    uint32_t command_status;                       // 0x08
     struct {
       uint32_t controller_reset         : 1;
       uint32_t control_list_filled      : 1;
@@ -243,26 +243,24 @@ typedef volatile struct
     }command_status_bit;
   };
 
-  uint32_t interrupt_status;
-  uint32_t interrupt_enable;
-  uint32_t interrupt_disable;
-
-  uint32_t hcca;
-  uint32_t period_current_ed;
-  uint32_t control_head_ed;
-  uint32_t control_current_ed;
-  uint32_t bulk_head_ed;
-  uint32_t bulk_current_ed;
-  uint32_t done_head;
-
-  uint32_t frame_interval;
-  uint32_t frame_remaining;
-  uint32_t frame_number;
-  uint32_t periodic_start;
-  uint32_t lowspeed_threshold;
+  uint32_t interrupt_status;                       // 0x0C
+  uint32_t interrupt_enable;                       // 0x10
+  uint32_t interrupt_disable;                      // 0x14
+  uint32_t hcca;                                   // 0x18
+  uint32_t period_current_ed;                      // 0x1C
+  uint32_t control_head_ed;                        // 0x20
+  uint32_t control_current_ed;                     // 0x24
+  uint32_t bulk_head_ed;                           // 0x28
+  uint32_t bulk_current_ed;                        // 0x2C
+  uint32_t done_head;                              // 0x30
+  uint32_t frame_interval;                         // 0x34
+  uint32_t frame_remaining;                        // 0x38
+  uint32_t frame_number;                           // 0x3C
+  uint32_t periodic_start;                         // 0x40
+  uint32_t lowspeed_threshold;                     // 0x44
 
   union {
-    uint32_t rh_descriptorA;
+    uint32_t rh_descriptorA;                       // 0x48
     struct {
       uint32_t number_downstream_ports     : 8;
       uint32_t power_switching_mode        : 1;
@@ -276,7 +274,7 @@ typedef volatile struct
   };
 
   union {
-    uint32_t rh_descriptorB;
+    uint32_t rh_descriptorB;                       // 0x4C
     struct {
       uint32_t device_removable        : 16;
       uint32_t port_power_control_mask : 16;
@@ -284,9 +282,9 @@ typedef volatile struct
   };
 
   union {
-    uint32_t rh_status;
+    uint32_t rh_status;                            // 0x50
     struct {
-      uint32_t local_power_status            : 1; // read Local Power Status; write: Clear Global Power
+      uint32_t local_power_status            : 1;  // read Local Power Status; write: Clear Global Power
       uint32_t over_current_indicator        : 1;
       uint32_t                               : 13;
       uint32_t device_remote_wakeup_enable   : 1;
@@ -298,7 +296,8 @@ typedef volatile struct
   };
 
   union {
-    uint32_t rhport_status[TUP_OHCI_RHPORTS];
+    uint32_t rhport_status[TUP_OHCI_RHPORTS];      // 0x54
+
     struct {
       uint32_t current_connect_status             : 1;
       uint32_t port_enable_status                 : 1;
@@ -325,4 +324,4 @@ TU_VERIFY_STATIC( sizeof(ohci_registers_t) == (0x54 + (4 * TUP_OHCI_RHPORTS)), "
  }
 #endif
 
-#endif /* _TUSB_OHCI_H_ */
+#endif /* TUSB_OHCI_H_ */
diff --git a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c b/src/portable/ohci/ohci_nxp.h
index fea3e2a66..9cba05e95 100644
--- a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
+++ b/src/portable/ohci/ohci_nxp.h
@@ -1,7 +1,7 @@
 /*
  * The MIT License (MIT)
  *
- * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -23,26 +23,48 @@
  *
  * This file is part of the TinyUSB stack.
  */
+#ifndef TUSB_OHCI_NXP_H
+#define TUSB_OHCI_NXP_H
 
-#include "tusb_option.h"
-
-#if CFG_TUH_ENABLED && \
-    (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX)
+#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
 
 #include "chip.h"
-#include "host/hcd.h"
-#include "host/usbh.h"
+#define OHCI_REG   ((ohci_registers_t *) LPC_USB_BASE)
 
-void hcd_int_enable(uint8_t rhport)
-{
-  (void) rhport;
+void hcd_int_enable(uint8_t rhport) {
+  (void)rhport;
   NVIC_EnableIRQ(USB_IRQn);
 }
 
-void hcd_int_disable(uint8_t rhport)
-{
-  (void) rhport;
+void hcd_int_disable(uint8_t rhport) {
+  (void)rhport;
   NVIC_DisableIRQ(USB_IRQn);
 }
 
+static void ohci_phy_init(uint8_t rhport) {
+  (void) rhport;
+}
+
+#else
+
+#include "fsl_device_registers.h"
+
+// for LPC55 USB0 controller
+#define OHCI_REG  ((ohci_registers_t *) USBFSH_BASE)
+
+static void ohci_phy_init(uint8_t rhport) {
+  (void) rhport;
+}
+
+void hcd_int_enable(uint8_t rhport) {
+  (void)rhport;
+  NVIC_EnableIRQ(USB0_IRQn);
+}
+
+void hcd_int_disable(uint8_t rhport) {
+  (void)rhport;
+  NVIC_DisableIRQ(USB0_IRQn);
+}
+#endif
+
 #endif
diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
index d59a2b4ee..90eb920e0 100644
--- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
+++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
@@ -29,9 +29,20 @@
 #if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && CFG_TUH_RPI_PIO_USB
 
 #include "pico.h"
+
 #include "pio_usb.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wsign-conversion"
+#endif
+
 #include "pio_usb_ll.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 //--------------------------------------------------------------------+
 // INCLUDE
 //--------------------------------------------------------------------+
diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index dd88f66a7..71837d03c 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_RUSB2_TYPE_H_
-#define _TUSB_RUSB2_TYPE_H_
+#ifndef TUSB_RUSB2_TYPE_H_
+#define TUSB_RUSB2_TYPE_H_
 
 #include <stdint.h>
 #include <stddef.h>
@@ -1777,4 +1777,4 @@ TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DPUSR1R_FS ) == 0x0404, "incorrect offset
 }
 #endif
 
-#endif /* _TUSB_RUSB2_TYPE_H_ */
+#endif /* TUSB_RUSB2_TYPE_H_ */
diff --git a/src/portable/sony/cxd56/dcd_cxd56.c b/src/portable/sony/cxd56/dcd_cxd56.c
index b16509c6f..a13cd152c 100644
--- a/src/portable/sony/cxd56/dcd_cxd56.c
+++ b/src/portable/sony/cxd56/dcd_cxd56.c
@@ -339,6 +339,19 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoint_desc)
   return true;
 }
 
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false; // TODO not implemented yet
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false; // TODO not implemented yet
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
diff --git a/src/portable/st/stm32_fsdev/fsdev_at32.h b/src/portable/st/stm32_fsdev/fsdev_at32.h
index f7ee89995..deb1de2a8 100644
--- a/src/portable/st/stm32_fsdev/fsdev_at32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_at32.h
@@ -175,9 +175,9 @@ void dcd_int_enable(uint8_t rhport) {
   // shared USB/CAN IRQs to separate CAN and USB IRQs.
   // This dynamically checks if this remap is active to enable the right IRQs.
   if (CRM->intmap_bit.usbintmap) {
-    NVIC_DisableIRQ(USBFS_MAPH_IRQn);
-    NVIC_DisableIRQ(USBFS_MAPL_IRQn);
-    NVIC_DisableIRQ(USBFSWakeUp_IRQn);
+    NVIC_EnableIRQ(USBFS_MAPH_IRQn);
+    NVIC_EnableIRQ(USBFS_MAPL_IRQn);
+    NVIC_EnableIRQ(USBFSWakeUp_IRQn);
   } else
   #endif
   {
diff --git a/src/portable/sunxi/dcd_sunxi_musb.c b/src/portable/sunxi/dcd_sunxi_musb.c
index 9801a485f..f1f4897cb 100644
--- a/src/portable/sunxi/dcd_sunxi_musb.c
+++ b/src/portable/sunxi/dcd_sunxi_musb.c
@@ -176,7 +176,7 @@ static void USBC_ForceVbusValidToHigh(void)
 	USBC_Writel(reg_val, USBC_REG_ISCR(USBC0_BASE));
 }
 
-void USBC_SelectBus(u32 io_type, u32 ep_type, u32 ep_index)
+static void USBC_SelectBus(u32 io_type, u32 ep_type, u32 ep_index)
 {
 	u32 reg_val = 0;
 
@@ -952,7 +952,7 @@ void dcd_remote_wakeup(uint8_t rhport)
 {
   (void)rhport;
   USBC_REG_set_bit_b(USBC_BP_POWER_D_RESUME, USBC_REG_PCTL(USBC0_BASE));
-  delay_ms(10);
+  tusb_time_delay_ms_api(10);
   USBC_REG_clear_bit_b(USBC_BP_POWER_D_RESUME, USBC_REG_PCTL(USBC0_BASE));
 }
 
diff --git a/src/portable/sunxi/musb_def.h b/src/portable/sunxi/musb_def.h
index 53da5ded2..ce9b89d55 100644
--- a/src/portable/sunxi/musb_def.h
+++ b/src/portable/sunxi/musb_def.h
@@ -26,8 +26,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_MUSB_DEF
-#define _TUSB_MUSB_DEF
+#ifndef TUSB_MUSB_DEF
+#define TUSB_MUSB_DEF
 
 
 #define  USBC_Readb(reg)	                    (*(volatile unsigned char *)(reg))
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index f10f0bdc3..1b43b9ac4 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -77,6 +77,7 @@ CFG_TUD_MEM_SECTION static struct {
 
 TU_ATTR_ALWAYS_INLINE static inline uint8_t dwc2_ep_count(const dwc2_regs_t* dwc2) {
   #if TU_CHECK_MCU(OPT_MCU_GD32VF103)
+  (void) dwc2;
   return DWC2_EP_MAX;
   #else
   const dwc2_ghwcfg2_t ghwcfg2 = {.value = dwc2->ghwcfg2};
@@ -168,7 +169,7 @@ static void dma_setup_prepare(uint8_t rhport) {
   - All EP OUT shared a unique OUT FIFO which uses (for Slave or Buffer DMA, Scatt/Gather DMA use different formula):
     - 13 for setup packets + control words (up to 3 setup packets).
     - 1 for global NAK (not required/used here).
-    - Largest-EPsize/4 + 1. ( FS: 64 bytes, HS: 512 bytes). Recommended is  "2 x (Largest-EPsize/4 + 1)"
+    - Largest-EPsize/4 + 1. (FS: 64 bytes, HS: 512 bytes). Recommended is  "2 x (Largest-EPsize/4 + 1)"
     - 2 for each used OUT endpoint
 
     Therefore GRXFSIZ = 13 + 1 + 2 x (Largest-EPsize/4 + 1) + 2 x EPOUTnum
@@ -282,8 +283,7 @@ static void edpt_disable(uint8_t rhport, uint8_t ep_addr, bool stall) {
   dwc2_dep_t* dep = &dwc2->ep[dir == TUSB_DIR_IN ? 0 : 1][epnum];
 
   if (dir == TUSB_DIR_IN) {
-    // Only disable currently enabled non-control endpoint
-    if ((epnum == 0) || !(dep->diepctl & DIEPCTL_EPENA)) {
+    if (!(dep->diepctl & DIEPCTL_EPENA)) {
       dep->diepctl |= DIEPCTL_SNAK | (stall ? DIEPCTL_STALL : 0);
     } else {
       // Stop transmitting packets and NAK IN xfers.
@@ -379,7 +379,7 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin
 
     // Enable tx fifo empty interrupt only if there is data. Note must after depctl enable
     if (dir == TUSB_DIR_IN && total_bytes != 0) {
-      dwc2->diepempmsk |= (1 << epnum);
+      dwc2->diepempmsk |= (1u << epnum);
     }
   }
 }
@@ -402,7 +402,7 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   // Set device max speed
   uint32_t dcfg = dwc2->dcfg & ~DCFG_DSPD_Msk;
   if (is_highspeed) {
-    dcfg |= DCFG_DSPD_HS << DCFG_DSPD_Pos;
+    // dcfg Highspeed's mask is 0
 
     // XCVRDLY: transceiver delay between xcvr_sel and txvalid during device chirp is required
     // when using with some PHYs such as USB334x (USB3341, USB3343, USB3346, USB3347)
@@ -701,12 +701,23 @@ static void handle_bus_reset(uint8_t rhport) {
   dcfg.address = 0;
   dwc2->dcfg = dcfg.value;
 
-  // Fixed both control EP0 size to 64 bytes
-  dwc2->epin[0].ctl &= ~(0x03 << DIEPCTL_MPSIZ_Pos);
-  dwc2->epout[0].ctl &= ~(0x03 << DOEPCTL_MPSIZ_Pos);
+  // 6. Configure maximum packet size for EP0
+  uint8_t mps = 0;
+  switch (CFG_TUD_ENDPOINT0_SIZE) {
+    case 8: mps = 3; break;
+    case 16: mps = 2; break;
+    case 32: mps = 1; break;
+    case 64: mps = 0; break;
+    default: mps = 0; break;
+  }
 
-  xfer_status[0][TUSB_DIR_OUT].max_size = 64;
-  xfer_status[0][TUSB_DIR_IN].max_size = 64;
+  dwc2->epin[0].ctl &= ~DIEPCTL0_MPSIZ_Msk;
+  dwc2->epout[0].ctl &= ~DOEPCTL0_MPSIZ_Msk;
+  dwc2->epin[0].ctl |= mps << DIEPCTL0_MPSIZ_Pos;
+  dwc2->epout[0].ctl |= mps << DOEPCTL0_MPSIZ_Pos;
+
+  xfer_status[0][TUSB_DIR_OUT].max_size = CFG_TUD_ENDPOINT0_SIZE;
+  xfer_status[0][TUSB_DIR_IN].max_size = CFG_TUD_ENDPOINT0_SIZE;
 
   if(dma_device_enabled(dwc2)) {
     dma_setup_prepare(rhport);
@@ -804,17 +815,18 @@ static void handle_rxflvl_irq(uint8_t rhport) {
           dfifo_read_packet(dwc2, xfer->buffer, byte_count);
           xfer->buffer += byte_count;
         }
+      }
 
-        // short packet, minus remaining bytes (xfer_size)
-        if (byte_count < xfer->max_size) {
-          const dwc2_ep_tsize_t tsiz = {.value = epout->tsiz};
-          xfer->total_len -= tsiz.xfer_size;
-          if (epnum == 0) {
-            xfer->total_len -= _dcd_data.ep0_pending[TUSB_DIR_OUT];
-            _dcd_data.ep0_pending[TUSB_DIR_OUT] = 0;
-          }
+      // short packet (including ZLP when byte_count == 0), minus remaining bytes (xfer_size)
+      if (byte_count < xfer->max_size) {
+        const dwc2_ep_tsize_t tsiz = {.value = epout->tsiz};
+        xfer->total_len -= tsiz.xfer_size;
+        if (epnum == 0) {
+          xfer->total_len -= _dcd_data.ep0_pending[TUSB_DIR_OUT];
+          _dcd_data.ep0_pending[TUSB_DIR_OUT] = 0;
         }
       }
+
       break;
     }
 
@@ -830,6 +842,11 @@ static void handle_rxflvl_irq(uint8_t rhport) {
 
 static void handle_epout_slave(uint8_t rhport, uint8_t epnum, dwc2_doepint_t doepint_bm) {
   if (doepint_bm.setup_phase_done) {
+    // Cleanup previous pending EP0 IN transfer if any
+    dwc2_dep_t* epin0 = &DWC2_REG(rhport)->epin[0];
+    if (epin0->diepctl & DIEPCTL_EPENA) {
+      edpt_disable(rhport, 0x80, false);
+    }
     dcd_event_setup_received(rhport, _dcd_usbbuf.setup_packet, true);
     return;
   }
@@ -897,7 +914,7 @@ static void handle_epin_slave(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diep
     // Turn off TXFE if all bytes are written.
     tsiz.value = epin->tsiz;
     if (tsiz.xfer_size == 0) {
-      dwc2->diepempmsk &= ~(1 << epnum);
+      dwc2->diepempmsk &= ~(1u << epnum);
     }
   }
 }
@@ -908,6 +925,11 @@ static void handle_epout_dma(uint8_t rhport, uint8_t epnum, dwc2_doepint_t doepi
   dwc2_regs_t* dwc2 = DWC2_REG(rhport);
 
   if (doepint_bm.setup_phase_done) {
+    // Cleanup previous pending EP0 IN transfer if any
+    dwc2_dep_t* epin0 = &DWC2_REG(rhport)->epin[0];
+    if (epin0->diepctl & DIEPCTL_EPENA) {
+      edpt_disable(rhport, 0x80, false);
+    }
     dma_setup_prepare(rhport);
     dcd_dcache_invalidate(_dcd_usbbuf.setup_packet, 8);
     dcd_event_setup_received(rhport, _dcd_usbbuf.setup_packet, true);
@@ -1032,6 +1054,8 @@ void dcd_int_handler(uint8_t rhport) {
   if (gintsts & GINTSTS_ENUMDNE) {
     // ENUMDNE is the end of reset where speed of the link is detected
     dwc2->gintsts = GINTSTS_ENUMDNE;
+    // There may be a pending suspend event, so we clear it first
+    dwc2->gintsts = GINTSTS_USBSUSP;
     dwc2->gintmsk |= GINTMSK_USBSUSPM;
     handle_enum_done(rhport);
   }
diff --git a/src/portable/synopsys/dwc2/dwc2_at32.h b/src/portable/synopsys/dwc2/dwc2_at32.h
index 37b6592c4..513495eb1 100644
--- a/src/portable/synopsys/dwc2/dwc2_at32.h
+++ b/src/portable/synopsys/dwc2/dwc2_at32.h
@@ -64,58 +64,59 @@
 #endif
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
- static const dwc2_controller_t _dwc2_controller[] = {
-{.reg_base = DWC2_OTG1_REG_BASE, .irqnum = OTG1_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = OTG1_FIFO_SIZE},
+static const dwc2_controller_t _dwc2_controller[] = {
+    {.reg_base = DWC2_OTG1_REG_BASE, .irqnum = OTG1_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = OTG1_FIFO_SIZE},
 #if defined DWC2_OTG2_REG_BASE
-  {.reg_base = DWC2_OTG2_REG_BASE, .irqnum = OTG2_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = OTG2_FIFO_SIZE}
+    {.reg_base = DWC2_OTG2_REG_BASE, .irqnum = OTG2_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = OTG2_FIFO_SIZE}
 #endif
- };
+};
 
- TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_t role, bool enabled) {
-   (void) role;
-   const IRQn_Type irqn = (IRQn_Type) _dwc2_controller[rhport].irqnum;
-   if (enabled) {
-     NVIC_EnableIRQ(irqn);
-   } else {
-     NVIC_DisableIRQ(irqn);
-   }
- }
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_t role, bool enabled) {
+  (void) role;
+  const IRQn_Type irqn = (IRQn_Type) _dwc2_controller[rhport].irqnum;
+  if (enabled) {
+    NVIC_EnableIRQ(irqn);
+  } else {
+    NVIC_DisableIRQ(irqn);
+  }
+}
 
- TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) { NVIC_EnableIRQ(_dwc2_controller[rhport].irqnum);
- }
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) {
+  NVIC_EnableIRQ(_dwc2_controller[rhport].irqnum);
+}
 
- TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_disable(uint8_t rhport) {
-   NVIC_DisableIRQ(_dwc2_controller[rhport].irqnum);
- }
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_disable(uint8_t rhport) {
+  NVIC_DisableIRQ(_dwc2_controller[rhport].irqnum);
+}
 
- TU_ATTR_ALWAYS_INLINE static inline void dwc2_remote_wakeup_delay(void) {
-   // try to delay for 1 ms
-   uint32_t count = system_core_clock / 1000;
-   while (count--) __asm volatile("nop");
- }
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_remote_wakeup_delay(void) {
+  // try to delay for 1 ms
+  uint32_t count = system_core_clock / 1000;
+  while (count--) __asm volatile("nop");
+}
 
- // MCU specific PHY init, called BEFORE core reset
- TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_init(dwc2_regs_t *dwc2, uint8_t hs_phy_type) {
-   (void) dwc2;
-   // Enable on-chip HS PHY
-   if (hs_phy_type == GHWCFG2_HSPHY_UTMI || hs_phy_type == GHWCFG2_HSPHY_UTMI_ULPI) {
-   } else if (hs_phy_type == GHWCFG2_HSPHY_NOT_SUPPORTED) {
-   }
- }
+// MCU specific PHY init, called BEFORE core reset
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_init(dwc2_regs_t *dwc2, uint8_t hs_phy_type) {
+  (void) dwc2;
+  // Enable on-chip HS PHY
+  if (hs_phy_type == GHWCFG2_HSPHY_UTMI || hs_phy_type == GHWCFG2_HSPHY_UTMI_ULPI) {
+  } else if (hs_phy_type == GHWCFG2_HSPHY_NOT_SUPPORTED) {
+  }
+}
 
- // MCU specific PHY update, it is called AFTER init() and core reset
- TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_update(dwc2_regs_t *dwc2, uint8_t hs_phy_type) {
-   (void) dwc2;
-   (void) hs_phy_type;
+// MCU specific PHY update, it is called AFTER init() and core reset
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_update(dwc2_regs_t *dwc2, uint8_t hs_phy_type) {
+  (void) dwc2;
+  (void) hs_phy_type;
 
-   dwc2->stm32_gccfg |= STM32_GCCFG_PWRDWN | STM32_GCCFG_DCDEN | STM32_GCCFG_PDEN;
- }
+  dwc2->stm32_gccfg |= STM32_GCCFG_PWRDWN | STM32_GCCFG_DCDEN | STM32_GCCFG_PDEN;
+}
 
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* DWC2_GD32_H_ */
+#endif /* DWC2_AT32_H_ */
diff --git a/src/portable/synopsys/dwc2/dwc2_bcm.h b/src/portable/synopsys/dwc2/dwc2_bcm.h
index e5824606a..df6d4a852 100644
--- a/src/portable/synopsys/dwc2/dwc2_bcm.h
+++ b/src/portable/synopsys/dwc2/dwc2_bcm.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DWC2_BCM_H_
-#define _TUSB_DWC2_BCM_H_
+#ifndef TUSB_DWC2_BCM_H_
+#define TUSB_DWC2_BCM_H_
 
 #ifdef __cplusplus
  extern "C" {
diff --git a/src/portable/synopsys/dwc2/dwc2_common.h b/src/portable/synopsys/dwc2/dwc2_common.h
index 33219f786..0166b0261 100644
--- a/src/portable/synopsys/dwc2/dwc2_common.h
+++ b/src/portable/synopsys/dwc2/dwc2_common.h
@@ -51,6 +51,8 @@
   #include "dwc2_xmc.h"
 #elif defined(TUP_USBIP_DWC2_AT32)
   #include "dwc2_at32.h"
+#elif defined(TUP_USBIP_DWC2_NRF)
+  #include "dwc2_nrf.h"
 #else
   #error "Unsupported MCUs"
 #endif
diff --git a/src/portable/synopsys/dwc2/dwc2_nrf.h b/src/portable/synopsys/dwc2/dwc2_nrf.h
new file mode 100644
index 000000000..b93571f16
--- /dev/null
+++ b/src/portable/synopsys/dwc2/dwc2_nrf.h
@@ -0,0 +1,61 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef TUSB_DWC2_NRF_H
+#define TUSB_DWC2_NRF_H
+
+#include "nrf.h"
+
+#define DWC2_EP_MAX 16
+
+static const dwc2_controller_t _dwc2_controller[] = {
+  { .reg_base = NRF_USBHSCORE0_NS_BASE, .irqnum = USBHS_IRQn, .ep_count = 16, .ep_fifo_size = 12288 },
+};
+
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_t role, bool enabled) {
+  (void) rhport;
+  (void) role;
+  (void) enabled;
+}
+
+#define dwc2_dcd_int_enable(_rhport)  dwc2_int_set(_rhport, TUSB_ROLE_DEVICE, true)
+#define dwc2_dcd_int_disable(_rhport) dwc2_int_set(_rhport, TUSB_ROLE_DEVICE, false)
+
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_remote_wakeup_delay(void) {
+}
+
+// MCU specific PHY init, called BEFORE core reset
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_init(dwc2_regs_t* dwc2, uint8_t hs_phy_type) {
+  (void)dwc2;
+  (void)hs_phy_type;
+}
+
+// MCU specific PHY update, it is called AFTER init() and core reset
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_update(dwc2_regs_t* dwc2, uint8_t hs_phy_type) {
+  (void)dwc2;
+  (void)hs_phy_type;
+}
+
+#endif
diff --git a/src/portable/synopsys/dwc2/dwc2_type.h b/src/portable/synopsys/dwc2/dwc2_type.h
index 0a8dacf5f..75643529f 100644
--- a/src/portable/synopsys/dwc2/dwc2_type.h
+++ b/src/portable/synopsys/dwc2/dwc2_type.h
@@ -1847,6 +1847,9 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo   ) == 0x1000, "incorrect size");
 #define HPTXFSIZ_PTXFD                   HPTXFSIZ_PTXFD_Msk                       // Host periodic TxFIFO depth
 
 /********************  Bit definition for DIEPCTL register  ********************/
+#define DIEPCTL0_MPSIZ_Pos               (0U)
+#define DIEPCTL0_MPSIZ_Msk               (0x3UL << DIEPCTL0_MPSIZ_Pos)            // 0x00000003
+#define DIEPCTL0_MPSIZ                   DIEPCTL0_MPSIZ_Msk                       // Maximum packet size(endpoint 0)
 #define DIEPCTL_MPSIZ_Pos                (0U)
 #define DIEPCTL_MPSIZ_Msk                (0x7FFUL << DIEPCTL_MPSIZ_Pos)           // 0x000007FF
 #define DIEPCTL_MPSIZ                    DIEPCTL_MPSIZ_Msk                        // Maximum packet size
@@ -2155,6 +2158,9 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo   ) == 0x1000, "incorrect size");
 #define EPCTL_EPENA                    EPCTL_EPENA_Msk                        // Endpoint enable
 
 /********************  Bit definition for DOEPCTL register  ********************/
+#define DOEPCTL0_MPSIZ_Pos               (0U)
+#define DOEPCTL0_MPSIZ_Msk               (0x3UL << DOEPCTL0_MPSIZ_Pos)            // 0x00000003
+#define DOEPCTL0_MPSIZ                   DOEPCTL0_MPSIZ_Msk                       // Maximum packet size(endpoint 0)
 #define DOEPCTL_MPSIZ_Pos                (0U)
 #define DOEPCTL_MPSIZ_Msk                (0x7FFUL << DOEPCTL_MPSIZ_Pos)           // 0x000007FF
 #define DOEPCTL_MPSIZ                    DOEPCTL_MPSIZ_Msk                        // Maximum packet size          //Bit 1
diff --git a/src/portable/synopsys/dwc2/hcd_dwc2.c b/src/portable/synopsys/dwc2/hcd_dwc2.c
index 257fa2833..e4ab16d9d 100644
--- a/src/portable/synopsys/dwc2/hcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/hcd_dwc2.c
@@ -1131,7 +1131,6 @@ static bool handle_channel_out_dma(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hc
   hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
   dwc2_channel_t* channel = &dwc2->channel[ch_id];
   hcd_endpoint_t* edpt = &_hcd_data.edpt[xfer->ep_id];
-  const dwc2_channel_char_t hcchar = {.value = channel->hcchar};
   dwc2_channel_split_t hcsplt = {.value = channel->hcsplt};
 
   bool is_done = false;
diff --git a/src/portable/valentyusb/eptri/dcd_eptri.h b/src/portable/valentyusb/eptri/dcd_eptri.h
index d67635d7c..2fe74a712 100644
--- a/src/portable/valentyusb/eptri/dcd_eptri.h
+++ b/src/portable/valentyusb/eptri/dcd_eptri.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DCD_VALENTYUSB_EPTRI_H_
-#define _TUSB_DCD_VALENTYUSB_EPTRI_H_
+#ifndef TUSB_DCD_VALENTYUSB_EPTRI_H_
+#define TUSB_DCD_VALENTYUSB_EPTRI_H_
 
 #include "common/tusb_common.h"
 #ifdef __cplusplus
@@ -36,4 +36,4 @@
  }
 #endif
 
-#endif /* _TUSB_DCD_VALENTYUSB_EPTRI_H_ */
+#endif /* TUSB_DCD_VALENTYUSB_EPTRI_H_ */
diff --git a/src/portable/wch/hcd_ch32_usbfs.c b/src/portable/wch/hcd_ch32_usbfs.c
index 200136906..7bbf122dd 100644
--- a/src/portable/wch/hcd_ch32_usbfs.c
+++ b/src/portable/wch/hcd_ch32_usbfs.c
@@ -36,7 +36,17 @@
 
 #include "bsp/board_api.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wstrict-prototypes"
+#endif
+
 #include "ch32v20x.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 #include "ch32v20x_usb.h"
 
 #define USBFS_RX_BUF_LEN 64