minor refactor

4 files changed, 53 insertions, 49 deletions

diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index 8be137628..38b00d9d6 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -114,63 +114,61 @@ void tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) {
 // copy data to/from fifo without updating read/write pointers
 //--------------------------------------------------------------------+
 #if CFG_TUSB_FIFO_HWFIFO_API
-  #if CFG_TUSB_FIFO_ACCESS_DATA_STRIDE == 4
+  #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE == 4
     #define stride_unaligned_write tu_unaligned_write32
     #define stride_unaligned_read  tu_unaligned_read32
-typedef uint32_t stride_item_t;
-  #elif CFG_TUSB_FIFO_ACCESS_DATA_STRIDE == 2
+typedef uint32_t hwfifo_item_t;
+  #elif CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE == 2
     #define stride_unaligned_write tu_unaligned_write16
     #define stride_unaligned_read  tu_unaligned_read16
-typedef uint16_t stride_item_t;
+typedef uint16_t hwfifo_item_t;
   #endif
 
 enum {
-  STRIDE_REMAIN_MASK = sizeof(stride_item_t) - 1u
+  STRIDE_REMAIN_MASK = sizeof(hwfifo_item_t) - 1u
 };
 
 void tu_hwfifo_read(const volatile void *hwfifo, uint8_t *dest, uint16_t len) {
-  const volatile stride_item_t *src = (const volatile stride_item_t *)hwfifo;
+  const volatile hwfifo_item_t *src = (const volatile hwfifo_item_t *)hwfifo;
 
   // Reading full available 16/32-bit hwfifo and write to fifo
-  uint16_t n_items = len >> (CFG_TUSB_FIFO_ACCESS_DATA_STRIDE >> 1); // len / data_stride;
-  while (n_items--) {
-    const stride_item_t tmp = *src;
+  while (len >= sizeof(hwfifo_item_t)) {
+    const hwfifo_item_t tmp = *src;
     stride_unaligned_write(dest, tmp);
-    dest += sizeof(stride_item_t);
+    dest += sizeof(hwfifo_item_t);
+    len -= sizeof(hwfifo_item_t);
 
-  #if CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE
-    src = (const volatile stride_item_t *)((uintptr_t)src + CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE);
+  #if CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE
+    src = (const volatile hwfifo_item_t *)((uintptr_t)src + CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE);
   #endif
   }
 
   // Read the remaining 1 byte (16bit) or 1-3 bytes (32bit)
-  const uint8_t bytes_rem = len & STRIDE_REMAIN_MASK;
-  if (bytes_rem) {
-    const stride_item_t tmp = *src;
-    memcpy(dest, &tmp, bytes_rem);
+  if (len > 0) {
+    const hwfifo_item_t tmp = *src;
+    memcpy(dest, &tmp, len);
   }
 }
 
 // Copy from fifo to fixed address buffer (usually a tx register) with TU_FIFO_FIXED_ADDR_RW32 mode
 void tu_hwfifo_write(volatile void *hwfifo, const uint8_t *src, uint16_t len) {
-  volatile stride_item_t *dest = (volatile stride_item_t *)hwfifo;
+  volatile hwfifo_item_t *dest = (volatile hwfifo_item_t *)hwfifo;
 
   // Write full available 16/32 bit words to dest
-  uint16_t n_items = len >> (CFG_TUSB_FIFO_ACCESS_DATA_STRIDE >> 1); // len / data_stride;
-  while (n_items--) {
+  while (len >= sizeof(hwfifo_item_t)) {
     *dest = stride_unaligned_read(src);
-    src += sizeof(stride_item_t);
+    src += sizeof(hwfifo_item_t);
+    len -= sizeof(hwfifo_item_t);
 
-  #if CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE
-    dest = (volatile stride_item_t *)((uintptr_t)dest + CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE);
+  #if CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE
+    dest = (volatile hwfifo_item_t *)((uintptr_t)dest + CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE);
   #endif
   }
 
   // Write the remaining 1 byte (16bit) or 1-3 bytes (32bit)
-  const uint8_t bytes_rem = len & STRIDE_REMAIN_MASK;
-  if (bytes_rem) {
-    stride_item_t tmp = 0u;
-    memcpy(&tmp, src, bytes_rem);
+  if (len > 0) {
+    hwfifo_item_t tmp = 0u;
+    memcpy(&tmp, src, len);
     *dest = tmp;
   }
 }
@@ -185,7 +183,7 @@ static void ff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uint1
 
 #if CFG_TUSB_FIFO_HWFIFO_API
   if (stride_mode) {
-    const volatile stride_item_t *hwfifo = (const volatile stride_item_t *)app_buf;
+    const volatile hwfifo_item_t *hwfifo = (const volatile hwfifo_item_t *)app_buf;
     if (n <= lin_bytes) {
       // Linear only case
       tu_hwfifo_read(hwfifo, ff_buf, n);
@@ -200,8 +198,8 @@ static void ff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uint1
       // There could be odd 1 byte (16bit) or 1-3 bytes (32bit) before the wrap-around boundary
       const uint8_t rem = lin_bytes & STRIDE_REMAIN_MASK;
       if (rem > 0) {
-        const uint8_t       remrem = (uint8_t)tu_min16(wrap_bytes, sizeof(stride_item_t) - rem);
-        const stride_item_t tmp    = *hwfifo;
+        const uint8_t       remrem = (uint8_t)tu_min16(wrap_bytes, sizeof(hwfifo_item_t) - rem);
+        const hwfifo_item_t tmp    = *hwfifo;
         tu_scatter_write32(tmp, ff_buf, rem, f->buffer, remrem);
 
         wrap_bytes -= remrem;
@@ -239,7 +237,7 @@ static void ff_pull_n(const tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd
 
 #if CFG_TUSB_FIFO_HWFIFO_API
   if (stride_mode) {
-    volatile stride_item_t *hwfifo = (volatile stride_item_t *)app_buf;
+    volatile hwfifo_item_t *hwfifo = (volatile hwfifo_item_t *)app_buf;
 
     if (n <= lin_bytes) {
       // Linear only case
@@ -255,8 +253,8 @@ static void ff_pull_n(const tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd
       // There could be odd 1 byte (16bit) or 1-3 bytes (32bit) before the wrap-around boundary
       const uint8_t rem = lin_bytes & STRIDE_REMAIN_MASK;
       if (rem > 0) {
-        const uint8_t       remrem  = (uint8_t)tu_min16(wrap_bytes, sizeof(stride_item_t) - rem);
-        const stride_item_t scatter = (stride_item_t)tu_scatter_read32(ff_buf, rem, f->buffer, remrem);
+        const uint8_t       remrem  = (uint8_t)tu_min16(wrap_bytes, sizeof(hwfifo_item_t) - rem);
+        const hwfifo_item_t scatter = (hwfifo_item_t)tu_scatter_read32(ff_buf, rem, f->buffer, remrem);
 
         *hwfifo = scatter;
 
diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h
index b17f6a1d6..2473a5605 100644
--- a/src/common/tusb_fifo.h
+++ b/src/common/tusb_fifo.h
@@ -43,12 +43,12 @@ extern "C" {
 
 #define CFG_TUSB_FIFO_HWFIFO_API (CFG_TUD_EDPT_DEDICATED_HWFIFO)
 
-#ifndef CFG_TUSB_FIFO_ACCESS_DATA_STRIDE
-  #define CFG_TUSB_FIFO_ACCESS_DATA_STRIDE 0
+#ifndef CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE
+  #define CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE 0
 #endif
 
-#ifndef CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE
-  #define CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE 0
+#ifndef CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE
+  #define CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE 0
 #endif
 
 // Due to the use of unmasked pointers, this FIFO does not suffer from losing
@@ -153,7 +153,7 @@ typedef struct {
 // Moving data from tusb_fifo <-> USB hardware FIFOs e.g. STM32s need to use a special stride mode which reads/writes
 // data in 2/4 byte chunks from/to a fixed address (USB FIFO register) instead of incrementing the address. For this use
 // read/write access_mode with stride_mode = true. The STRIPE DATA and ADDR stride must be configured with
-// CFG_TUSB_FIFO_ACCESS_DATA_STRIDE and CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE
+// CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE and CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE
 
 //--------------------------------------------------------------------+
 // Setup API
@@ -223,7 +223,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_write_n(tu_fifo_t *f, const
 //--------------------------------------------------------------------+
 // Hardware FIFO API
 // Special hardware FIFO/Buffer to hold USB data, usually requires certain access method these can be configured with
-// CFG_TUSB_FIFO_ACCESS_DATA_STRIDE (data width) and CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE (address increment)
+// CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE (data width) and CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE (address increment)
 // Note: these usually has opposiite direction (read/write) to/from our software FIFO  (tu_fifo_t)
 //--------------------------------------------------------------------+
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_hwfifo_write_from_fifo(tu_fifo_t *f, void *hwfifo, uint16_t n) {
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 779c7bc3d..63a6352ac 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -899,7 +899,6 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_
 {
   (void) is_isr;
   // USB buffers always work in bytes so to avoid unnecessary divisions we demand item_size = 1
-  TU_ASSERT(ff->item_size == 1);
   rusb2_reg_t* rusb = RUSB2_REG(rhport);
 
   dcd_int_disable(rhport);
@@ -912,7 +911,9 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_
 void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
 {
   volatile uint16_t *ctr = ep_addr_to_pipectr(rhport, ep_addr);
-  if (!ctr) return;
+  if (!ctr) {
+    return;
+  }
   dcd_int_disable(rhport);
   const uint32_t pid = *ctr & 0x3;
   *ctr = pid | RUSB2_PIPE_CTR_PID_STALL;
@@ -924,7 +925,9 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 {
   rusb2_reg_t * rusb = RUSB2_REG(rhport);
   volatile uint16_t *ctr = ep_addr_to_pipectr(rhport, ep_addr);
-  if (!ctr) return;
+  if (!ctr) {
+    return;
+  }
 
   dcd_int_disable(rhport);
   *ctr = RUSB2_PIPE_CTR_SQCLR_Msk;
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 6129a9532..e22cb7525 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -313,8 +313,8 @@
     #define CFG_TUH_EDPT_DEDICATED_HWFIFO 1
   #endif
 
-  #define CFG_TUSB_FIFO_ACCESS_DATA_STRIDE 4 // 32bit access
-  #define CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE 0 // fixed hwfifo address
+  #define CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE 4 // 32bit access
+  #define CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE 0 // fixed hwfifo address
 #endif
 
 //------------- ChipIdea -------------//
@@ -357,14 +357,14 @@
   #define CFG_TUD_EDPT_DEDICATED_HWFIFO 1
 
   #if FSDEV_PMA_SIZE == 512
-    #define CFG_TUSB_FIFO_ACCESS_DATA_STRIDE 2 // 16-bit data
-    #define CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE 4 // 32-bit address increase
+    #define CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE 2 // 16-bit data
+    #define CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE 4 // 32-bit address increase
   #elif FSDEV_PMA_SIZE == 1024
-    #define CFG_TUSB_FIFO_ACCESS_DATA_STRIDE 2 // 16-bit data
-    #define CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE 2 // 16-bit address increase
+    #define CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE 2 // 16-bit data
+    #define CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE 2 // 16-bit address increase
   #elif FSDEV_PMA_SIZE == 2048
-    #define CFG_TUSB_FIFO_ACCESS_DATA_STRIDE 4 // 32-bit data
-    #define CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE 4 // 32-bit address increase
+    #define CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE 4 // 32-bit data
+    #define CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE 4 // 32-bit address increase
   #endif
 #endif
 
@@ -376,6 +376,9 @@
 //------------ RUSB2 --------------//
 #if defined(TUP_USBIP_RUSB2)
   #define CFG_TUD_EDPT_DEDICATED_HWFIFO 1
+  #define CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE          2 // 16-bit data
+  #define CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE_ODD_BYTE   // support odd byte access
+  #define CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE          0
 #endif
 
 //--------------------------------------------------------------------