diff options
| author | hathach <[email protected]> | 2019-09-01 17:05:34 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2019-09-01 17:05:34 +0700 |
| commit | 074681da8bab89e108f43988b347683812b0be9a (patch) | |
| tree | 27f154a23a1f285ff360eeb23b23cb82ed601da2 /src | |
| parent | aeea6754af258bafa138f6bff894ee2b617c9f13 (diff) | |
dma of lpc54114 can also execute up to 64 bytes each transfer
There is still issue with cdc_msc_hid example
Diffstat (limited to 'src')
| -rw-r--r-- | src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 101698f17..0f0858b1b 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -66,15 +66,15 @@ // 2000 0000 to 203F FFFF #define SRAM_REGION 0x20000000 -/* Although device controller are the same. DMA of - * - M0/M+ can only transfer up to nbytes = 64 - * - M3/M4 can transfer nbytes = 1023 (maximum) +/* Although device controller are the same. Somehow only LPC134x can execute + * DMA with 1023 bytes for Bulk/Control. Others (11u, 51u, 54xxx) can only work + * with max 64 bytes */ enum { - #ifdef __ARM_ARCH_6M__ // Cortex M0/M0+ - DMA_NBYTES_MAX = 64 - #else + #if CFG_TUSB_MCU == OPT_MCU_LPC13XX DMA_NBYTES_MAX = 1023 + #else + DMA_NBYTES_MAX = 64 #endif }; |