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authorhathach <[email protected]>2024-04-23 12:04:08 +0700
committerhathach <[email protected]>2024-04-23 12:04:08 +0700
commit0f3d6c61b563f8776d6e9f90a8b459a513f79fc1 (patch)
tree4514ac2afe88f268b4eb8756c91e3d728104780f /src
parentf76d38c92438284533f02697d34d659583bdd9fd (diff)
port clang stm32: f1, f2, f3
Diffstat (limited to 'src')
-rw-r--r--src/portable/synopsys/dwc2/dcd_dwc2.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index f17d30f06..c2c09a1fc 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -440,11 +440,15 @@ static void reset_core(dwc2_regs_t* dwc2) {
}
static bool phy_hs_supported(dwc2_regs_t* dwc2) {
- // note: esp32 incorrect report its hs_phy_type as utmi
+ (void) dwc2;
+
#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
+ // note: esp32 incorrect report its hs_phy_type as utmi
+ return false;
+#elif !TUD_OPT_HIGH_SPEED
return false;
#else
- return TUD_OPT_HIGH_SPEED && dwc2->ghwcfg2_bm.hs_phy_type != HS_PHY_TYPE_NONE;
+ return dwc2->ghwcfg2_bm.hs_phy_type != HS_PHY_TYPE_NONE;
#endif
}