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authorHiFiPhile <[email protected]>2025-11-11 14:11:20 +0100
committerHiFiPhile <[email protected]>2025-11-11 14:11:20 +0100
commit2f0a35f21af4c09154d6b4b5b118325af8990e51 (patch)
treeb8cb51ecbe4610e2f762193b5ce311b25df97b2e /src
parent1ee47acd9070639043e4fc7ec132574f2922748c (diff)
parent8a094e807b34bcc018c971d59acb660b1a9ddf9f (diff)
Merge remote-tracking branch 'tinyusb/master' into copilot/fix-dcd-edpt-xfer-issue
Signed-off-by: HiFiPhile <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/CMakeLists.txt13
-rw-r--r--src/class/audio/audio.h12
-rw-r--r--src/class/audio/audio_device.c104
-rw-r--r--src/class/audio/audio_device.h20
-rw-r--r--src/class/cdc/cdc.h18
-rw-r--r--src/class/cdc/cdc_device.c23
-rw-r--r--src/class/cdc/cdc_device.h13
-rw-r--r--src/class/cdc/cdc_host.c81
-rw-r--r--src/class/msc/msc_device.c77
-rw-r--r--src/class/msc/msc_host.c27
-rw-r--r--src/class/mtp/mtp.h14
-rw-r--r--src/class/mtp/mtp_device.h10
-rw-r--r--src/class/net/ncm_device.c4
-rw-r--r--src/class/video/video.h10
-rw-r--r--src/class/video/video_device.c184
-rw-r--r--src/common/tusb_common.h70
-rw-r--r--src/common/tusb_compiler.h58
-rw-r--r--src/common/tusb_debug.h7
-rw-r--r--src/common/tusb_fifo.c442
-rw-r--r--src/common/tusb_fifo.h25
-rw-r--r--src/common/tusb_mcu.h5
-rw-r--r--src/common/tusb_private.h25
-rw-r--r--src/common/tusb_types.h10
-rw-r--r--src/common/tusb_verify.h8
-rw-r--r--src/device/dcd.h2
-rw-r--r--src/device/usbd.c126
-rw-r--r--src/device/usbd.h60
-rw-r--r--src/device/usbd_control.c6
-rw-r--r--src/device/usbd_pvt.h9
-rw-r--r--src/host/hcd.h2
-rw-r--r--src/host/usbh.c130
-rw-r--r--src/osal/osal_freertos.h14
-rw-r--r--src/osal/osal_pico.h5
-rw-r--r--src/portable/ehci/ehci.c6
-rw-r--r--src/portable/ohci/ohci.c455
-rw-r--r--src/portable/ohci/ohci.h135
-rw-r--r--src/portable/st/stm32_fsdev/fsdev_stm32.h28
-rw-r--r--src/portable/synopsys/dwc2/dcd_dwc2.c75
-rw-r--r--src/portable/synopsys/dwc2/dwc2_common.c10
-rw-r--r--src/portable/synopsys/dwc2/dwc2_common.h8
-rw-r--r--src/portable/synopsys/dwc2/dwc2_stm32.h4
-rw-r--r--src/portable/synopsys/dwc2/dwc2_type.h2
-rw-r--r--src/tusb.c42
-rw-r--r--src/tusb_option.h7
44 files changed, 1230 insertions, 1156 deletions
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 951683104..48dc75e50 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -1,8 +1,8 @@
cmake_minimum_required(VERSION 3.20)
-# Add tinyusb to a existing target, DCD and HCD drivers are not included
-function(tinyusb_target_add TARGET)
- target_sources(${TARGET} PRIVATE
+# Get TinyUSB sources. Note: DCD and HCD drivers are not included
+function(tinyusb_sources_get OUTPUT_VAR)
+ set(${OUTPUT_VAR}
# common
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tusb.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/common/tusb_fifo.c
@@ -32,7 +32,14 @@ function(tinyusb_target_add TARGET)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_host.c
# typec
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/typec/usbc.c
+ PARENT_SCOPE
)
+endfunction()
+
+# Add tinyusb to a existing target
+function(tinyusb_target_add TARGET)
+ tinyusb_sources_get(TINYUSB_SRC)
+ target_sources(${TARGET} PRIVATE ${TINYUSB_SRC})
target_include_directories(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
# TODO for net driver, should be removed/changed
diff --git a/src/class/audio/audio.h b/src/class/audio/audio.h
index 47d25dd81..cff38cc22 100644
--- a/src/class/audio/audio.h
+++ b/src/class/audio/audio.h
@@ -867,11 +867,11 @@ typedef enum {
// A.2.1 - Audio Class-Audio Data Format Type I UAC2
typedef enum {
- AUDIO20_DATA_FORMAT_TYPE_I_PCM = (uint32_t) (1 << 0),
- AUDIO20_DATA_FORMAT_TYPE_I_PCM8 = (uint32_t) (1 << 1),
- AUDIO20_DATA_FORMAT_TYPE_I_IEEE_FLOAT = (uint32_t) (1 << 2),
- AUDIO20_DATA_FORMAT_TYPE_I_ALAW = (uint32_t) (1 << 3),
- AUDIO20_DATA_FORMAT_TYPE_I_MULAW = (uint32_t) (1 << 4),
+ AUDIO20_DATA_FORMAT_TYPE_I_PCM = 1 << 0,
+ AUDIO20_DATA_FORMAT_TYPE_I_PCM8 = 1 << 1,
+ AUDIO20_DATA_FORMAT_TYPE_I_IEEE_FLOAT = 1 << 2,
+ AUDIO20_DATA_FORMAT_TYPE_I_ALAW = 1 << 3,
+ AUDIO20_DATA_FORMAT_TYPE_I_MULAW = 1 << 4,
AUDIO20_DATA_FORMAT_TYPE_I_RAW_DATA = 0x80000000u,
} audio20_data_format_type_I_t;
@@ -905,7 +905,7 @@ typedef enum {
AUDIO20_CHANNEL_CONFIG_BOTTOM_CENTER = 0x01000000,
AUDIO20_CHANNEL_CONFIG_BACK_LEFT_OF_CENTER = 0x02000000,
AUDIO20_CHANNEL_CONFIG_BACK_RIGHT_OF_CENTER = 0x04000000,
- AUDIO20_CHANNEL_CONFIG_RAW_DATA = 0x80000000,
+ AUDIO20_CHANNEL_CONFIG_RAW_DATA = 0x80000000u,
} audio20_channel_config_t;
/// All remaining definitions are taken from the descriptor descriptions in the UAC2 main specification
diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 731834357..1dda8af99 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -217,6 +217,7 @@ typedef struct
uint16_t ep_in_sz; // Current size of TX EP
uint8_t ep_in_as_intf_num;// Corresponding Standard AS Interface Descriptor (4.9.1) belonging to output terminal to which this EP belongs - 0 is invalid (this fits to UAC2 specification since AS interfaces can not have interface number equal to zero)
uint8_t ep_in_alt; // Current alternate setting of TX EP
+ uint16_t ep_in_fifo_threshold;// Target size for the EP IN FIFO.
#endif
#if CFG_TUD_AUDIO_ENABLE_EP_OUT
@@ -269,10 +270,6 @@ typedef struct
uint16_t packet_sz_tx[3];
uint8_t bclock_id_tx;
uint8_t interval_tx;
-#endif
-
-// Encoding parameters - parameters are set when alternate AS interface is set by host
-#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
uint8_t format_type_tx;
uint8_t n_channels_tx;
uint8_t n_bytes_per_sample_tx;
@@ -455,7 +452,7 @@ static inline uint8_t audiod_get_audio_fct_idx(audiod_function_t *audio);
#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
static void audiod_parse_flow_control_params(audiod_function_t *audio, uint8_t const *p_desc);
static bool audiod_calc_tx_packet_sz(audiod_function_t *audio);
-static uint16_t audiod_tx_packet_size(const uint16_t *norminal_size, uint16_t data_count, uint16_t fifo_depth, uint16_t max_size);
+static uint16_t audiod_tx_packet_size(const uint16_t *nominal_size, uint16_t data_count, uint16_t fifo_depth, uint16_t fifo_threshold, uint16_t max_size);
#endif
#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
@@ -503,7 +500,7 @@ static bool audiod_rx_xfer_isr(uint8_t rhport, audiod_function_t* audio, uint16_
#if USE_LINEAR_BUFFER_RX
// Data currently is in linear buffer, copy into EP OUT FIFO
- TU_VERIFY(tu_fifo_write_n(&audio->ep_out_ff, audio->lin_buf_out, n_bytes_received));
+ TU_VERIFY(0 < tu_fifo_write_n(&audio->ep_out_ff, audio->lin_buf_out, n_bytes_received));
// Schedule for next receive
TU_VERIFY(usbd_edpt_xfer(rhport, audio->ep_out, audio->lin_buf_out, audio->ep_out_sz, true));
@@ -549,6 +546,17 @@ tu_fifo_t *tud_audio_n_get_ep_in_ff(uint8_t func_id) {
return NULL;
}
+uint16_t tud_audio_n_get_ep_in_fifo_threshold(uint8_t func_id) {
+ if (func_id < CFG_TUD_AUDIO) return _audiod_fct[func_id].ep_in_fifo_threshold;
+ return 0;
+}
+
+void tud_audio_n_set_ep_in_fifo_threshold(uint8_t func_id, uint16_t threshold) {
+ if (func_id < CFG_TUD_AUDIO && threshold < _audiod_fct[func_id].ep_in_ff.depth) {
+ _audiod_fct[func_id].ep_in_fifo_threshold = threshold;
+ }
+}
+
static bool audiod_tx_xfer_isr(uint8_t rhport, audiod_function_t * audio, uint16_t n_bytes_sent) {
uint8_t idx_audio_fct = audiod_get_audio_fct_idx(audio);
@@ -560,7 +568,7 @@ static bool audiod_tx_xfer_isr(uint8_t rhport, audiod_function_t * audio, uint16
#if CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
// packet_sz_tx is based on total packet size, here we want size for each support buffer.
- n_bytes_tx = audiod_tx_packet_size(audio->packet_sz_tx, tu_fifo_count(&audio->ep_in_ff), audio->ep_in_ff.depth, audio->ep_in_sz);
+ n_bytes_tx = audiod_tx_packet_size(audio->packet_sz_tx, tu_fifo_count(&audio->ep_in_ff), audio->ep_in_ff.depth, audio->ep_in_fifo_threshold, audio->ep_in_sz);
#else
n_bytes_tx = tu_min16(tu_fifo_count(&audio->ep_in_ff), audio->ep_in_sz);// Limit up to max packet size, more can not be done for ISO
#endif
@@ -630,19 +638,6 @@ static inline bool audiod_fb_send(uint8_t func_id, bool is_isr) {
*audio->fb_buf = audio->feedback.value;
}
- // About feedback format on FS
- //
- // 3 variables: Format | packetSize | sendSize | Working OS:
- // 16.16 4 4 Linux, Windows
- // 16.16 4 3 Linux
- // 16.16 3 4 Linux
- // 16.16 3 3 Linux
- // 10.14 4 4 Linux
- // 10.14 4 3 Linux
- // 10.14 3 4 Linux, OSX
- // 10.14 3 3 Linux, OSX
- //
- // We send 3 bytes since sending packet larger than wMaxPacketSize is pretty ugly
return usbd_edpt_xfer(audio->rhport, audio->ep_fb, (uint8_t *) audio->fb_buf, uac_version == 1 ? 3 : 4, is_isr);
}
@@ -672,8 +667,12 @@ uint32_t tud_audio_feedback_update(uint8_t func_id, uint32_t cycles) {
// The size of isochronous packets created by the device must be within the limits specified in FMT-2.0 section 2.3.1.1.
// This means that the deviation of actual packet size from nominal size must not exceed +/- one audio slot
// (audio slot = channel count samples).
- if (feedback > audio->feedback.max_value) feedback = audio->feedback.max_value;
- if (feedback < audio->feedback.min_value) feedback = audio->feedback.min_value;
+ if (feedback > audio->feedback.max_value) {
+ feedback = audio->feedback.max_value;
+ }
+ if (feedback < audio->feedback.min_value) {
+ feedback = audio->feedback.min_value;
+ }
tud_audio_n_fb_set(func_id, feedback);
@@ -714,7 +713,6 @@ void audiod_init(void) {
// Initialize IN EP FIFO if required
#if CFG_TUD_AUDIO_ENABLE_EP_IN
-
switch (i) {
#if CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
case 0:
@@ -883,9 +881,11 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const *itf_desc, uint
|| tu_desc_type(p_desc) == TUSB_DESC_INTERFACE_ASSOCIATION) {
break;
} else if (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE && ((tusb_desc_interface_t const *) p_desc)->bInterfaceSubClass == AUDIO_SUBCLASS_STREAMING) {
- if (_audiod_fct[i].p_desc_as == 0) {
+ if (_audiod_fct[i].p_desc_as == NULL) {
_audiod_fct[i].p_desc_as = p_desc;
}
+ } else {
+ // nothing to do
}
total_len += p_desc[0];
p_desc = tu_desc_next(p_desc);
@@ -957,19 +957,19 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const *itf_desc, uint
}
#if CFG_TUD_AUDIO_ENABLE_EP_IN
- if (ep_in) {
+ if (ep_in != 0) {
usbd_edpt_iso_alloc(rhport, ep_in, ep_in_size);
}
#endif
#if CFG_TUD_AUDIO_ENABLE_EP_OUT
- if (ep_out) {
+ if (ep_out != 0) {
usbd_edpt_iso_alloc(rhport, ep_out, ep_out_size);
}
#endif
#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
- if (ep_fb) {
+ if (ep_fb != 0) {
usbd_edpt_iso_alloc(rhport, ep_fb, 4);
}
#endif
@@ -998,6 +998,8 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const *itf_desc, uint
if (tu_unaligned_read16(p_desc + 4) == AUDIO_TERM_TYPE_USB_STREAMING) {
_audiod_fct[i].bclock_id_tx = p_desc[8];
}
+ } else {
+ // nothing to do
}
p_desc = tu_desc_next(p_desc);
}
@@ -1197,6 +1199,8 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *p
audio->ep_in_as_intf_num = itf;
audio->ep_in_alt = alt;
audio->ep_in_sz = tu_edpt_packet_size(desc_ep);
+ // Set the default EP IN FIFO threshold to half fifo depth.
+ audio->ep_in_fifo_threshold = audio->ep_in_ff.depth / 2;
// If flow control is enabled, parse for the corresponding parameters - doing this here means only AS interfaces with EPs get scanned for parameters
#if CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
@@ -1458,6 +1462,8 @@ bool audiod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_
return audiod_control_request(rhport, request);
} else if (stage == CONTROL_STAGE_DATA) {
return audiod_control_complete(rhport, request);
+ } else {
+ // nothing to do
}
return true;
@@ -1549,7 +1555,7 @@ static bool audiod_fb_params_prepare(uint8_t func_id, uint8_t alt) {
// Prepare feedback computation if endpoint is available
if (audio->ep_fb != 0) {
- audio_feedback_params_t fb_param;
+ audio_feedback_params_t fb_param = {0};
tud_audio_feedback_params_cb(func_id, alt, &fb_param);
audio->feedback.compute_method = fb_param.method;
@@ -1590,15 +1596,15 @@ static bool audiod_fb_params_prepare(uint8_t func_id, uint8_t alt) {
} break;
case AUDIO_FEEDBACK_METHOD_FIFO_COUNT: {
- // Initialize the threshold level to half filled
- uint16_t fifo_lvl_thr = tu_fifo_depth(&audio->ep_out_ff) / 2;
- audio->feedback.compute.fifo_count.fifo_lvl_thr = fifo_lvl_thr;
- audio->feedback.compute.fifo_count.fifo_lvl_avg = ((uint32_t) fifo_lvl_thr) << 16;
+ // Determine FIFO threshold
+ uint16_t fifo_threshold = fb_param.fifo_count.fifo_threshold ? fb_param.fifo_count.fifo_threshold : tu_fifo_depth(&audio->ep_out_ff) / 2;
+ audio->feedback.compute.fifo_count.fifo_lvl_thr = fifo_threshold;
+ audio->feedback.compute.fifo_count.fifo_lvl_avg = ((uint32_t) fifo_threshold) << 16;
// Avoid 64bit division
uint32_t nominal = ((fb_param.sample_freq / 100) << 16) / (frame_div / 100);
audio->feedback.compute.fifo_count.nom_value = nominal;
- audio->feedback.compute.fifo_count.rate_const[0] = (uint16_t) ((audio->feedback.max_value - nominal) / fifo_lvl_thr);
- audio->feedback.compute.fifo_count.rate_const[1] = (uint16_t) ((nominal - audio->feedback.min_value) / fifo_lvl_thr);
+ audio->feedback.compute.fifo_count.rate_const[0] = (uint16_t) ((audio->feedback.max_value - nominal) / fifo_threshold);
+ audio->feedback.compute.fifo_count.rate_const[1] = (uint16_t) ((nominal - audio->feedback.min_value) / fifo_threshold);
// On HS feedback is more sensitive since packet size can vary every MSOF, could cause instability
if (tud_speed_get() == TUSB_SPEED_HIGH) {
audio->feedback.compute.fifo_count.rate_const[0] /= 8;
@@ -1633,8 +1639,12 @@ static void audiod_fb_fifo_count_update(audiod_function_t *audio, uint16_t lvl_n
feedback = audio->feedback.compute.fifo_count.nom_value - (ff_lvl - ff_thr) * rate[1];
}
- if (feedback > audio->feedback.max_value) feedback = audio->feedback.max_value;
- if (feedback < audio->feedback.min_value) feedback = audio->feedback.min_value;
+ if (feedback > audio->feedback.max_value) {
+ feedback = audio->feedback.max_value;
+ }
+ if (feedback < audio->feedback.min_value) {
+ feedback = audio->feedback.min_value;
+ }
audio->feedback.value = feedback;
}
@@ -1754,7 +1764,7 @@ static bool audiod_verify_entity_exists(uint8_t itf, uint8_t entityID, uint8_t *
static bool audiod_verify_itf_exists(uint8_t itf, uint8_t *func_id) {
uint8_t i;
for (i = 0; i < CFG_TUD_AUDIO; i++) {
- if (_audiod_fct[i].p_desc) {
+ if (_audiod_fct[i].p_desc != NULL) {
// Get pointer at beginning and end
uint8_t const *p_desc = _audiod_fct[i].p_desc;
uint8_t const *p_desc_end = _audiod_fct[i].p_desc + _audiod_fct[i].desc_length;
@@ -1861,22 +1871,22 @@ static bool audiod_calc_tx_packet_sz(audiod_function_t *audio) {
return true;
}
-static uint16_t audiod_tx_packet_size(const uint16_t *norminal_size, uint16_t data_count, uint16_t fifo_depth, uint16_t max_depth) {
+static uint16_t audiod_tx_packet_size(const uint16_t *nominal_size, uint16_t data_count, uint16_t fifo_depth, uint16_t fifo_threshold, uint16_t max_depth) {
// Flow control need a FIFO size of at least 4*Navg
- if (norminal_size[1] && norminal_size[1] <= fifo_depth * 4) {
+ if (nominal_size[1] && nominal_size[1] <= fifo_depth * 4) {
// Use blackout to prioritize normal size packet
static int ctrl_blackout = 0;
uint16_t packet_size;
- uint16_t slot_size = norminal_size[2] - norminal_size[1];
- if (data_count < norminal_size[0]) {
+ uint16_t slot_size = nominal_size[2] - nominal_size[1];
+ if (data_count < nominal_size[0]) {
// If you get here frequently, then your I2S clock deviation is too big !
packet_size = 0;
- } else if (data_count < fifo_depth / 2 - slot_size && !ctrl_blackout) {
- packet_size = norminal_size[0];
+ } else if (data_count < (fifo_threshold - slot_size) && !ctrl_blackout) {
+ packet_size = nominal_size[0];
ctrl_blackout = 10;
- } else if (data_count > fifo_depth / 2 + slot_size && !ctrl_blackout) {
- packet_size = norminal_size[2];
- if (norminal_size[0] == norminal_size[1]) {
+ } else if (data_count > (fifo_threshold + slot_size) && !ctrl_blackout) {
+ packet_size = nominal_size[2];
+ if (nominal_size[0] == nominal_size[1]) {
// nav > INT(nav), eg. 44.1k, 88.2k
ctrl_blackout = 0;
} else {
@@ -1884,7 +1894,7 @@ static uint16_t audiod_tx_packet_size(const uint16_t *norminal_size, uint16_t da
ctrl_blackout = 10;
}
} else {
- packet_size = norminal_size[1];
+ packet_size = nominal_size[1];
if (ctrl_blackout) {
ctrl_blackout--;
}
diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h
index 2bd432d48..1e0c46915 100644
--- a/src/class/audio/audio_device.h
+++ b/src/class/audio/audio_device.h
@@ -188,6 +188,8 @@ tu_fifo_t* tud_audio_n_get_ep_out_ff (uint8_t func_id);
uint16_t tud_audio_n_write (uint8_t func_id, const void * data, uint16_t len);
bool tud_audio_n_clear_ep_in_ff (uint8_t func_id);
tu_fifo_t* tud_audio_n_get_ep_in_ff (uint8_t func_id);
+uint16_t tud_audio_n_get_ep_in_fifo_threshold(uint8_t func_id);
+void tud_audio_n_set_ep_in_fifo_threshold(uint8_t func_id, uint16_t threshold);
#endif
#if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
@@ -331,10 +333,12 @@ typedef struct {
union {
struct {
uint32_t mclk_freq; // Main clock frequency in Hz i.e. master clock to which sample clock is based on
- }frequency;
-
+ } frequency;
+ struct {
+ uint16_t fifo_threshold; // Target FIFO threshold level, default to half FIFO if not set
+ } fifo_count;
};
-}audio_feedback_params_t;
+} audio_feedback_params_t;
// Invoked when needed to set feedback parameters
void tud_audio_feedback_params_cb(uint8_t func_id, uint8_t alt_itf, audio_feedback_params_t* feedback_param);
@@ -424,6 +428,16 @@ TU_ATTR_ALWAYS_INLINE static inline tu_fifo_t* tud_audio_get_ep_in_ff(void) {
return tud_audio_n_get_ep_in_ff(0);
}
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tud_audio_get_ep_in_fifo_threshold(void)
+{
+ return tud_audio_n_get_ep_in_fifo_threshold(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tud_audio_set_ep_in_fifo_threshold(uint16_t threshold)
+{
+ tud_audio_n_set_ep_in_fifo_threshold(0, threshold);
+}
+
#endif
#if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h
index 6d207c717..679723ba6 100644
--- a/src/class/cdc/cdc.h
+++ b/src/class/cdc/cdc.h
@@ -192,10 +192,10 @@ typedef enum {
CDC_LINE_CODING_STOP_BITS_2 = 2, // 2 bits
} cdc_line_coding_stopbits_t;
-#define CDC_LINE_CODING_STOP_BITS_TEXT(STOP_BITS) ( \
- STOP_BITS == CDC_LINE_CODING_STOP_BITS_1 ? "1" : \
- STOP_BITS == CDC_LINE_CODING_STOP_BITS_1_5 ? "1.5" : \
- STOP_BITS == CDC_LINE_CODING_STOP_BITS_2 ? "2" : "?" )
+#define CDC_LINE_CODING_STOP_BITS_TEXT(STOP_BITS) ( \
+ (STOP_BITS) == CDC_LINE_CODING_STOP_BITS_1 ? "1" : \
+ (STOP_BITS) == CDC_LINE_CODING_STOP_BITS_1_5 ? "1.5" : \
+ (STOP_BITS) == CDC_LINE_CODING_STOP_BITS_2 ? "2" : "?" )
// TODO Backward compatible for typos. Maybe removed in the future release
#define CDC_LINE_CONDING_STOP_BITS_1 CDC_LINE_CODING_STOP_BITS_1
@@ -211,11 +211,11 @@ typedef enum {
} cdc_line_coding_parity_t;
#define CDC_LINE_CODING_PARITY_CHAR(PARITY) ( \
- PARITY == CDC_LINE_CODING_PARITY_NONE ? 'N' : \
- PARITY == CDC_LINE_CODING_PARITY_ODD ? 'O' : \
- PARITY == CDC_LINE_CODING_PARITY_EVEN ? 'E' : \
- PARITY == CDC_LINE_CODING_PARITY_MARK ? 'M' : \
- PARITY == CDC_LINE_CODING_PARITY_SPACE ? 'S' : '?' )
+ (PARITY) == CDC_LINE_CODING_PARITY_NONE ? 'N' : \
+ (PARITY) == CDC_LINE_CODING_PARITY_ODD ? 'O' : \
+ (PARITY) == CDC_LINE_CODING_PARITY_EVEN ? 'E' : \
+ (PARITY) == CDC_LINE_CODING_PARITY_MARK ? 'M' : \
+ (PARITY) == CDC_LINE_CODING_PARITY_SPACE ? 'S' : '?' )
//--------------------------------------------------------------------+
// Management Element Notification (Notification Endpoint)
diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index 2bf017aca..bf631908f 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -270,7 +270,7 @@ uint32_t tud_cdc_n_write_flush(uint8_t itf) {
TU_VERIFY(tud_ready(), 0); // Skip if usb is not ready yet
// No data to send
- if (!tu_fifo_count(&p_cdc->tx_ff)) {
+ if (0 == tu_fifo_count(&p_cdc->tx_ff)) {
return 0;
}
@@ -279,7 +279,7 @@ uint32_t tud_cdc_n_write_flush(uint8_t itf) {
// Pull data from FIFO
const uint16_t count = tu_fifo_read_n(&p_cdc->tx_ff, p_epbuf->epin, CFG_TUD_CDC_EP_BUFSIZE);
- if (count) {
+ if (count > 0) {
TU_ASSERT(usbd_edpt_xfer(p_cdc->rhport, p_cdc->ep_in, p_epbuf->epin, count, false), 0);
return count;
} else {
@@ -337,15 +337,15 @@ bool cdcd_deinit(void) {
#if OSAL_MUTEX_REQUIRED
for(uint8_t i=0; i<CFG_TUD_CDC; i++) {
cdcd_interface_t* p_cdc = &_cdcd_itf[i];
- osal_mutex_t mutex_rd = p_cdc->rx_ff.mutex_rd;
- osal_mutex_t mutex_wr = p_cdc->tx_ff.mutex_wr;
+ const osal_mutex_t mutex_rd = p_cdc->rx_ff.mutex_rd;
+ const osal_mutex_t mutex_wr = p_cdc->tx_ff.mutex_wr;
- if (mutex_rd) {
+ if (mutex_rd != NULL) {
osal_mutex_delete(mutex_rd);
tu_fifo_config_mutex(&p_cdc->rx_ff, NULL, NULL);
}
- if (mutex_wr) {
+ if (mutex_wr != NULL) {
osal_mutex_delete(mutex_wr);
tu_fifo_config_mutex(&p_cdc->tx_ff, NULL, NULL);
}
@@ -449,13 +449,15 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
}
TU_VERIFY(itf < CFG_TUD_CDC);
- switch (request->bRequest) {
+ switch (request->bRequest) { //-V2520 //-V2659
case CDC_REQUEST_SET_LINE_CODING:
if (stage == CONTROL_STAGE_SETUP) {
TU_LOG_DRV(" Set Line Coding\r\n");
tud_control_xfer(rhport, request, &p_cdc->line_coding, sizeof(cdc_line_coding_t));
} else if (stage == CONTROL_STAGE_ACK) {
tud_cdc_line_coding_cb(itf, &p_cdc->line_coding);
+ } else {
+ // nothing to do
}
break;
@@ -491,6 +493,8 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
// Invoke callback
tud_cdc_line_state_cb(itf, dtr, rts);
+ } else {
+ // nothing to do
}
break;
@@ -500,7 +504,10 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
} else if (stage == CONTROL_STAGE_ACK) {
TU_LOG_DRV(" Send Break\r\n");
tud_cdc_send_break_cb(itf, request->wValue);
+ } else {
+ // nothing to do
}
+
break;
default:
@@ -558,7 +565,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
if (0 == tud_cdc_n_write_flush(itf)) {
// If there is no data left, a ZLP should be sent if
// xferred_bytes is multiple of EP Packet size and not zero
- if (!tu_fifo_count(&p_cdc->tx_ff) && xferred_bytes && (0 == (xferred_bytes & (BULK_PACKET_SIZE - 1)))) {
+ if (0 == tu_fifo_count(&p_cdc->tx_ff) && xferred_bytes > 0 && (0 == (xferred_bytes & (BULK_PACKET_SIZE - 1)))) {
if (usbd_edpt_claim(rhport, p_cdc->ep_in)) {
TU_ASSERT(usbd_edpt_xfer(rhport, p_cdc->ep_in, NULL, 0, false));
}
diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h
index c321f3d16..6f21af4f3 100644
--- a/src/class/cdc/cdc_device.h
+++ b/src/class/cdc/cdc_device.h
@@ -53,15 +53,16 @@
// Driver Configuration
//--------------------------------------------------------------------+
typedef struct TU_ATTR_PACKED {
- uint8_t rx_persistent : 1; // keep rx fifo data even with bus reset or disconnect
- uint8_t tx_persistent : 1; // keep tx fifo data even with reset or disconnect
- uint8_t tx_overwritabe_if_not_connected : 1; // if not connected, tx fifo can be overwritten
+ bool rx_persistent : 1; // keep rx fifo data even with bus reset or disconnect
+ bool tx_persistent : 1; // keep tx fifo data even with reset or disconnect
+ bool tx_overwritabe_if_not_connected : 1; // if not connected, tx fifo can be overwritten
} tud_cdc_configure_t;
+TU_VERIFY_STATIC(sizeof(tud_cdc_configure_t) == 1, "size is not correct");
#define TUD_CDC_CONFIGURE_DEFAULT() { \
- .rx_persistent = 0, \
- .tx_persistent = 0, \
- .tx_overwritabe_if_not_connected = 1, \
+ .rx_persistent = false, \
+ .tx_persistent = false, \
+ .tx_overwritabe_if_not_connected = true, \
}
// Configure CDC driver behavior
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 3fc6a9adf..7fdf0a7b9 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -602,7 +602,7 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const *line_coding,
p_cdc->requested_line.coding = *line_coding;
p_cdc->user_complete_cb = complete_cb;
- if (driver->set_line_coding) {
+ if (driver->set_line_coding != NULL) {
// driver support set_line_coding request
TU_VERIFY(driver->set_line_coding(p_cdc, complete_cb ? cdch_internal_control_complete : NULL, user_data));
@@ -611,7 +611,7 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const *line_coding,
}
} else {
// driver does not support set_line_coding and need 2 stage to set baudrate and data format separately
- if (complete_cb) {
+ if (complete_cb != NULL) {
// non-blocking
TU_VERIFY(driver->set_baudrate(p_cdc, cdch_set_line_coding_stage1_baudrate_complete, user_data));
} else {
@@ -619,7 +619,7 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const *line_coding,
xfer_result_t result = XFER_RESULT_INVALID;
TU_VERIFY(driver->set_baudrate(p_cdc, NULL, (uintptr_t) &result));
- if (user_data) {
+ if (user_data != 0) {
*((xfer_result_t *) user_data) = result;
}
TU_VERIFY(result == XFER_RESULT_SUCCESS);
@@ -627,7 +627,7 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const *line_coding,
result = XFER_RESULT_INVALID;
TU_VERIFY(driver->set_data_format(p_cdc, NULL, (uintptr_t) &result));
- if (user_data) {
+ if (user_data != 0) {
*((xfer_result_t *) user_data) = result;
}
TU_VERIFY(result == XFER_RESULT_SUCCESS);
@@ -777,6 +777,8 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_d
}
}
}
+ } else {
+ // not supported class
}
return false;
@@ -894,7 +896,7 @@ static void cdch_internal_control_complete(tuh_xfer_t *xfer) {
// Invoke application callback
xfer->complete_cb = p_cdc->user_complete_cb;
- if (xfer->complete_cb) {
+ if (xfer->complete_cb != NULL) {
xfer->complete_cb(xfer);
}
}
@@ -910,7 +912,7 @@ static void cdch_set_line_coding_stage1_baudrate_complete(tuh_xfer_t *xfer) {
TU_ASSERT(driver->set_data_format(p_cdc, cdch_set_line_coding_stage2_data_format_complete, xfer->user_data),);
} else {
xfer->complete_cb = p_cdc->user_complete_cb;
- if (xfer->complete_cb) {
+ if (xfer->complete_cb != NULL) {
xfer->complete_cb(xfer);
}
}
@@ -926,7 +928,7 @@ static void cdch_set_line_coding_stage2_data_format_complete(tuh_xfer_t *xfer) {
}
xfer->complete_cb = p_cdc->user_complete_cb;
- if (xfer->complete_cb) {
+ if (xfer->complete_cb != NULL) {
xfer->complete_cb(xfer);
}
}
@@ -950,12 +952,12 @@ static void acm_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t *x
break;
default:
- break;
+ break; // unknown request
}
}
static bool acm_set_control_line_state(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
- TU_VERIFY(p_cdc->acm.capability.support_line_request);
+ TU_VERIFY(p_cdc->acm.capability.support_line_request != 0);
const tusb_control_request_t request = {
.bmRequestType_bit = {
@@ -982,7 +984,7 @@ static bool acm_set_control_line_state(cdch_interface_t *p_cdc, tuh_xfer_cb_t co
}
static bool acm_set_line_coding(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
- TU_VERIFY(p_cdc->acm.capability.support_line_request);
+ TU_VERIFY(p_cdc->acm.capability.support_line_request != 0);
TU_VERIFY((p_cdc->requested_line.coding.data_bits >= 5 && p_cdc->requested_line.coding.data_bits <= 8) ||
p_cdc->requested_line.coding.data_bits == 16);
@@ -1167,10 +1169,10 @@ static bool ftdi_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete
static bool ftdi_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
uint32_t index_value = ftdi_get_divisor(p_cdc);
- TU_VERIFY(index_value);
+ TU_VERIFY(index_value != 0);
uint16_t value = (uint16_t) index_value;
uint16_t index = (uint16_t) (index_value >> 16);
- if (p_cdc->ftdi.channel) {
+ if (p_cdc->ftdi.channel != 0) {
index = (uint16_t) ((index << 8) | p_cdc->ftdi.channel);
}
@@ -1372,6 +1374,8 @@ static uint32_t ftdi_232bm_baud_base_to_divisor(uint32_t baud, uint32_t base) {
divisor = 0;
} else if (divisor == 0x4001) /* 1.5 */ {
divisor = 1;
+ } else {
+ // nothing to do
}
return divisor;
}
@@ -1395,12 +1399,13 @@ static uint32_t ftdi_2232h_baud_base_to_divisor(uint32_t baud, uint32_t base) {
divisor = 0;
} else if (divisor == 0x4001) /* 1.5 */ {
divisor = 1;
+ } else {
+ // nothing to do
}
- /*
- * Set this bit to turn off a divide by 2.5 on baud rate generator
+
+ /* Set this bit to turn off a divide by 2.5 on baud rate generator
* This enables baud rates up to 12Mbaud but cannot reach below 1200
- * baud with this bit set
- */
+ * baud with this bit set */
divisor |= 0x00020000;
return divisor;
}
@@ -1412,7 +1417,7 @@ static inline uint32_t ftdi_2232h_baud_to_divisor(uint32_t baud) {
static inline uint32_t ftdi_get_divisor(cdch_interface_t *p_cdc) {
uint32_t baud = p_cdc->requested_line.coding.bit_rate;
uint32_t div_value = 0;
- TU_VERIFY(baud);
+ TU_VERIFY(baud != 0);
switch (p_cdc->ftdi.chip_type) {
case FTDI_UNKNOWN:
@@ -1552,7 +1557,8 @@ static void cp210x_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t
p_cdc->line.coding.bit_rate = p_cdc->requested_line.coding.bit_rate;
break;
- default: break;
+ default:
+ break; // unsupported request
}
}
@@ -1713,7 +1719,8 @@ static void ch34x_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t
p_cdc->line.coding.data_bits = p_cdc->requested_line.coding.data_bits;
break;
- default: break;
+ default:
+ break; // unsupported
}
break;
@@ -1721,19 +1728,20 @@ static void ch34x_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t
p_cdc->line.control_state = p_cdc->requested_line.control_state;
break;
- default: break;
+ default:
+ break; // unsupported request
}
}
static bool ch34x_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
const uint8_t lcr = ch34x_get_lcr(p_cdc);
- TU_VERIFY(lcr);
+ TU_VERIFY(lcr > 0);
return ch34x_write_reg(p_cdc, CH32X_REG16_LCR2_LCR, lcr, complete_cb, user_data);
}
static bool ch34x_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
const uint16_t div_ps = ch34x_get_divisor_prescaler(p_cdc);
- TU_VERIFY(div_ps);
+ TU_VERIFY(div_ps > 0);
return ch34x_write_reg(p_cdc, CH34X_REG16_DIVISOR_PRESCALER, div_ps, complete_cb, user_data);
}
@@ -1916,7 +1924,8 @@ static uint8_t ch34x_get_lcr(cdch_interface_t *p_cdc) {
lcr |= CH34X_LCR_ENABLE_PAR | CH34X_LCR_MARK_SPACE | CH34X_LCR_PAR_EVEN;
break;
- default: break;
+ default:
+ break; // invalid parity
}
// 1.5 stop bits not supported
@@ -1999,13 +2008,15 @@ static inline bool pl2303_supports_hx_status(cdch_interface_t *p_cdc, tuh_xfer_c
// return pl2303_set_request(p_cdc, PL2303_BREAK_REQUEST, PL2303_BREAK_REQUEST_TYPE, state, 0, NULL, 0);
//}
-static inline int pl2303_clear_halt(cdch_interface_t *p_cdc, uint8_t endp, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static inline bool
+pl2303_clear_halt(cdch_interface_t *p_cdc, uint8_t endp, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
/* we don't care if it wasn't halted first. in fact some devices
* (like some ibmcam model 1 units) seem to expect hosts to make
* this request for iso endpoints, which can't halt!
*/
- return pl2303_set_request(p_cdc, TUSB_REQ_CLEAR_FEATURE, PL2303_CLEAR_HALT_REQUEST_TYPE, TUSB_REQ_FEATURE_EDPT_HALT, endp,
- NULL, 0, complete_cb, user_data);
+ return pl2303_set_request(
+ p_cdc, TUSB_REQ_CLEAR_FEATURE, PL2303_CLEAR_HALT_REQUEST_TYPE, TUSB_REQ_FEATURE_EDPT_HALT, endp, NULL, 0,
+ complete_cb, user_data);
}
//------------- Driver API -------------//
@@ -2130,10 +2141,9 @@ static bool pl2303_process_set_config(cdch_interface_t *p_cdc, tuh_xfer_t *xfer)
if (type == PL2303_TYPE_NEED_SUPPORTS_HX_STATUS) {
TU_ASSERT(pl2303_supports_hx_status(p_cdc, cdch_process_set_config, CONFIG_PL2303_READ1));
break;
- } else {
- // no transfer triggered and continue with CONFIG_PL2303_READ1
- TU_ATTR_FALLTHROUGH;
}
+ // no transfer triggered and continue with CONFIG_PL2303_READ1
+ TU_ATTR_FALLTHROUGH;
case CONFIG_PL2303_READ1:
// get supports_hx_status, type and quirks (step 2), do special read
@@ -2378,10 +2388,12 @@ static pl2303_type_t pl2303_detect_type(cdch_interface_t *p_cdc, uint8_t step) {
return PL2303_TYPE_HXN;
default:
- break;
+ break; // unknown device
}
break;
- default: break;
+
+ default:
+ break; // unknown device
}
TU_LOG_CDC(p_cdc, "unknown device type bcdUSB = 0x%04x", desc_dev.bcdUSB);
@@ -2443,8 +2455,9 @@ static uint32_t pl2303_encode_baud_rate_divisor(uint8_t buf[PL2303_LINE_CODING_B
*/
baseline = 12000000 * 32;
mantissa = baseline / baud;
- if (mantissa == 0)
+ if (mantissa == 0) {
mantissa = 1; /* Avoid dividing by zero if baud > 32 * 12M. */
+ }
exponent = 0;
while (mantissa >= 512) {
if (exponent < 7) {
@@ -2516,7 +2529,7 @@ static bool pl2303_encode_baud_rate(cdch_interface_t *p_cdc, uint8_t buf[PL2303_
* Use direct method for supported baud rates, otherwise use divisors.
* Newer chip types do not support divisor encoding.
*/
- if (type_data->no_divisors) {
+ if (type_data->no_divisors != 0) {
baud_sup = baud;
} else {
baud_sup = pl2303_get_supported_baud_rate(baud);
@@ -2524,7 +2537,7 @@ static bool pl2303_encode_baud_rate(cdch_interface_t *p_cdc, uint8_t buf[PL2303_
if (baud == baud_sup) {
baud = pl2303_encode_baud_rate_direct(buf, baud);
- } else if (type_data->alt_divisors) {
+ } else if (type_data->alt_divisors != 0) {
baud = pl2303_encode_baud_rate_divisor_alt(buf, baud);
} else {
baud = pl2303_encode_baud_rate_divisor(buf, baud);
diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index b272c80c0..15bfafc35 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -83,7 +83,7 @@ typedef struct {
uint8_t add_sense_code;
uint8_t add_sense_qualifier;
- uint8_t pending_io; // pending async IO
+ bool pending_io; // pending async IO
}mscd_interface_t;
static mscd_interface_t _mscd_itf;
@@ -92,6 +92,8 @@ CFG_TUD_MEM_SECTION static struct {
TUD_EPBUF_DEF(buf, CFG_TUD_MSC_EP_BUFSIZE);
} _mscd_epbuf;
+TU_VERIFY_STATIC(CFG_TUD_MSC_EP_BUFSIZE >= 64, "CFG_TUD_MSC_EP_BUFSIZE must be at least 64");
+
//--------------------------------------------------------------------+
// INTERNAL OBJECT & FUNCTION DECLARATION
//--------------------------------------------------------------------+
@@ -107,16 +109,16 @@ TU_ATTR_ALWAYS_INLINE static inline bool is_data_in(uint8_t dir) {
return tu_bit_test(dir, 7);
}
-static inline bool send_csw(mscd_interface_t* p_msc) {
+TU_ATTR_ALWAYS_INLINE static inline bool send_csw(mscd_interface_t* p_msc) {
// Data residue is always = host expect - actual transferred
uint8_t rhport = p_msc->rhport;
p_msc->csw.data_residue = p_msc->cbw.total_bytes - p_msc->xferred_len;
p_msc->stage = MSC_STAGE_STATUS_SENT;
- memcpy(_mscd_epbuf.buf, &p_msc->csw, sizeof(msc_csw_t));
+ memcpy(_mscd_epbuf.buf, &p_msc->csw, sizeof(msc_csw_t)); //-V1086
return usbd_edpt_xfer(rhport, p_msc->ep_in , _mscd_epbuf.buf, sizeof(msc_csw_t), false);
}
-static inline bool prepare_cbw(mscd_interface_t* p_msc) {
+TU_ATTR_ALWAYS_INLINE static inline bool prepare_cbw(mscd_interface_t* p_msc) {
uint8_t rhport = p_msc->rhport;
p_msc->stage = MSC_STAGE_CMD;
return usbd_edpt_xfer(rhport, p_msc->ep_out, _mscd_epbuf.buf, sizeof(msc_cbw_t), false);
@@ -133,7 +135,7 @@ static void fail_scsi_op(mscd_interface_t* p_msc, uint8_t status) {
// failed but sense key is not set: default to Illegal Request
if (p_msc->sense_key == 0) {
- tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
+ (void) tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
}
// If there is data stage and not yet complete, stall it
@@ -146,18 +148,18 @@ static void fail_scsi_op(mscd_interface_t* p_msc, uint8_t status) {
}
}
-static inline uint32_t rdwr10_get_lba(uint8_t const command[]) {
+TU_ATTR_ALWAYS_INLINE static inline uint32_t rdwr10_get_lba(uint8_t const command[]) {
// use offsetof to avoid pointer to the odd/unaligned address
const uint32_t lba = tu_unaligned_read32(command + offsetof(scsi_write10_t, lba));
return tu_ntohl(lba); // lba is in Big Endian
}
-static inline uint16_t rdwr10_get_blockcount(msc_cbw_t const* cbw) {
+TU_ATTR_ALWAYS_INLINE static inline uint16_t rdwr10_get_blockcount(msc_cbw_t const* cbw) {
uint16_t const block_count = tu_unaligned_read16(cbw->command + offsetof(scsi_write10_t, block_count));
return tu_ntohs(block_count);
}
-static inline uint16_t rdwr10_get_blocksize(msc_cbw_t const* cbw) {
+TU_ATTR_ALWAYS_INLINE static inline uint16_t rdwr10_get_blocksize(msc_cbw_t const* cbw) {
// first extract block count in the command
uint16_t const block_count = rdwr10_get_blockcount(cbw);
if (block_count == 0) {
@@ -171,7 +173,7 @@ static uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw) {
uint16_t const block_count = rdwr10_get_blockcount(cbw);
if (cbw->total_bytes == 0) {
- if (block_count) {
+ if (block_count > 0) {
TU_LOG_DRV(" SCSI case 2 (Hn < Di) or case 3 (Hn < Do) \r\n");
status = MSC_CSW_STATUS_PHASE_ERROR;
} else {
@@ -190,6 +192,8 @@ static uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw) {
} else if (cbw->total_bytes / block_count == 0) {
TU_LOG_DRV(" Computed block size = 0. SCSI case 7 Hi < Di (READ10) or case 13 Ho < Do (WRIT10)\r\n");
status = MSC_CSW_STATUS_PHASE_ERROR;
+ } else {
+ // nothing to do
}
}
@@ -309,7 +313,7 @@ bool tud_msc_set_sense(uint8_t lun, uint8_t sense_key, uint8_t add_sense_code, u
TU_ATTR_ALWAYS_INLINE static inline void set_sense_medium_not_present(uint8_t lun) {
// default sense is NOT READY, MEDIUM NOT PRESENT
- tud_msc_set_sense(lun, SCSI_SENSE_NOT_READY, 0x3A, 0x00);
+ (void) tud_msc_set_sense(lun, SCSI_SENSE_NOT_READY, 0x3A, 0x00);
}
static void proc_async_io_done(void *bytes_io) {
@@ -318,7 +322,7 @@ static void proc_async_io_done(void *bytes_io) {
const int32_t nbytes = (int32_t) (intptr_t) bytes_io;
const uint8_t cmd = p_msc->cbw.command[0];
- p_msc->pending_io = 0;
+ p_msc->pending_io = false;
switch (cmd) {
case SCSI_CMD_READ_10:
proc_read_io_data(p_msc, nbytes);
@@ -328,7 +332,7 @@ static void proc_async_io_done(void *bytes_io) {
proc_write_io_data(p_msc, (uint32_t) nbytes, nbytes);
break;
- default: break;
+ default: break; // nothing to do
}
// send status if stage is transitioned to STATUS
@@ -429,6 +433,8 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
TU_ASSERT(prepare_cbw(p_msc));
}
}
+ } else {
+ // nothing to do
}
}
@@ -451,7 +457,7 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
TU_VERIFY(request->wValue == 0 && request->wLength == 1);
uint8_t maxlun = tud_msc_get_maxlun_cb();
- TU_VERIFY(maxlun);
+ TU_VERIFY(maxlun != 0);
maxlun--; // MAX LUN is minus 1 by specs
tud_control_xfer(rhport, request, &maxlun, 1);
break;
@@ -510,7 +516,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
if (status != MSC_CSW_STATUS_PASSED) {
fail_scsi_op(p_msc, status);
- } else if (p_cbw->total_bytes) {
+ } else if (p_cbw->total_bytes > 0) {
if (SCSI_CMD_READ_10 == p_cbw->command[0]) {
proc_read10_cmd(p_msc);
} else {
@@ -547,7 +553,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
TU_LOG_DRV(" SCSI unsupported or failed command\r\n");
fail_scsi_op(p_msc, MSC_CSW_STATUS_FAILED);
} else if (resplen == 0) {
- if (p_cbw->total_bytes) {
+ if (p_cbw->total_bytes > 0) {
// 6.7 The 13 Cases: case 4 (Hi > Dn)
// TU_LOG_DRV(" SCSI case 4 (Hi > Dn): %lu\r\n", p_cbw->total_bytes);
fail_scsi_op(p_msc, MSC_CSW_STATUS_FAILED);
@@ -647,7 +653,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
}
break;
- default: break;
+ default: break; // nothing to do
}
if (p_msc->stage == MSC_STAGE_STATUS) {
@@ -683,9 +689,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
}
break;
- case SCSI_CMD_START_STOP_UNIT:
+ case SCSI_CMD_START_STOP_UNIT: {
resplen = 0;
-
scsi_start_stop_unit_t const* start_stop = (scsi_start_stop_unit_t const*)scsi_cmd;
if (!tud_msc_start_stop_cb(lun, start_stop->power_condition, start_stop->start, start_stop->load_eject)) {
// Failed status response
@@ -697,10 +702,10 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
}
}
break;
+ }
- case SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
+ case SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL: {
resplen = 0;
-
scsi_prevent_allow_medium_removal_t const* prevent_allow = (scsi_prevent_allow_medium_removal_t const*)scsi_cmd;
if (!tud_msc_prevent_allow_medium_removal_cb(lun, prevent_allow->prohibit_removal, prevent_allow->control)) {
// Failed status response
@@ -712,7 +717,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
}
}
break;
-
+ }
case SCSI_CMD_READ_CAPACITY_10: {
uint32_t block_count;
@@ -740,8 +745,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
resplen = sizeof(read_capa10);
TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &read_capa10, (size_t) resplen));
}
+ break;
}
- break;
case SCSI_CMD_READ_FORMAT_CAPACITY: {
scsi_read_format_capacity_data_t read_fmt_capa = {
@@ -772,8 +777,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
resplen = sizeof(read_fmt_capa);
TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &read_fmt_capa, (size_t) resplen));
}
+ break;
}
- break;
case SCSI_CMD_INQUIRY: {
scsi_inquiry_resp_t *inquiry_rsp = (scsi_inquiry_resp_t *) buffer;
@@ -789,8 +794,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
tud_msc_inquiry_cb(lun, inquiry_rsp->vendor_id, inquiry_rsp->product_id, inquiry_rsp->product_rev);
resplen = sizeof(scsi_inquiry_resp_t);
}
+ break;
}
- break;
case SCSI_CMD_MODE_SENSE_6: {
scsi_mode_sense6_resp_t mode_resp = {
@@ -807,8 +812,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
resplen = sizeof(mode_resp);
TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &mode_resp, (size_t) resplen));
+ break;
}
- break;
case SCSI_CMD_REQUEST_SENSE: {
scsi_sense_fixed_resp_t sense_rsp = {
@@ -828,9 +833,9 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
resplen = tud_msc_request_sense_cb(lun, buffer, (uint16_t)bufsize);
// Clear sense data after copy
- tud_msc_set_sense(lun, 0, 0, 0);
+ (void) tud_msc_set_sense(lun, 0, 0, 0);
+ break;
}
- break;
default: resplen = -1;
break;
@@ -842,6 +847,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
static void proc_read10_cmd(mscd_interface_t* p_msc) {
msc_cbw_t const* p_cbw = &p_msc->cbw;
uint16_t const block_sz = rdwr10_get_blocksize(p_cbw); // already verified non-zero
+ TU_VERIFY(block_sz != 0, );
// Adjust lba & offset with transferred bytes
uint32_t const lba = rdwr10_get_lba(p_cbw->command) + (p_msc->xferred_len / block_sz);
uint32_t const offset = p_msc->xferred_len % block_sz;
@@ -849,10 +855,10 @@ static void proc_read10_cmd(mscd_interface_t* p_msc) {
// remaining bytes capped at class buffer
int32_t nbytes = (int32_t)tu_min32(CFG_TUD_MSC_EP_BUFSIZE, p_cbw->total_bytes - p_msc->xferred_len);
- p_msc->pending_io = 1;
+ p_msc->pending_io = true;
nbytes = tud_msc_read10_cb(p_cbw->lun, lba, offset, _mscd_epbuf.buf, (uint32_t)nbytes);
if (nbytes != TUD_MSC_RET_ASYNC) {
- p_msc->pending_io = 0;
+ p_msc->pending_io = false;
proc_read_io_data(p_msc, nbytes);
}
}
@@ -876,19 +882,19 @@ static void proc_read_io_data(mscd_interface_t* p_msc, int32_t nbytes) {
dcd_event_xfer_complete(rhport, p_msc->ep_in, 0, XFER_RESULT_SUCCESS, false);
break;
- default: break;
+ default: break; // nothing to do
}
}
}
static void proc_write10_cmd(mscd_interface_t* p_msc) {
msc_cbw_t const* p_cbw = &p_msc->cbw;
- bool writable = tud_msc_is_writable_cb(p_cbw->lun);
+ const bool writable = tud_msc_is_writable_cb(p_cbw->lun);
if (!writable) {
// Not writable, complete this SCSI op with error
// Sense = Write protected
- tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_DATA_PROTECT, 0x27, 0x00);
+ (void) tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_DATA_PROTECT, 0x27, 0x00);
fail_scsi_op(p_msc, MSC_CSW_STATUS_FAILED);
return;
}
@@ -903,15 +909,16 @@ static void proc_write10_cmd(mscd_interface_t* p_msc) {
static void proc_write10_host_data(mscd_interface_t* p_msc, uint32_t xferred_bytes) {
msc_cbw_t const* p_cbw = &p_msc->cbw;
uint16_t const block_sz = rdwr10_get_blocksize(p_cbw); // already verified non-zero
+ TU_VERIFY(block_sz != 0, );
// Adjust lba & offset with transferred bytes
uint32_t const lba = rdwr10_get_lba(p_cbw->command) + (p_msc->xferred_len / block_sz);
uint32_t const offset = p_msc->xferred_len % block_sz;
- p_msc->pending_io = 1;
+ p_msc->pending_io = true;
int32_t nbytes = tud_msc_write10_cb(p_cbw->lun, lba, offset, _mscd_epbuf.buf, xferred_bytes);
if (nbytes != TUD_MSC_RET_ASYNC) {
- p_msc->pending_io = 0;
+ p_msc->pending_io = false;
proc_write_io_data(p_msc, xferred_bytes, nbytes);
}
}
@@ -927,7 +934,7 @@ static void proc_write_io_data(mscd_interface_t* p_msc, uint32_t xferred_bytes,
fail_scsi_op(p_msc, MSC_CSW_STATUS_FAILED);
break;
- default: break;
+ default: break; // nothing to do
}
} else {
if ((uint32_t)nbytes < xferred_bytes) {
diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c
index eb69ae400..daff345c5 100644
--- a/src/class/msc/msc_host.c
+++ b/src/class/msc/msc_host.c
@@ -123,7 +123,10 @@ bool tuh_msc_mounted(uint8_t dev_addr) {
bool tuh_msc_ready(uint8_t dev_addr) {
msch_interface_t* p_msc = get_itf(dev_addr);
- return p_msc->mounted && !usbh_edpt_busy(dev_addr, p_msc->ep_in) && !usbh_edpt_busy(dev_addr, p_msc->ep_out);
+ TU_VERIFY(p_msc->mounted);
+ const bool epin_busy = usbh_edpt_busy(dev_addr, p_msc->ep_in);
+ const bool epout_busy = usbh_edpt_busy(dev_addr, p_msc->ep_out);
+ return !epin_busy && !epout_busy;
}
//--------------------------------------------------------------------+
@@ -152,7 +155,7 @@ bool tuh_msc_scsi_command(uint8_t daddr, msc_cbw_t const* cbw, void* data,
p_msc->stage = MSC_STAGE_CMD;
if (!usbh_edpt_xfer(daddr, p_msc->ep_out, (uint8_t*) &epbuf->cbw, sizeof(msc_cbw_t))) {
- usbh_edpt_release(daddr, p_msc->ep_out);
+ (void) usbh_edpt_release(daddr, p_msc->ep_out);
return false;
}
@@ -191,7 +194,7 @@ bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* respons
.cmd_code = SCSI_CMD_INQUIRY,
.alloc_length = sizeof(scsi_inquiry_resp_t)
};
- memcpy(cbw.command, &cmd_inquiry, cbw.cmd_len);
+ memcpy(cbw.command, &cmd_inquiry, cbw.cmd_len); //-V1086
return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb, arg);
}
@@ -225,7 +228,7 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void* response,
.cmd_code = SCSI_CMD_REQUEST_SENSE,
.alloc_length = 18
};
- memcpy(cbw.command, &cmd_request_sense, cbw.cmd_len);
+ memcpy(cbw.command, &cmd_request_sense, cbw.cmd_len); //-V1086
return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb, arg);
}
@@ -247,7 +250,7 @@ bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void* buffer, uint32_t lba, u
.lba = tu_htonl(lba),
.block_count = tu_htons(block_count)
};
- memcpy(cbw.command, &cmd_read10, cbw.cmd_len);
+ memcpy(cbw.command, &cmd_read10, cbw.cmd_len); //-V1086
return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb, arg);
}
@@ -269,7 +272,7 @@ bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const* buffer, uint32_t
.lba = tu_htonl(lba),
.block_count = tu_htons(block_count)
};
- memcpy(cbw.command, &cmd_write10, cbw.cmd_len);
+ memcpy(cbw.command, &cmd_write10, cbw.cmd_len); //-V1086
return tuh_msc_scsi_command(dev_addr, &cbw, (void*) (uintptr_t) buffer, complete_cb, arg);
}
@@ -338,8 +341,7 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32
TU_ASSERT(usbh_edpt_xfer(dev_addr, ep_data, p_msc->buffer, (uint16_t) cbw->total_bytes));
break;
}
-
- TU_ATTR_FALLTHROUGH; // fallthrough to status stage
+ TU_ATTR_FALLTHROUGH; // fallthrough to data stage
case MSC_STAGE_DATA:
// Status stage
@@ -350,20 +352,19 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32
case MSC_STAGE_STATUS:
// SCSI op is complete
p_msc->stage = MSC_STAGE_IDLE;
-
- if (p_msc->complete_cb) {
+ if (p_msc->complete_cb != NULL) {
tuh_msc_complete_data_t const cb_data = {
.cbw = cbw,
.csw = csw,
.scsi_data = p_msc->buffer,
.user_arg = p_msc->complete_arg
};
- p_msc->complete_cb(dev_addr, &cb_data);
+ (void) p_msc->complete_cb(dev_addr, &cb_data);
}
break;
- // unknown state
default:
+ // unknown state
break;
}
@@ -501,7 +502,7 @@ static bool config_read_capacity_complete(uint8_t dev_addr, tuh_msc_complete_dat
// Capacity response field: Block size and Last LBA are both Big-Endian
scsi_read_capacity10_resp_t* resp = (scsi_read_capacity10_resp_t*) (uintptr_t) enum_buf;
- p_msc->capacity[cbw->lun].block_count = tu_ntohl(resp->last_lba) + 1;
+ p_msc->capacity[cbw->lun].block_count = (uint32_t) (tu_ntohl(resp->last_lba) + 1u);
p_msc->capacity[cbw->lun].block_size = tu_ntohl(resp->block_size);
// Mark enumeration is complete
diff --git a/src/class/mtp/mtp.h b/src/class/mtp/mtp.h
index 40b6dd8b0..236cf98e0 100644
--- a/src/class/mtp/mtp.h
+++ b/src/class/mtp/mtp.h
@@ -799,18 +799,18 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_array(mtp_contain
TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_string(mtp_container_info_t* p_container, uint16_t* utf16) {
uint8_t count = 0;
- while (utf16[count]) {
+ while (utf16[count] != 0u) {
count++;
}
- const uint32_t added_len = 1u + 2u * count;
+ const uint32_t added_len = 1u + (uint32_t) count * 2u;
TU_ASSERT(p_container->header->len + added_len < CFG_TUD_MTP_EP_BUFSIZE, 0);
uint8_t* buf = p_container->payload + p_container->header->len - sizeof(mtp_container_header_t);
*buf++ = count;
p_container->header->len++;
- memcpy(buf, utf16, 2 * count);
- p_container->header->len += 2 * count;
+ memcpy(buf, utf16, 2u * (uint32_t) count);
+ p_container->header->len += 2u * count;
return added_len;
}
@@ -824,7 +824,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_cstring(mtp_conta
// empty string (null only): single zero byte
*buf = 0;
p_container->header->len++;
- return 1;
+ return 1u;
} else {
*buf++ = len;
p_container->header->len++;
@@ -875,8 +875,8 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_auint32(mtp_conta
//
//--------------------------------------------------------------------+
TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_get_string(uint8_t* buf, uint16_t utf16[]) {
- uint8_t nchars = *buf++;
- memcpy(utf16, buf, 2 * nchars);
+ size_t nchars = *buf++;
+ memcpy(utf16, buf, 2u * nchars);
return 1u + 2u * nchars;
}
diff --git a/src/class/mtp/mtp_device.h b/src/class/mtp/mtp_device.h
index 397fbbbce..a33f1dc08 100644
--- a/src/class/mtp/mtp_device.h
+++ b/src/class/mtp/mtp_device.h
@@ -53,12 +53,14 @@ typedef struct {
typedef struct {
uint8_t idx;
uint8_t stage; // control stage
- uint32_t session_id;
- const tusb_control_request_t* request;
// buffer for data stage
- uint8_t* buf;
uint16_t bufsize;
+ uint8_t* buf;
+
+ const tusb_control_request_t* request;
+
+ uint32_t session_id;
} tud_mtp_request_cb_data_t;
// Number of supported operations, events, device properties, capture formats, playback formats
@@ -78,7 +80,7 @@ typedef struct {
/* string fields will be added using append function */ \
}
-typedef MTP_DEVICE_INFO_STRUCT(
+typedef MTP_DEVICE_INFO_STRUCT( //-V2586 [MISRA-C-18.7] Flexible array members should not be declared
sizeof(CFG_TUD_MTP_DEVICEINFO_EXTENSIONS), TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_SUPPORTED_OPERATIONS),
TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_SUPPORTED_EVENTS), TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_SUPPORTED_DEVICE_PROPERTIES),
TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_CAPTURE_FORMATS), TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_PLAYBACK_FORMATS)
diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c
index 335f6ad09..3e19b5f3a 100644
--- a/src/class/net/ncm_device.c
+++ b/src/class/net/ncm_device.c
@@ -50,10 +50,6 @@
#if (CFG_TUD_ENABLED && CFG_TUD_NCM)
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-
#include "device/usbd.h"
#include "device/usbd_pvt.h"
diff --git a/src/class/video/video.h b/src/class/video/video.h
index f348e187b..5bdf4b840 100644
--- a/src/class/video/video.h
+++ b/src/class/video/video.h
@@ -219,11 +219,11 @@ typedef enum {
uint8_t baInterfaceNr[_nitf]; \
}
-typedef tusb_desc_video_control_header_nitf_t() tusb_desc_video_control_header_t;
-typedef tusb_desc_video_control_header_nitf_t(1) tusb_desc_video_control_header_1itf_t;
-typedef tusb_desc_video_control_header_nitf_t(2) tusb_desc_video_control_header_2itf_t;
-typedef tusb_desc_video_control_header_nitf_t(3) tusb_desc_video_control_header_3itf_t;
-typedef tusb_desc_video_control_header_nitf_t(4) tusb_desc_video_control_header_4itf_t;
+typedef tusb_desc_video_control_header_nitf_t() tusb_desc_video_control_header_t; //-V2586 incorrectly detected as flexible array
+typedef tusb_desc_video_control_header_nitf_t(1) tusb_desc_video_control_header_1itf_t; //-V2586 incorrectly detected as flexible array
+typedef tusb_desc_video_control_header_nitf_t(2) tusb_desc_video_control_header_2itf_t; //-V2586 incorrectly detected as flexible array
+typedef tusb_desc_video_control_header_nitf_t(3) tusb_desc_video_control_header_3itf_t; //-V2586 incorrectly detected as flexible array
+typedef tusb_desc_video_control_header_nitf_t(4) tusb_desc_video_control_header_4itf_t; //-V2586 incorrectly detected as flexible array
typedef struct TU_ATTR_PACKED {
uint8_t bLength;
diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index 2c610c469..85e85e75e 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -103,7 +103,7 @@ typedef struct TU_ATTR_PACKED {
uint8_t index_vc; /* index of bound video control interface */
uint8_t index_vs; /* index from the video control interface */
struct {
- uint16_t beg; /* Offset of the begging of video streaming interface descriptor */
+ uint16_t beg; /* Offset of the beginning of video streaming interface descriptor */
uint16_t end; /* Offset of the end of video streaming interface descriptor */
uint16_t cur; /* Offset of the current settings */
uint16_t ep[2]; /* Offset of endpoint descriptors. 0: streaming, 1: still capture */
@@ -244,9 +244,13 @@ static inline uint8_t _desc_ep_addr(void const *desc) {
* @return instance */
static videod_streaming_interface_t* _get_instance_streaming(uint_fast8_t ctl_idx, uint_fast8_t stm_idx) {
videod_interface_t *ctl = &_videod_itf[ctl_idx];
- if (!ctl->beg) return NULL;
+ if (!ctl->beg) {
+ return NULL;
+ }
videod_streaming_interface_t *stm = &_videod_streaming_itf[ctl->stm[stm_idx]];
- if (!stm->desc.beg) return NULL;
+ if (!stm->desc.beg) {
+ return NULL;
+ }
return stm;
}
@@ -255,7 +259,9 @@ static tusb_desc_vc_itf_t const* _get_desc_vc(videod_interface_t const *self) {
}
static tusb_desc_vs_itf_t const* _get_desc_vs(videod_streaming_interface_t const *self) {
- if (!self->desc.cur) return NULL;
+ if (!self->desc.cur) {
+ return NULL;
+ }
uint8_t const *desc = _videod_itf[self->index_vc].beg;
return (tusb_desc_vs_itf_t const*)(desc + self->desc.cur);
}
@@ -366,8 +372,12 @@ static void const* _find_desc_ep(void const *beg, void const *end)
{
for (void const *cur = beg; cur < end; cur = tu_desc_next(cur)) {
uint_fast8_t desc_type = tu_desc_type(cur);
- if (TUSB_DESC_ENDPOINT == desc_type) return cur;
- if (TUSB_DESC_INTERFACE == desc_type) break;
+ if (TUSB_DESC_ENDPOINT == desc_type) {
+ return cur;
+ }
+ if (TUSB_DESC_INTERFACE == desc_type) {
+ break;
+ }
}
return end;
}
@@ -453,8 +463,10 @@ static bool _update_streaming_parameters(videod_streaming_interface_t const *stm
tusb_desc_vs_itf_t const *vs = _get_desc_vs(stm);
uint_fast8_t fmtnum = param->bFormatIndex;
TU_ASSERT(vs && fmtnum <= vs->stm.bNumFormats);
- if (!fmtnum) {
- if (1 < vs->stm.bNumFormats) return true; /* Need to negotiate all variables. */
+ if (0 == fmtnum) {
+ if (1 < vs->stm.bNumFormats) {
+ return true; /* Need to negotiate all variables. */
+ }
fmtnum = 1;
param->bFormatIndex = 1;
}
@@ -492,8 +504,10 @@ static bool _update_streaming_parameters(videod_streaming_interface_t const *stm
uint_fast8_t frmnum = param->bFrameIndex;
TU_ASSERT(frmnum <= fmt->bNumFrameDescriptors);
- if (!frmnum) {
- if (1 < fmt->bNumFrameDescriptors) return true;
+ if (0 == frmnum) {
+ if (1 < fmt->bNumFrameDescriptors) {
+ return true;
+ }
frmnum = 1;
param->bFrameIndex = 1;
}
@@ -502,7 +516,7 @@ static bool _update_streaming_parameters(videod_streaming_interface_t const *stm
/* Set the parameters determined by the frame */
uint_fast32_t frame_size = param->dwMaxVideoFrameSize;
- if (!frame_size) {
+ if (0 == frame_size) {
switch (fmt->bDescriptorSubType) {
case VIDEO_CS_ITF_VS_FORMAT_UNCOMPRESSED:
frame_size = (uint_fast32_t)frm->wWidth * frm->wHeight * fmt->uncompressed.bBitsPerPixel / 8;
@@ -522,7 +536,7 @@ static bool _update_streaming_parameters(videod_streaming_interface_t const *stm
}
uint_fast32_t interval = param->dwFrameInterval;
- if (!interval) {
+ if (0 == interval) {
if ((1 < frm->uncompressed.bFrameIntervalType) ||
((0 == frm->uncompressed.bFrameIntervalType) &&
(frm->uncompressed.dwFrameInterval[1] != frm->uncompressed.dwFrameInterval[0]))) {
@@ -532,7 +546,7 @@ static bool _update_streaming_parameters(videod_streaming_interface_t const *stm
param->dwFrameInterval = interval;
}
uint_fast32_t interval_ms = interval / 10000;
- TU_ASSERT(interval_ms);
+ TU_ASSERT(interval_ms != 0);
uint_fast32_t payload_size = (frame_size + interval_ms - 1) / interval_ms + 2;
if (CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE < payload_size) {
payload_size = CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE;
@@ -550,7 +564,7 @@ static bool _negotiate_streaming_parameters(videod_streaming_interface_t const *
video_probe_and_commit_control_t *param)
{
uint_fast8_t const fmtnum = param->bFormatIndex;
- if (!fmtnum) {
+ if (0 == fmtnum) {
switch (request) {
case VIDEO_REQUEST_GET_MAX:
if (_get_desc_vs(stm))
@@ -581,7 +595,7 @@ static bool _negotiate_streaming_parameters(videod_streaming_interface_t const *
}
uint_fast8_t frmnum = param->bFrameIndex;
- if (!frmnum) {
+ if (0 == frmnum) {
tusb_desc_vs_itf_t const *vs = _get_desc_vs(stm);
TU_ASSERT(vs);
void const *end = _end_of_streaming_descriptor(vs);
@@ -637,7 +651,7 @@ static bool _negotiate_streaming_parameters(videod_streaming_interface_t const *
return true;
}
- if (!param->dwFrameInterval) {
+ if (0 == param->dwFrameInterval) {
tusb_desc_vs_itf_t const *vs = _get_desc_vs(stm);
TU_ASSERT(vs);
void const *end = _end_of_streaming_descriptor(vs);
@@ -686,12 +700,12 @@ static bool _negotiate_streaming_parameters(videod_streaming_interface_t const *
default: return false;
}
param->dwFrameInterval = interval;
- if (!interval) {
+ if (0 == interval) {
param->dwMaxPayloadTransferSize = 0;
} else {
uint_fast32_t frame_size = param->dwMaxVideoFrameSize;
uint_fast32_t payload_size;
- if (!interval_ms) {
+ if (0 == interval_ms) {
payload_size = frame_size + 2;
} else {
payload_size = (frame_size + interval_ms - 1) / interval_ms + 2;
@@ -719,7 +733,7 @@ static bool _close_vc_itf(uint8_t rhport, videod_interface_t *self)
/* The end of the video control interface descriptor. */
void const *end = _end_of_control_descriptor(vc);
- if (vc->std.bNumEndpoints) {
+ if (vc->std.bNumEndpoints != 0) {
/* Find the notification endpoint descriptor. */
cur = _find_desc(cur, end, TUSB_DESC_ENDPOINT);
TU_ASSERT(cur < end);
@@ -757,7 +771,7 @@ static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t
cur += vc->std.bLength + vc->ctl.bLength;
TU_LOG_DRV(" bNumEndpoints %d\r\n", vc->std.bNumEndpoints);
/* Open the notification endpoint if it exist. */
- if (vc->std.bNumEndpoints) {
+ if (vc->std.bNumEndpoints != 0) {
/* Support for 1 endpoint only. */
TU_VERIFY(1 == vc->std.bNumEndpoints);
/* Find the notification endpoint descriptor. */
@@ -843,7 +857,7 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint
stm->desc.ep[i] = (uint16_t) (cur - desc);
TU_LOG_DRV(" open EP%02x\r\n", _desc_ep_addr(cur));
}
- if (altnum) {
+ if (altnum != 0) {
stm->state = VS_STATE_STREAMING;
}
TU_LOG_DRV(" done\r\n");
@@ -929,16 +943,14 @@ static int handle_video_ctl_cs_req(uint8_t rhport, uint8_t stage,
return VIDEO_ERROR_NONE;
case VIDEO_REQUEST_GET_CUR:
- if (stage == CONTROL_STAGE_SETUP)
- {
+ if (stage == CONTROL_STAGE_SETUP) {
TU_VERIFY(1 == request->wLength, VIDEO_ERROR_UNKNOWN);
TU_VERIFY(tud_control_xfer(rhport, request, &self->power_mode, sizeof(self->power_mode)), VIDEO_ERROR_UNKNOWN);
}
return VIDEO_ERROR_NONE;
case VIDEO_REQUEST_GET_INFO:
- if (stage == CONTROL_STAGE_SETUP)
- {
+ if (stage == CONTROL_STAGE_SETUP) {
TU_VERIFY(1 == request->wLength, VIDEO_ERROR_UNKNOWN);
TU_VERIFY(tud_control_xfer(rhport, request, (uint8_t*)(uintptr_t) &_cap_get_set, sizeof(_cap_get_set)), VIDEO_ERROR_UNKNOWN);
}
@@ -951,15 +963,13 @@ static int handle_video_ctl_cs_req(uint8_t rhport, uint8_t stage,
case VIDEO_VC_CTL_REQUEST_ERROR_CODE:
switch (request->bRequest) {
case VIDEO_REQUEST_GET_CUR:
- if (stage == CONTROL_STAGE_SETUP)
- {
+ if (stage == CONTROL_STAGE_SETUP) {
TU_VERIFY(tud_control_xfer(rhport, request, &self->error_code, sizeof(uint8_t)), VIDEO_ERROR_UNKNOWN);
}
return VIDEO_ERROR_NONE;
case VIDEO_REQUEST_GET_INFO:
- if (stage == CONTROL_STAGE_SETUP)
- {
+ if (stage == CONTROL_STAGE_SETUP) {
TU_VERIFY(tud_control_xfer(rhport, request, (uint8_t*)(uintptr_t) &_cap_get, sizeof(_cap_get)), VIDEO_ERROR_UNKNOWN);
}
return VIDEO_ERROR_NONE;
@@ -986,7 +996,7 @@ static int handle_video_ctl_req(uint8_t rhport, uint8_t stage,
case TUSB_REQ_TYPE_CLASS: {
uint_fast8_t entity_id = TU_U16_HIGH(request->wIndex);
- if (!entity_id) {
+ if (0 == entity_id) {
return handle_video_ctl_cs_req(rhport, stage, request, ctl_idx);
} else {
TU_VERIFY(_find_desc_entity(_get_desc_vc(&_videod_itf[ctl_idx]), entity_id), VIDEO_ERROR_INVALID_REQUEST);
@@ -1001,14 +1011,12 @@ static int handle_video_ctl_req(uint8_t rhport, uint8_t stage,
static int handle_video_stm_std_req(uint8_t rhport, uint8_t stage,
tusb_control_request_t const *request,
- uint_fast8_t stm_idx)
-{
+ uint_fast8_t stm_idx) {
TU_LOG_DRV("\r\n");
videod_streaming_interface_t *self = &_videod_streaming_itf[stm_idx];
switch (request->bRequest) {
case TUSB_REQ_GET_INTERFACE:
- if (stage == CONTROL_STAGE_SETUP)
- {
+ if (stage == CONTROL_STAGE_SETUP) {
TU_VERIFY(1 == request->wLength, VIDEO_ERROR_UNKNOWN);
tusb_desc_vs_itf_t const *vs = _get_desc_vs(self);
TU_VERIFY(vs, VIDEO_ERROR_UNKNOWN);
@@ -1075,12 +1083,14 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage,
} else if (stage == CONTROL_STAGE_DATA) {
TU_VERIFY(_update_streaming_parameters(stm, &stm->probe_commit_payload),
VIDEO_ERROR_INVALID_VALUE_WITHIN_RANGE);
+ } else {
+ // nothing to do
}
return VIDEO_ERROR_NONE;
case VIDEO_REQUEST_GET_CUR:
if (stage == CONTROL_STAGE_SETUP) {
- TU_VERIFY(request->wLength, VIDEO_ERROR_UNKNOWN);
+ TU_VERIFY(request->wLength != 0, VIDEO_ERROR_UNKNOWN);
TU_VERIFY(tud_control_xfer(rhport, request, &stm->probe_commit_payload, sizeof(video_probe_and_commit_control_t)), VIDEO_ERROR_UNKNOWN);
}
return VIDEO_ERROR_NONE;
@@ -1090,7 +1100,7 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage,
case VIDEO_REQUEST_GET_RES:
case VIDEO_REQUEST_GET_DEF:
if (stage == CONTROL_STAGE_SETUP) {
- TU_VERIFY(request->wLength, VIDEO_ERROR_UNKNOWN);
+ TU_VERIFY(request->wLength != 0, VIDEO_ERROR_UNKNOWN);
video_probe_and_commit_control_t tmp = stm->probe_commit_payload;
TU_VERIFY(_negotiate_streaming_parameters(stm, request->bRequest, &tmp), VIDEO_ERROR_INVALID_VALUE_WITHIN_RANGE);
TU_VERIFY(tud_control_xfer(rhport, request, &tmp, sizeof(tmp)), VIDEO_ERROR_UNKNOWN);
@@ -1137,12 +1147,14 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage,
hdr->bHeaderLength = sizeof(*hdr);
hdr->bmHeaderInfo = 0;
}
+ } else {
+ // nothing to do
}
return VIDEO_ERROR_NONE;
case VIDEO_REQUEST_GET_CUR:
if (stage == CONTROL_STAGE_SETUP) {
- TU_VERIFY(request->wLength, VIDEO_ERROR_UNKNOWN);
+ TU_VERIFY(request->wLength != 0, VIDEO_ERROR_UNKNOWN);
TU_VERIFY(tud_control_xfer(rhport, request, &stm->probe_commit_payload, sizeof(video_probe_and_commit_control_t)), VIDEO_ERROR_UNKNOWN);
}
return VIDEO_ERROR_NONE;
@@ -1185,14 +1197,15 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage,
static int handle_video_stm_req(uint8_t rhport, uint8_t stage,
tusb_control_request_t const *request,
- uint_fast8_t stm_idx)
-{
+ uint_fast8_t stm_idx) {
switch (request->bmRequestType_bit.type) {
case TUSB_REQ_TYPE_STANDARD:
return handle_video_stm_std_req(rhport, stage, request, stm_idx);
case TUSB_REQ_TYPE_CLASS:
- if (TU_U16_HIGH(request->wIndex)) return VIDEO_ERROR_INVALID_REQUEST;
+ if (0 != TU_U16_HIGH(request->wIndex)) {
+ return VIDEO_ERROR_INVALID_REQUEST;
+ }
return handle_video_stm_cs_req(rhport, stage, request, stm_idx);
default: return VIDEO_ERROR_INVALID_REQUEST;
@@ -1203,11 +1216,12 @@ static int handle_video_stm_req(uint8_t rhport, uint8_t stage,
// APPLICATION API
//--------------------------------------------------------------------+
-bool tud_video_n_connected(uint_fast8_t ctl_idx)
-{
+bool tud_video_n_connected(uint_fast8_t ctl_idx) {
TU_ASSERT(ctl_idx < CFG_TUD_VIDEO);
videod_streaming_interface_t *stm = _get_instance_streaming(ctl_idx, 0);
- if (stm) return true;
+ if (stm != NULL) {
+ return true;
+ }
return false;
}
@@ -1216,15 +1230,21 @@ bool tud_video_n_streaming(uint_fast8_t ctl_idx, uint_fast8_t stm_idx)
TU_ASSERT(ctl_idx < CFG_TUD_VIDEO);
TU_ASSERT(stm_idx < CFG_TUD_VIDEO_STREAMING);
videod_streaming_interface_t *stm = _get_instance_streaming(ctl_idx, stm_idx);
- if (!stm || !stm->desc.ep[0]) return false;
- if (stm->state == VS_STATE_PROBING) return false;
+ if (NULL == stm || 0 == stm->desc.ep[0]) {
+ return false;
+ }
+ if (stm->state == VS_STATE_PROBING) {
+ return false;
+ }
-#ifdef TUP_DCD_EDPT_ISO_ALLOC
+ #ifdef TUP_DCD_EDPT_ISO_ALLOC
uint8_t const *desc = _videod_itf[stm->index_vc].beg;
uint_fast16_t ofs_ep = stm->desc.ep[0];
tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const*)(desc + ofs_ep);
if (ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) {
- if (stm->state == VS_STATE_COMMITTED) return false;
+ if (stm->state == VS_STATE_COMMITTED) {
+ return false;
+ }
}
#endif
@@ -1235,25 +1255,35 @@ bool tud_video_n_frame_xfer(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, void *bu
TU_ASSERT(ctl_idx < CFG_TUD_VIDEO);
TU_ASSERT(stm_idx < CFG_TUD_VIDEO_STREAMING);
- if (!buffer || !bufsize) return false;
+ if (NULL == buffer || 0 == bufsize) {
+ return false;
+ }
videod_streaming_interface_t *stm = _get_instance_streaming(ctl_idx, stm_idx);
videod_streaming_epbuf_t *stm_epbuf = &_videod_streaming_epbuf[ctl_idx];
- if (!stm || !stm->desc.ep[0] || stm->buffer) return false;
- if (stm->state == VS_STATE_PROBING) return false;
+ if (NULL == stm || 0 == stm->desc.ep[0] || stm->buffer) {
+ return false;
+ }
+ if (stm->state == VS_STATE_PROBING) {
+ return false;
+ }
/* Find EP address */
uint8_t const *desc = _videod_itf[stm->index_vc].beg;
uint8_t ep_addr = 0;
for (uint_fast8_t i = 0; i < CFG_TUD_VIDEO_STREAMING; ++i) {
uint_fast16_t ofs_ep = stm->desc.ep[i];
- if (!ofs_ep) continue;
+ if (0 == ofs_ep) {
+ continue;
+ }
ep_addr = _desc_ep_addr(desc + ofs_ep);
break;
}
- if (!ep_addr) return false;
+ if (0 == ep_addr) {
+ return false;
+ }
- TU_VERIFY( usbd_edpt_claim(0, ep_addr) );
+ TU_VERIFY(usbd_edpt_claim(0, ep_addr));
/* update the packet header */
tusb_video_payload_header_t *hdr = (tusb_video_payload_header_t*)stm_epbuf->buf;
hdr->FrameID ^= 1;
@@ -1305,7 +1335,9 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
videod_interface_t *self = NULL;
uint8_t ctl_idx;
for (ctl_idx = 0; ctl_idx < CFG_TUD_VIDEO; ++ctl_idx) {
- if (_videod_itf[ctl_idx].beg) continue;
+ if (NULL != _videod_itf[ctl_idx].beg) {
+ continue;
+ }
self = &_videod_itf[ctl_idx];
break;
}
@@ -1326,7 +1358,9 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
videod_streaming_interface_t *stm = NULL;
/* find free streaming interface handle */
for (uint8_t i = 0; i < CFG_TUD_VIDEO_STREAMING; ++i) {
- if (_videod_streaming_itf[i].desc.beg) continue;
+ if (0 != _videod_streaming_itf[i].desc.beg) {
+ continue;
+ }
stm = &_videod_streaming_itf[i];
self->stm[stm_idx] = i;
break;
@@ -1354,7 +1388,9 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
}
p_desc = tu_desc_next(p_desc);
}
- if(ep_addr > 0 && ep_size > 0) usbd_edpt_iso_alloc(rhport, ep_addr, ep_size);
+ if(ep_addr > 0 && ep_size > 0) {
+ usbd_edpt_iso_alloc(rhport, ep_addr, ep_size);
+ }
#endif
if (0 == stm_idx && 1 == bInCollection) {
/* If there is only one streaming interface and no alternate settings,
@@ -1381,31 +1417,43 @@ bool videod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_
uint_fast8_t itf;
for (itf = 0; itf < CFG_TUD_VIDEO; ++itf) {
void const *desc = _videod_itf[itf].beg;
- if (!desc) continue;
- if (itfnum == _desc_itfnum(desc)) break;
+ if (!desc) {
+ continue;
+ }
+ if (itfnum == _desc_itfnum(desc)) {
+ break;
+ }
}
if (itf < CFG_TUD_VIDEO) {
TU_LOG_DRV(" VC[%d]: ", itf);
err = handle_video_ctl_req(rhport, stage, request, itf);
_videod_itf[itf].error_code = (uint8_t)err;
- if (err) return false;
+ if (0 != err) {
+ return false;
+ }
return true;
}
/* Identify which streaming interface to use */
for (itf = 0; itf < CFG_TUD_VIDEO_STREAMING; ++itf) {
videod_streaming_interface_t *stm = &_videod_streaming_itf[itf];
- if (!stm->desc.beg) continue;
+ if (0 == stm->desc.beg) {
+ continue;
+ }
uint8_t const *desc = _videod_itf[stm->index_vc].beg;
- if (itfnum == _desc_itfnum(desc + stm->desc.beg)) break;
+ if (itfnum == _desc_itfnum(desc + stm->desc.beg)) {
+ break;
+ }
}
if (itf < CFG_TUD_VIDEO_STREAMING) {
TU_LOG_DRV(" VS[%d]: ", itf);
err = handle_video_stm_req(rhport, stage, request, itf);
_videod_streaming_itf[itf].error_code = (uint8_t)err;
- if (err) return false;
+ if (err != 0) {
+ return false;
+ }
return true;
}
return false;
@@ -1421,19 +1469,23 @@ bool videod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3
for (itf = 0; itf < CFG_TUD_VIDEO_STREAMING; ++itf) {
stm = &_videod_streaming_itf[itf];
uint_fast16_t const ep_ofs = stm->desc.ep[0];
- if (!ep_ofs) continue;
+ if (0 == ep_ofs) {
+ continue;
+ }
ctl = &_videod_itf[stm->index_vc];
uint8_t const *desc = ctl->beg;
- if (ep_addr == _desc_ep_addr(desc + ep_ofs)) break;
+ if (ep_addr == _desc_ep_addr(desc + ep_ofs)) {
+ break;
+ }
}
TU_ASSERT(itf < CFG_TUD_VIDEO_STREAMING);
videod_streaming_epbuf_t *stm_epbuf = &_videod_streaming_epbuf[itf];
if (stm->offset < stm->bufsize) {
/* Claim the endpoint */
- TU_VERIFY( usbd_edpt_claim(rhport, ep_addr), 0);
+ TU_VERIFY(usbd_edpt_claim(rhport, ep_addr), 0);
uint_fast16_t pkt_len = _prepare_in_payload(stm, stm_epbuf->buf);
- TU_ASSERT( usbd_edpt_xfer(rhport, ep_addr, stm_epbuf->buf, (uint16_t) pkt_len, false), 0);
+ TU_ASSERT(usbd_edpt_xfer(rhport, ep_addr, stm_epbuf->buf, (uint16_t) pkt_len, false), 0);
} else {
stm->buffer = NULL;
stm->bufsize = 0;
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 6aa7e0bfc..7aa42a2d7 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -77,7 +77,6 @@
#include <inttypes.h>
#include <stddef.h>
#include <string.h>
-#include <stdio.h>
// Tinyusb Common Headers
#include "tusb_option.h"
@@ -112,7 +111,7 @@ extern void* tusb_app_phys_to_virt(void *phys_addr);
//--------------------------------------------------------------------+
//------------- Mem -------------//
-#define tu_memclr(buffer, size) memset((buffer), 0, (size))
+#define tu_memclr(buffer, size) (void) memset((buffer), 0, (size))
#define tu_varclr(_var) tu_memclr(_var, sizeof(*(_var)))
// This is a backport of memset_s from c11
@@ -122,23 +121,29 @@ TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, i
return -1;
}
+ if (count == 0u) {
+ return 0;
+ }
+
if (count > destsz) {
return -1;
}
- memset(dest, ch, count);
+ (void) memset(dest, ch, count);
return 0;
}
// This is a backport of memcpy_s from c11
TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void *src, size_t count) {
- // Validate parameters
if (dest == NULL) {
return -1;
}
- // For memcpy, src may be NULL only if count == 0. Reject otherwise.
- if (src == NULL && count != 0u) {
+ if (count == 0u) {
+ return 0;
+ }
+
+ if (src == NULL) {
return -1;
}
@@ -146,7 +151,7 @@ TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, c
return -1;
}
- memcpy(dest, src, count);
+ (void) memcpy(dest, src, count);
return 0;
}
@@ -231,7 +236,9 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_round_up(uint32_t v, uint32_t f)
// TODO use clz TODO remove
TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_log2(uint32_t value) {
uint8_t result = 0;
- while (value >>= 1) { result++; }
+ while ((value >>= 1u) != 0u) {
+ result++;
+ }
return result;
}
@@ -277,14 +284,12 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void *mem, uint16_
// We have to manually pick up bytes since tu_unaligned_uint32_t will still generate unaligned code
// NOTE: volatile cast to memory to prevent compiler to optimize and generate unaligned code
// TODO Big Endian may need minor changes
-TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32(const void* mem)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32(const void* mem) {
volatile uint8_t const* buf8 = (uint8_t const*) mem;
return tu_u32(buf8[3], buf8[2], buf8[1], buf8[0]);
}
-TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32(void* mem, uint32_t value)
-{
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32(void* mem, uint32_t value) {
volatile uint8_t* buf8 = (uint8_t*) mem;
buf8[0] = tu_u32_byte0(value);
buf8[1] = tu_u32_byte1(value);
@@ -292,20 +297,17 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32(void* mem, uint32_
buf8[3] = tu_u32_byte3(value);
}
-TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16(const void* mem)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16(const void* mem) {
volatile uint8_t const* buf8 = (uint8_t const*) mem;
return tu_u16(buf8[1], buf8[0]);
}
-TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void* mem, uint16_t value)
-{
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void* mem, uint16_t value) {
volatile uint8_t* buf8 = (uint8_t*) mem;
buf8[0] = tu_u16_low(value);
buf8[1] = tu_u16_high(value);
}
-
#else
// MCU that could access unaligned memory natively
@@ -327,35 +329,6 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void *mem, uint16_
#endif
-// To be removed
-//------------- Binary constant -------------//
-#if defined(__GNUC__) && !defined(__CC_ARM)
-
-#define TU_BIN8(x) ((uint8_t) (0b##x))
-#define TU_BIN16(b1, b2) ((uint16_t) (0b##b1##b2))
-#define TU_BIN32(b1, b2, b3, b4) ((uint32_t) (0b##b1##b2##b3##b4))
-
-#else
-
-// internal macro of B8, B16, B32
-#define _B8__(x) (((x&0x0000000FUL)?1:0) \
- +((x&0x000000F0UL)?2:0) \
- +((x&0x00000F00UL)?4:0) \
- +((x&0x0000F000UL)?8:0) \
- +((x&0x000F0000UL)?16:0) \
- +((x&0x00F00000UL)?32:0) \
- +((x&0x0F000000UL)?64:0) \
- +((x&0xF0000000UL)?128:0))
-
-#define TU_BIN8(d) ((uint8_t) _B8__(0x##d##UL))
-#define TU_BIN16(dmsb,dlsb) (((uint16_t)TU_BIN8(dmsb)<<8) + TU_BIN8(dlsb))
-#define TU_BIN32(dmsb,db2,db3,dlsb) \
- (((uint32_t)TU_BIN8(dmsb)<<24) \
- + ((uint32_t)TU_BIN8(db2)<<16) \
- + ((uint32_t)TU_BIN8(db3)<<8) \
- + TU_BIN8(dlsb))
-#endif
-
//--------------------------------------------------------------------+
// Descriptor helper
//--------------------------------------------------------------------+
@@ -382,7 +355,10 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_subtype(void const* desc) {
}
TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_in_bounds(uint8_t const* p_desc, uint8_t const* desc_end) {
- return (p_desc < desc_end) && (tu_desc_next(p_desc) <= desc_end);
+ if (p_desc >= desc_end) {
+ return false;
+ }
+ return tu_desc_next(p_desc) <= desc_end;
}
// find descriptor that match byte1 (type)
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 1ce16f060..7719790d1 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -76,20 +76,20 @@
/*------------------------------------------------------------------*/
/* Count number of arguments of __VA_ARGS__
- * - reference https://stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments
- * - _GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th)
- * - _RSEQ_N() is reverse sequential to N to add padding to have
+ * - reference www.stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments
+ * - TU_GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th)
+ * - TU_NARG_RSEQ_N() is reverse sequential to N to add padding to have
* Nth position is the same as the number of arguments
* - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma)
*------------------------------------------------------------------*/
-#if !defined(__CCRX__)
-#define TU_ARGS_NUM(...) _TU_NARG(_0, ##__VA_ARGS__, _RSEQ_N())
+#if defined(__CCRX__)
+#define TU_ARGS_NUM(...) TU_NARG_IMPL(_0, __VA_ARGS__, TU_NARG_RSEQ_N())
#else
-#define TU_ARGS_NUM(...) _TU_NARG(_0, __VA_ARGS__, _RSEQ_N())
+#define TU_ARGS_NUM(...) TU_NARG_IMPL(_0, ##__VA_ARGS__, TU_NARG_RSEQ_N())
#endif
-#define _TU_NARG(...) _GET_NTH_ARG(__VA_ARGS__)
-#define _GET_NTH_ARG( \
+#define TU_NARG_IMPL(...) TU_GET_NTH_ARG(__VA_ARGS__)
+#define TU_GET_NTH_ARG( \
_1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \
_11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \
_21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \
@@ -97,7 +97,7 @@
_41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \
_51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \
_61,_62,_63,N,...) N
-#define _RSEQ_N() \
+#define TU_NARG_RSEQ_N() \
62,61,60, \
59,58,57,56,55,54,53,52,51,50, \
49,48,47,46,45,44,43,42,41,40, \
@@ -106,29 +106,29 @@
19,18,17,16,15,14,13,12,11,10, \
9,8,7,6,5,4,3,2,1,0
-// Apply an macro X to each of the arguments with an separated of choice
-#define TU_ARGS_APPLY(_X, _s, ...) TU_XSTRCAT(_TU_ARGS_APPLY_, TU_ARGS_NUM(__VA_ARGS__))(_X, _s, __VA_ARGS__)
+// Apply a macro X to each of the arguments with a separation/delimiter
+#define TU_ARGS_APPLY(_X, _s, ...) TU_XSTRCAT(TU_ARGS_APPLY_, TU_ARGS_NUM(__VA_ARGS__))(_X, _s, __VA_ARGS__)
-#define _TU_ARGS_APPLY_1(_X, _s, _a1) _X(_a1)
-#define _TU_ARGS_APPLY_2(_X, _s, _a1, _a2) _X(_a1) _s _X(_a2)
-#define _TU_ARGS_APPLY_3(_X, _s, _a1, _a2, _a3) _X(_a1) _s _TU_ARGS_APPLY_2(_X, _s, _a2, _a3)
-#define _TU_ARGS_APPLY_4(_X, _s, _a1, _a2, _a3, _a4) _X(_a1) _s _TU_ARGS_APPLY_3(_X, _s, _a2, _a3, _a4)
-#define _TU_ARGS_APPLY_5(_X, _s, _a1, _a2, _a3, _a4, _a5) _X(_a1) _s _TU_ARGS_APPLY_4(_X, _s, _a2, _a3, _a4, _a5)
-#define _TU_ARGS_APPLY_6(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6) _X(_a1) _s _TU_ARGS_APPLY_5(_X, _s, _a2, _a3, _a4, _a5, _a6)
-#define _TU_ARGS_APPLY_7(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7) _X(_a1) _s _TU_ARGS_APPLY_6(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7)
-#define _TU_ARGS_APPLY_8(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1) _s _TU_ARGS_APPLY_7(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
+#define TU_ARGS_APPLY_1(_X, _s, _a1) _X(_a1)
+#define TU_ARGS_APPLY_2(_X, _s, _a1, _a2) _X(_a1) _s _X(_a2)
+#define TU_ARGS_APPLY_3(_X, _s, _a1, _a2, _a3) _X(_a1) _s TU_ARGS_APPLY_2(_X, _s, _a2, _a3)
+#define TU_ARGS_APPLY_4(_X, _s, _a1, _a2, _a3, _a4) _X(_a1) _s TU_ARGS_APPLY_3(_X, _s, _a2, _a3, _a4)
+#define TU_ARGS_APPLY_5(_X, _s, _a1, _a2, _a3, _a4, _a5) _X(_a1) _s TU_ARGS_APPLY_4(_X, _s, _a2, _a3, _a4, _a5)
+#define TU_ARGS_APPLY_6(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6) _X(_a1) _s TU_ARGS_APPLY_5(_X, _s, _a2, _a3, _a4, _a5, _a6)
+#define TU_ARGS_APPLY_7(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7) _X(_a1) _s TU_ARGS_APPLY_6(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7)
+#define TU_ARGS_APPLY_8(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1) _s TU_ARGS_APPLY_7(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
-// Apply an macro X to each of the arguments and expand the result with comma
-#define TU_ARGS_APPLY_EXPAND(_X, ...) TU_XSTRCAT(_TU_ARGS_APPLY_EXPAND_, TU_ARGS_NUM(__VA_ARGS__))(_X, __VA_ARGS__)
+// Apply a macro X to each of the arguments and expand the result with comma
+#define TU_ARGS_APPLY_EXPAND(_X, ...) TU_XSTRCAT(TU_ARGS_APPLY_EXPAND_, TU_ARGS_NUM(__VA_ARGS__))(_X, __VA_ARGS__)
-#define _TU_ARGS_APPLY_EXPAND_1(_X, _a1) _X(_a1)
-#define _TU_ARGS_APPLY_EXPAND_2(_X, _a1, _a2) _X(_a1), _X(_a2)
-#define _TU_ARGS_APPLY_EXPAND_3(_X, _a1, _a2, _a3) _X(_a1), _TU_ARGS_APPLY_EXPAND_2(_X, _a2, _a3)
-#define _TU_ARGS_APPLY_EXPAND_4(_X, _a1, _a2, _a3, _a4) _X(_a1), _TU_ARGS_APPLY_EXPAND_3(_X, _a2, _a3, _a4)
-#define _TU_ARGS_APPLY_EXPAND_5(_X, _a1, _a2, _a3, _a4, _a5) _X(_a1), _TU_ARGS_APPLY_EXPAND_4(_X, _a2, _a3, _a4, _a5)
-#define _TU_ARGS_APPLY_EXPAND_6(_X, _a1, _a2, _a3, _a4, _a5, _a6) _X(_a1), _TU_ARGS_APPLY_EXPAND_5(_X, _a2, _a3, _a4, _a5, _a6)
-#define _TU_ARGS_APPLY_EXPAND_7(_X, _a1, _a2, _a3, _a4, _a5, _a6, _a7) _X(_a1), _TU_ARGS_APPLY_EXPAND_6(_X, _a2, _a3, _a4, _a5, _a6, _a7)
-#define _TU_ARGS_APPLY_EXPAND_8(_X, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1), _TU_ARGS_APPLY_EXPAND_7(_X, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
+#define TU_ARGS_APPLY_EXPAND_1(_X, _a1) _X(_a1)
+#define TU_ARGS_APPLY_EXPAND_2(_X, _a1, _a2) _X(_a1), _X(_a2)
+#define TU_ARGS_APPLY_EXPAND_3(_X, _a1, _a2, _a3) _X(_a1), TU_ARGS_APPLY_EXPAND_2(_X, _a2, _a3)
+#define TU_ARGS_APPLY_EXPAND_4(_X, _a1, _a2, _a3, _a4) _X(_a1), TU_ARGS_APPLY_EXPAND_3(_X, _a2, _a3, _a4)
+#define TU_ARGS_APPLY_EXPAND_5(_X, _a1, _a2, _a3, _a4, _a5) _X(_a1), TU_ARGS_APPLY_EXPAND_4(_X, _a2, _a3, _a4, _a5)
+#define TU_ARGS_APPLY_EXPAND_6(_X, _a1, _a2, _a3, _a4, _a5, _a6) _X(_a1), TU_ARGS_APPLY_EXPAND_5(_X, _a2, _a3, _a4, _a5, _a6)
+#define TU_ARGS_APPLY_EXPAND_7(_X, _a1, _a2, _a3, _a4, _a5, _a6, _a7) _X(_a1), TU_ARGS_APPLY_EXPAND_6(_X, _a2, _a3, _a4, _a5, _a6, _a7)
+#define TU_ARGS_APPLY_EXPAND_8(_X, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1), TU_ARGS_APPLY_EXPAND_7(_X, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
//--------------------------------------------------------------------+
// Macro for function default arguments
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index e3f9d3f18..e0e09f5ce 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -55,7 +55,8 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent);
extern int CFG_TUSB_DEBUG_PRINTF(const char *format, ...);
#define tu_printf CFG_TUSB_DEBUG_PRINTF
#else
- #define tu_printf printf
+ #include <stdio.h>
+ #define tu_printf(...) (void) printf(__VA_ARGS__)
#endif
TU_ATTR_ALWAYS_INLINE static inline void tu_print_buf(uint8_t const* buf, uint32_t bufsize) {
@@ -118,7 +119,9 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3
// not found return the key value in hex
static char not_found[11];
- snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long) key);
+ if (snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long) key) <= 0) {
+ not_found[0] = 0;
+ }
return not_found;
}
diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index f7679556f..419046b8b 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -28,7 +28,7 @@
#include "osal/osal.h"
#include "tusb_fifo.h"
-#define TU_FIFO_DBG 0
+#define TU_FIFO_DBG 0
// Suppress IAR warning
// Warning[Pa082]: undefined behavior: the order of volatile accesses is undefined in this statement
@@ -38,14 +38,16 @@
#if OSAL_MUTEX_REQUIRED
-TU_ATTR_ALWAYS_INLINE static inline void _ff_lock(osal_mutex_t mutex)
-{
- if (mutex) osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER);
+TU_ATTR_ALWAYS_INLINE static inline void _ff_lock(osal_mutex_t mutex) {
+ if (mutex != NULL) {
+ osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER);
+ }
}
-TU_ATTR_ALWAYS_INLINE static inline void _ff_unlock(osal_mutex_t mutex)
-{
- if (mutex) osal_mutex_unlock(mutex);
+TU_ATTR_ALWAYS_INLINE static inline void _ff_unlock(osal_mutex_t mutex) {
+ if (mutex != NULL) {
+ osal_mutex_unlock(mutex);
+ }
}
#else
@@ -59,27 +61,27 @@ TU_ATTR_ALWAYS_INLINE static inline void _ff_unlock(osal_mutex_t mutex)
* \brief Write modes intended to allow special read and write functions to be able to
* copy data to and from USB hardware FIFOs as needed for e.g. STM32s and others
*/
-typedef enum
-{
- TU_FIFO_COPY_INC, ///< Copy from/to an increasing source/destination address - default mode
+typedef enum {
+ TU_FIFO_COPY_INC, ///< Copy from/to an increasing source/destination address - default mode
#ifdef TUP_MEM_CONST_ADDR
TU_FIFO_COPY_CST_FULL_WORDS, ///< Copy from/to a constant source/destination address - required for e.g. STM32 to write into USB hardware FIFO
#endif
} tu_fifo_copy_mode_t;
-bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_size, bool overwritable)
-{
+bool tu_fifo_config(tu_fifo_t *f, void *buffer, uint16_t depth, uint16_t item_size, bool overwritable) {
// Limit index space to 2*depth - this allows for a fast "modulo" calculation
// but limits the maximum depth to 2^16/2 = 2^15 and buffer overflows are detectable
// only if overflow happens once (important for unsupervised DMA applications)
- if (depth > 0x8000) return false;
+ if (depth > 0x8000) {
+ return false;
+ }
_ff_lock(f->mutex_wr);
_ff_lock(f->mutex_rd);
- f->buffer = (uint8_t*) buffer;
+ f->buffer = (uint8_t *)buffer;
f->depth = depth;
- f->item_size = (uint16_t) (item_size & 0x7FFF);
+ f->item_size = (uint16_t)(item_size & 0x7FFF);
f->overwritable = overwritable;
f->rd_idx = 0;
f->wr_idx = 0;
@@ -98,22 +100,19 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si
// Intended to be used to read from hardware USB FIFO in e.g. STM32 where all data is read from a constant address
// Code adapted from dcd_synopsys.c
// TODO generalize with configurable 1 byte or 4 byte each read
-static void _ff_push_const_addr(uint8_t * ff_buf, const void * app_buf, uint16_t len)
-{
- volatile const uint32_t * reg_rx = (volatile const uint32_t *) app_buf;
+static void _ff_push_const_addr(uint8_t *ff_buf, const void *app_buf, uint16_t len) {
+ const volatile uint32_t *reg_rx = (volatile const uint32_t *)app_buf;
// Reading full available 32 bit words from const app address
uint16_t full_words = len >> 2;
- while(full_words--)
- {
+ while (full_words--) {
tu_unaligned_write32(ff_buf, *reg_rx);
ff_buf += 4;
}
// Read the remaining 1-3 bytes from const app address
- uint8_t const bytes_rem = len & 0x03;
- if ( bytes_rem )
- {
+ const uint8_t bytes_rem = len & 0x03;
+ if (bytes_rem) {
uint32_t tmp32 = *reg_rx;
memcpy(ff_buf, &tmp32, bytes_rem);
}
@@ -121,22 +120,19 @@ static void _ff_push_const_addr(uint8_t * ff_buf, const void * app_buf, uint16_t
// Intended to be used to write to hardware USB FIFO in e.g. STM32
// where all data is written to a constant address in full word copies
-static void _ff_pull_const_addr(void * app_buf, const uint8_t * ff_buf, uint16_t len)
-{
- volatile uint32_t * reg_tx = (volatile uint32_t *) app_buf;
+static void _ff_pull_const_addr(void *app_buf, const uint8_t *ff_buf, uint16_t len) {
+ volatile uint32_t *reg_tx = (volatile uint32_t *)app_buf;
// Write full available 32 bit words to const address
uint16_t full_words = len >> 2;
- while(full_words--)
- {
+ while (full_words--) {
*reg_tx = tu_unaligned_read32(ff_buf);
ff_buf += 4;
}
// Write the remaining 1-3 bytes into const address
- uint8_t const bytes_rem = len & 0x03;
- if ( bytes_rem )
- {
+ const uint8_t bytes_rem = len & 0x03;
+ if (bytes_rem) {
uint32_t tmp32 = 0;
memcpy(&tmp32, ff_buf, bytes_rem);
@@ -146,33 +142,27 @@ static void _ff_pull_const_addr(void * app_buf, const uint8_t * ff_buf, uint16_t
#endif
// send one item to fifo WITHOUT updating write pointer
-static inline void _ff_push(tu_fifo_t* f, void const * app_buf, uint16_t rel)
-{
+static inline void _ff_push(tu_fifo_t *f, const void *app_buf, uint16_t rel) {
memcpy(f->buffer + (rel * f->item_size), app_buf, f->item_size);
}
// send n items to fifo WITHOUT updating write pointer
-static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t wr_ptr, tu_fifo_copy_mode_t copy_mode)
-{
- uint16_t const lin_count = f->depth - wr_ptr;
- uint16_t const wrap_count = n - lin_count;
+static void _ff_push_n(tu_fifo_t *f, const void *app_buf, uint16_t n, uint16_t wr_ptr, tu_fifo_copy_mode_t copy_mode) {
+ const uint16_t lin_count = f->depth - wr_ptr;
+ const uint16_t wrap_count = n - lin_count;
- uint16_t lin_bytes = lin_count * f->item_size;
+ uint16_t lin_bytes = lin_count * f->item_size;
uint16_t wrap_bytes = wrap_count * f->item_size;
// current buffer of fifo
- uint8_t* ff_buf = f->buffer + (wr_ptr * f->item_size);
+ uint8_t *ff_buf = f->buffer + (wr_ptr * f->item_size);
- switch (copy_mode)
- {
+ switch (copy_mode) {
case TU_FIFO_COPY_INC:
- if(n <= lin_count)
- {
+ if (n <= lin_count) {
// Linear only
- memcpy(ff_buf, app_buf, n*f->item_size);
- }
- else
- {
+ memcpy(ff_buf, app_buf, n * f->item_size);
+ } else {
// Wrap around
// Write data to linear part of buffer
@@ -180,19 +170,17 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t
// Write data wrapped around
// TU_ASSERT(nWrap_bytes <= f->depth, );
- memcpy(f->buffer, ((uint8_t const*) app_buf) + lin_bytes, wrap_bytes);
+ memcpy(f->buffer, ((const uint8_t *)app_buf) + lin_bytes, wrap_bytes);
}
break;
+
#ifdef TUP_MEM_CONST_ADDR
case TU_FIFO_COPY_CST_FULL_WORDS:
// Intended for hardware buffers from which it can be read word by word only
- if(n <= lin_count)
- {
+ if (n <= lin_count) {
// Linear only
- _ff_push_const_addr(ff_buf, app_buf, n*f->item_size);
- }
- else
- {
+ _ff_push_const_addr(ff_buf, app_buf, n * f->item_size);
+ } else {
// Wrap around case
// Write full words to linear part of buffer
@@ -202,83 +190,80 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t
// There could be odd 1-3 bytes before the wrap-around boundary
uint8_t rem = lin_bytes & 0x03;
- if (rem > 0)
- {
- volatile const uint32_t * rx_fifo = (volatile const uint32_t *) app_buf;
+ if (rem > 0) {
+ const volatile uint32_t *rx_fifo = (volatile const uint32_t *)app_buf;
- uint8_t remrem = (uint8_t) tu_min16(wrap_bytes, 4-rem);
+ uint8_t remrem = (uint8_t)tu_min16(wrap_bytes, 4 - rem);
wrap_bytes -= remrem;
- uint32_t tmp32 = *rx_fifo;
- uint8_t * src_u8 = ((uint8_t *) &tmp32);
+ uint32_t tmp32 = *rx_fifo;
+ uint8_t *src_u8 = ((uint8_t *)&tmp32);
// Write 1-3 bytes before wrapped boundary
- while(rem--) *ff_buf++ = *src_u8++;
+ while (rem--) {
+ *ff_buf++ = *src_u8++;
+ }
// Read more bytes to beginning to complete a word
ff_buf = f->buffer;
- while(remrem--) *ff_buf++ = *src_u8++;
- }
- else
- {
+ while (remrem--) {
+ *ff_buf++ = *src_u8++;
+ }
+ } else {
ff_buf = f->buffer; // wrap around to beginning
}
// Write data wrapped part
- if (wrap_bytes > 0) _ff_push_const_addr(ff_buf, app_buf, wrap_bytes);
+ if (wrap_bytes > 0) {
+ _ff_push_const_addr(ff_buf, app_buf, wrap_bytes);
+ }
}
break;
#endif
- default: break;
+
+ default:
+ break; // unknown mode
}
}
// get one item from fifo WITHOUT updating read pointer
-static inline void _ff_pull(tu_fifo_t* f, void * app_buf, uint16_t rel)
-{
+static inline void _ff_pull(tu_fifo_t *f, void *app_buf, uint16_t rel) {
memcpy(app_buf, f->buffer + (rel * f->item_size), f->item_size);
}
// get n items from fifo WITHOUT updating read pointer
-static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rd_ptr, tu_fifo_copy_mode_t copy_mode)
-{
- uint16_t const lin_count = f->depth - rd_ptr;
- uint16_t const wrap_count = n - lin_count; // only used if wrapped
+static void _ff_pull_n(tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd_ptr, tu_fifo_copy_mode_t copy_mode) {
+ const uint16_t lin_count = f->depth - rd_ptr;
+ const uint16_t wrap_count = n - lin_count; // only used if wrapped
- uint16_t lin_bytes = lin_count * f->item_size;
+ uint16_t lin_bytes = lin_count * f->item_size;
uint16_t wrap_bytes = wrap_count * f->item_size;
// current buffer of fifo
- uint8_t* ff_buf = f->buffer + (rd_ptr * f->item_size);
+ uint8_t *ff_buf = f->buffer + (rd_ptr * f->item_size);
- switch (copy_mode)
- {
+ switch (copy_mode) {
case TU_FIFO_COPY_INC:
- if ( n <= lin_count )
- {
+ if (n <= lin_count) {
// Linear only
- memcpy(app_buf, ff_buf, n*f->item_size);
- }
- else
- {
+ memcpy(app_buf, ff_buf, n * f->item_size);
+ } else {
// Wrap around
// Read data from linear part of buffer
memcpy(app_buf, ff_buf, lin_bytes);
// Read data wrapped part
- memcpy((uint8_t*) app_buf + lin_bytes, f->buffer, wrap_bytes);
+ memcpy((uint8_t *)app_buf + lin_bytes, f->buffer, wrap_bytes);
}
- break;
+ break;
+
#ifdef TUP_MEM_CONST_ADDR
case TU_FIFO_COPY_CST_FULL_WORDS:
- if ( n <= lin_count )
- {
+ if (n <= lin_count) {
// Linear only
- _ff_pull_const_addr(app_buf, ff_buf, n*f->item_size);
- }
- else
- {
+ _ff_pull_const_addr(app_buf, ff_buf, n * f->item_size);
+ } else {
// Wrap around case
// Read full words from linear part of buffer
@@ -288,36 +273,41 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rd_ptr,
// There could be odd 1-3 bytes before the wrap-around boundary
uint8_t rem = lin_bytes & 0x03;
- if (rem > 0)
- {
- volatile uint32_t * reg_tx = (volatile uint32_t *) app_buf;
+ if (rem > 0) {
+ volatile uint32_t *reg_tx = (volatile uint32_t *)app_buf;
- uint8_t remrem = (uint8_t) tu_min16(wrap_bytes, 4-rem);
+ uint8_t remrem = (uint8_t)tu_min16(wrap_bytes, 4 - rem);
wrap_bytes -= remrem;
- uint32_t tmp32=0;
- uint8_t * dst_u8 = (uint8_t *)&tmp32;
+ uint32_t tmp32 = 0;
+ uint8_t *dst_u8 = (uint8_t *)&tmp32;
// Read 1-3 bytes before wrapped boundary
- while(rem--) *dst_u8++ = *ff_buf++;
+ while (rem--) {
+ *dst_u8++ = *ff_buf++;
+ }
// Read more bytes from beginning to complete a word
ff_buf = f->buffer;
- while(remrem--) *dst_u8++ = *ff_buf++;
+ while (remrem--) {
+ *dst_u8++ = *ff_buf++;
+ }
*reg_tx = tmp32;
- }
- else
- {
+ } else {
ff_buf = f->buffer; // wrap around to beginning
}
// Read data wrapped part
- if (wrap_bytes > 0) _ff_pull_const_addr(app_buf, ff_buf, wrap_bytes);
+ if (wrap_bytes > 0) {
+ _ff_pull_const_addr(app_buf, ff_buf, wrap_bytes);
+ }
}
- break;
+ break;
#endif
- default: break;
+
+ default:
+ break; // unknown mode
}
}
@@ -326,24 +316,18 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rd_ptr,
//--------------------------------------------------------------------+
// return only the index difference and as such can be used to determine an overflow i.e overflowable count
-TU_ATTR_ALWAYS_INLINE static inline
-uint16_t _ff_count(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint16_t _ff_count(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) {
// In case we have non-power of two depth we need a further modification
- if (wr_idx >= rd_idx)
- {
- return (uint16_t) (wr_idx - rd_idx);
- } else
- {
- return (uint16_t) (2*depth - (rd_idx - wr_idx));
+ if (wr_idx >= rd_idx) {
+ return (uint16_t)(wr_idx - rd_idx);
+ } else {
+ return (uint16_t)(2 * depth - (rd_idx - wr_idx));
}
}
// return remaining slot in fifo
-TU_ATTR_ALWAYS_INLINE static inline
-uint16_t _ff_remaining(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx)
-{
- uint16_t const count = _ff_count(depth, wr_idx, rd_idx);
+TU_ATTR_ALWAYS_INLINE static inline uint16_t _ff_remaining(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) {
+ const uint16_t count = _ff_count(depth, wr_idx, rd_idx);
return (depth > count) ? (depth - count) : 0;
}
@@ -353,16 +337,14 @@ uint16_t _ff_remaining(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx)
// Advance an absolute index
// "absolute" index is only in the range of [0..2*depth)
-static uint16_t advance_index(uint16_t depth, uint16_t idx, uint16_t offset)
-{
+static uint16_t advance_index(uint16_t depth, uint16_t idx, uint16_t offset) {
// We limit the index space of p such that a correct wrap around happens
// Check for a wrap around or if we are in unused index space - This has to be checked first!!
// We are exploiting the wrap around to the correct index
- uint16_t new_idx = (uint16_t) (idx + offset);
- if ( (idx > new_idx) || (new_idx >= 2*depth) )
- {
- uint16_t const non_used_index_space = (uint16_t) (UINT16_MAX - (2*depth-1));
- new_idx = (uint16_t) (new_idx + non_used_index_space);
+ uint16_t new_idx = (uint16_t)(idx + offset);
+ if ((idx > new_idx) || (new_idx >= 2 * depth)) {
+ const uint16_t non_used_index_space = (uint16_t)(UINT16_MAX - (2 * depth - 1));
+ new_idx = (uint16_t)(new_idx + non_used_index_space);
}
return new_idx;
@@ -370,14 +352,12 @@ static uint16_t advance_index(uint16_t depth, uint16_t idx, uint16_t offset)
#if 0 // not used but
// Backward an absolute index
-static uint16_t backward_index(uint16_t depth, uint16_t idx, uint16_t offset)
-{
+static uint16_t backward_index(uint16_t depth, uint16_t idx, uint16_t offset) {
// We limit the index space of p such that a correct wrap around happens
// Check for a wrap around or if we are in unused index space - This has to be checked first!!
// We are exploiting the wrap around to the correct index
uint16_t new_idx = (uint16_t) (idx - offset);
- if ( (idx < new_idx) || (new_idx >= 2*depth) )
- {
+ if ( (idx < new_idx) || (new_idx >= 2*depth) ) {
uint16_t const non_used_index_space = (uint16_t) (UINT16_MAX - (2*depth-1));
new_idx = (uint16_t) (new_idx - non_used_index_space);
}
@@ -387,26 +367,22 @@ static uint16_t backward_index(uint16_t depth, uint16_t idx, uint16_t offset)
#endif
// index to pointer, simply an modulo with minus.
-TU_ATTR_ALWAYS_INLINE static inline
-uint16_t idx2ptr(uint16_t depth, uint16_t idx)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint16_t idx2ptr(uint16_t depth, uint16_t idx) {
// Only run at most 3 times since index is limit in the range of [0..2*depth)
- while ( idx >= depth ) idx -= depth;
+ while (idx >= depth) {
+ idx -= depth;
+ }
return idx;
}
// Works on local copies of w
// When an overwritable fifo is overflowed, rd_idx will be re-index so that it forms
// an full fifo i.e _ff_count() = depth
-TU_ATTR_ALWAYS_INLINE static inline
-uint16_t _ff_correct_read_index(tu_fifo_t* f, uint16_t wr_idx)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint16_t _ff_correct_read_index(tu_fifo_t *f, uint16_t wr_idx) {
uint16_t rd_idx;
- if ( wr_idx >= f->depth )
- {
+ if (wr_idx >= f->depth) {
rd_idx = wr_idx - f->depth;
- }else
- {
+ } else {
rd_idx = wr_idx + f->depth;
}
@@ -417,16 +393,16 @@ uint16_t _ff_correct_read_index(tu_fifo_t* f, uint16_t wr_idx)
// Works on local copies of w and r
// Must be protected by mutexes since in case of an overflow read pointer gets modified
-static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16_t rd_idx)
-{
+static bool _tu_fifo_peek(tu_fifo_t *f, void *p_buffer, uint16_t wr_idx, uint16_t rd_idx) {
uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx);
// nothing to peek
- if ( cnt == 0 ) return false;
+ if (cnt == 0) {
+ return false;
+ }
// Check overflow and correct if required
- if ( cnt > f->depth )
- {
+ if (cnt > f->depth) {
rd_idx = _ff_correct_read_index(f, wr_idx);
}
@@ -440,22 +416,25 @@ static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16
// Works on local copies of w and r
// Must be protected by mutexes since in case of an overflow read pointer gets modified
-static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx, tu_fifo_copy_mode_t copy_mode)
-{
+static uint16_t _tu_fifo_peek_n(
+ tu_fifo_t *f, void *p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx, tu_fifo_copy_mode_t copy_mode) {
uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx);
// nothing to peek
- if ( cnt == 0 ) return 0;
+ if (cnt == 0) {
+ return 0;
+ }
// Check overflow and correct if required
- if ( cnt > f->depth )
- {
+ if (cnt > f->depth) {
rd_idx = _ff_correct_read_index(f, wr_idx);
- cnt = f->depth;
+ cnt = f->depth;
}
// Check if we can read something at and after offset - if too less is available we read what remains
- if ( cnt < n ) n = cnt;
+ if (cnt < n) {
+ n = cnt;
+ }
uint16_t rd_ptr = idx2ptr(f->depth, rd_idx);
@@ -465,40 +444,36 @@ static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint1
return n;
}
-static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu_fifo_copy_mode_t copy_mode)
-{
- if ( n == 0 ) return 0;
+static uint16_t _tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n, tu_fifo_copy_mode_t copy_mode) {
+ if (n == 0) {
+ return 0;
+ }
_ff_lock(f->mutex_wr);
uint16_t wr_idx = f->wr_idx;
uint16_t rd_idx = f->rd_idx;
- uint8_t const* buf8 = (uint8_t const*) data;
+ const uint8_t *buf8 = (const uint8_t *)data;
- TU_LOG(TU_FIFO_DBG, "rd = %3u, wr = %3u, count = %3u, remain = %3u, n = %3u: ",
- rd_idx, wr_idx, _ff_count(f->depth, wr_idx, rd_idx), _ff_remaining(f->depth, wr_idx, rd_idx), n);
+ TU_LOG(
+ TU_FIFO_DBG, "rd = %3u, wr = %3u, count = %3u, remain = %3u, n = %3u: ", rd_idx, wr_idx,
+ _ff_count(f->depth, wr_idx, rd_idx), _ff_remaining(f->depth, wr_idx, rd_idx), n);
- if ( !f->overwritable )
- {
+ if (!f->overwritable) {
// limit up to full
- uint16_t const remain = _ff_remaining(f->depth, wr_idx, rd_idx);
- n = tu_min16(n, remain);
- }
- else
- {
+ const uint16_t remain = _ff_remaining(f->depth, wr_idx, rd_idx);
+ n = tu_min16(n, remain);
+ } else {
// In over-writable mode, fifo_write() is allowed even when fifo is full. In such case,
// oldest data in fifo i.e at read pointer data will be overwritten
// Note: we can modify read buffer contents but we must not modify the read index itself within a write function!
// Since it would end up in a race condition with read functions!
- if ( n >= f->depth )
- {
+ if (n >= f->depth) {
// Only copy last part
- if ( copy_mode == TU_FIFO_COPY_INC )
- {
+ if (copy_mode == TU_FIFO_COPY_INC) {
buf8 += (n - f->depth) * f->item_size;
- }else
- {
+ } else {
// TODO should read from hw fifo to discard data, however reading an odd number could
// accidentally discard data.
}
@@ -507,12 +482,9 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu
// We start writing at the read pointer's position since we fill the whole buffer
wr_idx = rd_idx;
- }
- else
- {
- uint16_t const overflowable_count = _ff_count(f->depth, wr_idx, rd_idx);
- if (overflowable_count + n >= 2*f->depth)
- {
+ } else {
+ const uint16_t overflowable_count = _ff_count(f->depth, wr_idx, rd_idx);
+ if (overflowable_count + n >= 2 * f->depth) {
// Double overflowed
// Index is bigger than the allowed range [0,2*depth)
// re-position write index to have a full fifo after pushed
@@ -522,8 +494,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu
// However memmove() is expensive due to actual copying + wrapping consideration.
// Also race condition could happen anyway if read() is invoke while moving result in corrupted memory
// currently deliberately not implemented --> result in incorrect data read back
- }else
- {
+ } else {
// normal + single overflowed:
// Index is in the range of [0,2*depth) and thus detect and recoverable. Recovering is handled in read()
// Therefore we just increase write index
@@ -532,16 +503,11 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu
}
}
- if (n)
- {
+ if (n) {
uint16_t wr_ptr = idx2ptr(f->depth, wr_idx);
-
TU_LOG(TU_FIFO_DBG, "actual_n = %u, wr_ptr = %u", n, wr_ptr);
- // Write data
_ff_push_n(f, buf8, n, wr_ptr, copy_mode);
-
- // Advance index
f->wr_idx = advance_index(f->depth, wr_idx, n);
TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\r\n", f->wr_idx);
@@ -552,8 +518,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu
return n;
}
-static uint16_t _tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n, tu_fifo_copy_mode_t copy_mode)
-{
+static uint16_t _tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n, tu_fifo_copy_mode_t copy_mode) {
_ff_lock(f->mutex_rd);
// Peek the data
@@ -586,8 +551,7 @@ static uint16_t _tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n, tu_fifo
@returns Number of items in FIFO
*/
/******************************************************************************/
-uint16_t tu_fifo_count(tu_fifo_t* f)
-{
+uint16_t tu_fifo_count(tu_fifo_t *f) {
return tu_min16(_ff_count(f->depth, f->wr_idx, f->rd_idx), f->depth);
}
@@ -604,8 +568,7 @@ uint16_t tu_fifo_count(tu_fifo_t* f)
@returns Number of items in FIFO
*/
/******************************************************************************/
-bool tu_fifo_empty(tu_fifo_t* f)
-{
+bool tu_fifo_empty(tu_fifo_t *f) {
return f->wr_idx == f->rd_idx;
}
@@ -622,8 +585,7 @@ bool tu_fifo_empty(tu_fifo_t* f)
@returns Number of items in FIFO
*/
/******************************************************************************/
-bool tu_fifo_full(tu_fifo_t* f)
-{
+bool tu_fifo_full(tu_fifo_t *f) {
return _ff_count(f->depth, f->wr_idx, f->rd_idx) >= f->depth;
}
@@ -640,8 +602,7 @@ bool tu_fifo_full(tu_fifo_t* f)
@returns Number of items in FIFO
*/
/******************************************************************************/
-uint16_t tu_fifo_remaining(tu_fifo_t* f)
-{
+uint16_t tu_fifo_remaining(tu_fifo_t *f) {
return _ff_remaining(f->depth, f->wr_idx, f->rd_idx);
}
@@ -666,14 +627,12 @@ uint16_t tu_fifo_remaining(tu_fifo_t* f)
@returns True if overflow happened
*/
/******************************************************************************/
-bool tu_fifo_overflowed(tu_fifo_t* f)
-{
+bool tu_fifo_overflowed(tu_fifo_t *f) {
return _ff_count(f->depth, f->wr_idx, f->rd_idx) > f->depth;
}
// Only use in case tu_fifo_overflow() returned true!
-void tu_fifo_correct_read_pointer(tu_fifo_t* f)
-{
+void tu_fifo_correct_read_pointer(tu_fifo_t *f) {
_ff_lock(f->mutex_rd);
_ff_correct_read_index(f, f->wr_idx);
_ff_unlock(f->mutex_rd);
@@ -695,8 +654,7 @@ void tu_fifo_correct_read_pointer(tu_fifo_t* f)
@returns TRUE if the queue is not empty
*/
/******************************************************************************/
-bool tu_fifo_read(tu_fifo_t* f, void * buffer)
-{
+bool tu_fifo_read(tu_fifo_t *f, void *buffer) {
_ff_lock(f->mutex_rd);
// Peek the data
@@ -726,8 +684,7 @@ bool tu_fifo_read(tu_fifo_t* f, void * buffer)
@returns number of items read from the FIFO
*/
/******************************************************************************/
-uint16_t tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n)
-{
+uint16_t tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n) {
return _tu_fifo_read_n(f, buffer, n, TU_FIFO_COPY_INC);
}
@@ -749,8 +706,7 @@ uint16_t tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n)
@returns number of items read from the FIFO
*/
/******************************************************************************/
-uint16_t tu_fifo_read_n_const_addr_full_words(tu_fifo_t* f, void * buffer, uint16_t n)
-{
+uint16_t tu_fifo_read_n_const_addr_full_words(tu_fifo_t *f, void *buffer, uint16_t n) {
return _tu_fifo_read_n(f, buffer, n, TU_FIFO_COPY_CST_FULL_WORDS);
}
#endif
@@ -768,8 +724,7 @@ uint16_t tu_fifo_read_n_const_addr_full_words(tu_fifo_t* f, void * buffer, uint1
@returns TRUE if the queue is not empty
*/
/******************************************************************************/
-bool tu_fifo_peek(tu_fifo_t* f, void * p_buffer)
-{
+bool tu_fifo_peek(tu_fifo_t *f, void *p_buffer) {
_ff_lock(f->mutex_rd);
bool ret = _tu_fifo_peek(f, p_buffer, f->wr_idx, f->rd_idx);
_ff_unlock(f->mutex_rd);
@@ -791,8 +746,7 @@ bool tu_fifo_peek(tu_fifo_t* f, void * p_buffer)
@returns Number of bytes written to p_buffer
*/
/******************************************************************************/
-uint16_t tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n)
-{
+uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n) {
_ff_lock(f->mutex_rd);
uint16_t ret = _tu_fifo_peek_n(f, p_buffer, n, f->wr_idx, f->rd_idx, TU_FIFO_COPY_INC);
_ff_unlock(f->mutex_rd);
@@ -815,27 +769,19 @@ uint16_t tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n)
FIFO will always return TRUE)
*/
/******************************************************************************/
-bool tu_fifo_write(tu_fifo_t* f, const void * data)
-{
+bool tu_fifo_write(tu_fifo_t *f, const void *data) {
_ff_lock(f->mutex_wr);
- bool ret;
- uint16_t const wr_idx = f->wr_idx;
+ bool ret;
+ const uint16_t wr_idx = f->wr_idx;
- if ( tu_fifo_full(f) && !f->overwritable )
- {
+ if (tu_fifo_full(f) && !f->overwritable) {
ret = false;
- }else
- {
+ } else {
uint16_t wr_ptr = idx2ptr(f->depth, wr_idx);
-
- // Write data
_ff_push(f, data, wr_ptr);
-
- // Advance pointer
f->wr_idx = advance_index(f->depth, wr_idx, 1);
-
- ret = true;
+ ret = true;
}
_ff_unlock(f->mutex_wr);
@@ -857,8 +803,7 @@ bool tu_fifo_write(tu_fifo_t* f, const void * data)
@return Number of written elements
*/
/******************************************************************************/
-uint16_t tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n)
-{
+uint16_t tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n) {
return _tu_fifo_write_n(f, data, n, TU_FIFO_COPY_INC);
}
@@ -878,8 +823,7 @@ uint16_t tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n)
@return Number of written elements
*/
/******************************************************************************/
-uint16_t tu_fifo_write_n_const_addr_full_words(tu_fifo_t* f, const void * data, uint16_t n)
-{
+uint16_t tu_fifo_write_n_const_addr_full_words(tu_fifo_t *f, const void *data, uint16_t n) {
return _tu_fifo_write_n(f, data, n, TU_FIFO_COPY_CST_FULL_WORDS);
}
#endif
@@ -892,8 +836,7 @@ uint16_t tu_fifo_write_n_const_addr_full_words(tu_fifo_t* f, const void * data,
Pointer to the FIFO buffer to manipulate
*/
/******************************************************************************/
-bool tu_fifo_clear(tu_fifo_t *f)
-{
+bool tu_fifo_clear(tu_fifo_t *f) {
_ff_lock(f->mutex_wr);
_ff_lock(f->mutex_rd);
@@ -947,8 +890,7 @@ bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) {
Number of items the write pointer moves forward
*/
/******************************************************************************/
-void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n)
-{
+void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n) {
f->wr_idx = advance_index(f->depth, f->wr_idx, n);
}
@@ -968,8 +910,7 @@ void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n)
Number of items the read pointer moves forward
*/
/******************************************************************************/
-void tu_fifo_advance_read_pointer(tu_fifo_t *f, uint16_t n)
-{
+void tu_fifo_advance_read_pointer(tu_fifo_t *f, uint16_t n) {
f->rd_idx = advance_index(f->depth, f->rd_idx, n);
}
@@ -988,8 +929,7 @@ void tu_fifo_advance_read_pointer(tu_fifo_t *f, uint16_t n)
Pointer to struct which holds the desired infos
*/
/******************************************************************************/
-void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
-{
+void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) {
// Operate on temporary values in case they change in between
uint16_t wr_idx = f->wr_idx;
uint16_t rd_idx = f->rd_idx;
@@ -997,8 +937,7 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx);
// Check overflow and correct if required - may happen in case a DMA wrote too fast
- if (cnt > f->depth)
- {
+ if (cnt > f->depth) {
_ff_lock(f->mutex_rd);
rd_idx = _ff_correct_read_index(f, wr_idx);
_ff_unlock(f->mutex_rd);
@@ -1007,8 +946,7 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
}
// Check if fifo is empty
- if (cnt == 0)
- {
+ if (cnt == 0) {
info->len_lin = 0;
info->len_wrap = 0;
info->ptr_lin = NULL;
@@ -1024,17 +962,14 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
info->ptr_lin = &f->buffer[rd_ptr];
// Check if there is a wrap around necessary
- if (wr_ptr > rd_ptr)
- {
+ if (wr_ptr > rd_ptr) {
// Non wrapping case
- info->len_lin = cnt;
+ info->len_lin = cnt;
info->len_wrap = 0;
info->ptr_wrap = NULL;
- }
- else
- {
- info->len_lin = f->depth - rd_ptr; // Also the case if FIFO was full
+ } else {
+ info->len_lin = f->depth - rd_ptr; // Also the case if FIFO was full
info->len_wrap = cnt - info->len_lin;
info->ptr_wrap = f->buffer;
@@ -1056,14 +991,12 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
Pointer to struct which holds the desired infos
*/
/******************************************************************************/
-void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
-{
+void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) {
uint16_t wr_idx = f->wr_idx;
uint16_t rd_idx = f->rd_idx;
uint16_t remain = _ff_remaining(f->depth, wr_idx, rd_idx);
- if (remain == 0)
- {
+ if (remain == 0) {
info->len_lin = 0;
info->len_wrap = 0;
info->ptr_lin = NULL;
@@ -1078,15 +1011,12 @@ void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
// Copy pointer to buffer to start writing to
info->ptr_lin = &f->buffer[wr_ptr];
- if (wr_ptr < rd_ptr)
- {
+ if (wr_ptr < rd_ptr) {
// Non wrapping case
- info->len_lin = rd_ptr-wr_ptr;
+ info->len_lin = rd_ptr - wr_ptr;
info->len_wrap = 0;
info->ptr_wrap = NULL;
- }
- else
- {
+ } else {
info->len_lin = f->depth - wr_ptr;
info->len_wrap = remain - info->len_lin; // Remaining length - n already was limited to remain or FIFO depth
info->ptr_wrap = f->buffer; // Always start of buffer
diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h
index f2a6c5469..0f4ba00d8 100644
--- a/src/common/tusb_fifo.h
+++ b/src/common/tusb_fifo.h
@@ -104,16 +104,16 @@ extern "C" {
* | R | 1 | 2 | W | 4 | 5 |
*/
typedef struct {
- uint8_t* buffer ; // buffer pointer
- uint16_t depth ; // max items
+ uint8_t *buffer; // buffer pointer
+ uint16_t depth; // max items
struct TU_ATTR_PACKED {
- uint16_t item_size : 15; // size of each item
- bool overwritable : 1 ; // ovwerwritable when full
+ uint16_t item_size : 15; // size of each item
+ bool overwritable : 1; // ovwerwritable when full
};
- volatile uint16_t wr_idx ; // write index
- volatile uint16_t rd_idx ; // read index
+ volatile uint16_t wr_idx; // write index
+ volatile uint16_t rd_idx; // read index
#if OSAL_MUTEX_REQUIRED
osal_mutex_t mutex_wr;
@@ -129,12 +129,13 @@ typedef struct {
void * ptr_wrap ; ///< wrapped part start pointer
} tu_fifo_buffer_info_t;
-#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable){\
- .buffer = _buffer, \
- .depth = _depth, \
- .item_size = sizeof(_type), \
- .overwritable = _overwritable, \
-}
+#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable) \
+ { \
+ .buffer = _buffer, \
+ .depth = _depth, \
+ .item_size = sizeof(_type), \
+ .overwritable = _overwritable, \
+ }
#define TU_FIFO_DEF(_name, _depth, _type, _overwritable) \
uint8_t _name##_buf[_depth*sizeof(_type)]; \
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 2ca14838b..fd922ee56 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -342,6 +342,11 @@
#define TUP_USBIP_FSDEV_STM32
#define TUP_DCD_ENDPOINT_MAX 8
+#elif TU_CHECK_MCU(OPT_MCU_STM32U3)
+ #define TUP_USBIP_FSDEV
+ #define TUP_USBIP_FSDEV_STM32
+ #define TUP_DCD_ENDPOINT_MAX 8
+
#elif TU_CHECK_MCU(OPT_MCU_STM32H7RS, OPT_MCU_STM32N6)
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_STM32
diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h
index 31aca8a31..dcd5c45d6 100644
--- a/src/common/tusb_private.h
+++ b/src/common/tusb_private.h
@@ -40,6 +40,12 @@ extern tusb_role_t _tusb_rhport_role[TUP_USBIP_CONTROLLER_NUM];
// Endpoint
//--------------------------------------------------------------------+
+enum {
+ TU_EDPT_STATE_BUSY = 0x01,
+ TU_EDPT_STATE_STALLED = 0x02,
+ TU_EDPT_STATE_CLAIMED = 0x04,
+};
+
typedef struct TU_ATTR_PACKED {
volatile uint8_t busy : 1;
volatile uint8_t stalled : 1;
@@ -48,8 +54,8 @@ typedef struct TU_ATTR_PACKED {
typedef struct {
struct TU_ATTR_PACKED {
- uint8_t is_host : 1; // 1: host, 0: device
- uint8_t is_mps512 : 1; // 1: 512, 0: 64 since stream is used for Bulk only
+ bool is_host : 1; // 1: host, 0: device
+ bool is_mps512 : 1; // 1: 512, 0: 64 since stream is used for Bulk only
};
uint8_t ep_addr;
uint16_t ep_bufsize;
@@ -93,21 +99,18 @@ bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool ove
bool tu_edpt_stream_deinit(tu_edpt_stream_t* s);
// Open an stream for an endpoint
-TU_ATTR_ALWAYS_INLINE static inline
-void tu_edpt_stream_open(tu_edpt_stream_t* s, tusb_desc_endpoint_t const *desc_ep) {
+TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_open(tu_edpt_stream_t* s, tusb_desc_endpoint_t const *desc_ep) {
tu_fifo_clear(&s->ff);
s->ep_addr = desc_ep->bEndpointAddress;
- s->is_mps512 = (tu_edpt_packet_size(desc_ep) == 512) ? 1 : 0;
+ s->is_mps512 = tu_edpt_packet_size(desc_ep) == 512;
}
-TU_ATTR_ALWAYS_INLINE static inline
-void tu_edpt_stream_close(tu_edpt_stream_t* s) {
+TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_close(tu_edpt_stream_t* s) {
s->ep_addr = 0;
}
// Clear fifo
-TU_ATTR_ALWAYS_INLINE static inline
-bool tu_edpt_stream_clear(tu_edpt_stream_t* s) {
+TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_clear(tu_edpt_stream_t* s) {
return tu_fifo_clear(&s->ff);
}
@@ -141,7 +144,7 @@ uint32_t tu_edpt_stream_read_xfer(uint8_t hwid, tu_edpt_stream_t* s);
// Complete read transfer by writing EP -> FIFO. Must be called in the transfer complete callback
TU_ATTR_ALWAYS_INLINE static inline
void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_bytes) {
- if (tu_fifo_depth(&s->ff)) {
+ if (0u != tu_fifo_depth(&s->ff)) {
tu_fifo_write_n(&s->ff, s->ep_buf, (uint16_t) xferred_bytes);
}
}
@@ -149,7 +152,7 @@ void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_byt
// Complete read transfer with provided buffer
TU_ATTR_ALWAYS_INLINE static inline
void tu_edpt_stream_read_xfer_complete_with_buf(tu_edpt_stream_t* s, const void * buf, uint32_t xferred_bytes) {
- if (tu_fifo_depth(&s->ff)) {
+ if (0u != tu_fifo_depth(&s->ff)) {
tu_fifo_write_n(&s->ff, buf, (uint16_t) xferred_bytes);
}
}
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 55f309af8..a3a660d3b 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -252,8 +252,8 @@ typedef enum {
} device_capability_type_t;
enum {
- TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = 1u << 5,
- TUSB_DESC_CONFIG_ATT_SELF_POWERED = 1u << 6,
+ TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = 1 << 5,
+ TUSB_DESC_CONFIG_ATT_SELF_POWERED = 1 << 6,
};
#define TUSB_DESC_CONFIG_POWER_MA(x) ((x)/2)
@@ -311,7 +311,7 @@ enum {
};
enum {
- TUSB_INDEX_INVALID_8 = 0xFFu
+ TUSB_INDEX_INVALID_8 = 0xFF
};
//--------------------------------------------------------------------+
@@ -544,11 +544,11 @@ TU_ATTR_ALWAYS_INLINE static inline tusb_dir_t tu_edpt_dir(uint8_t addr) {
// Get Endpoint number from address
TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_number(uint8_t addr) {
- return (uint8_t)(addr & (~TUSB_DIR_IN_MASK));
+ return (uint8_t) (addr & (~TUSB_DIR_IN_MASK));
}
TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) {
- return (uint8_t)(num | (dir ? TUSB_DIR_IN_MASK : 0));
+ return (uint8_t) (num | (dir == TUSB_DIR_IN ? TUSB_DIR_IN_MASK : 0u));
}
TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) {
diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h
index db91a73d9..587554e7f 100644
--- a/src/common/tusb_verify.h
+++ b/src/common/tusb_verify.h
@@ -67,10 +67,8 @@
//--------------------------------------------------------------------+
// TU_VERIFY Helper
//--------------------------------------------------------------------+
-
#if CFG_TUSB_DEBUG
- #include <stdio.h>
- #define TU_MESS_FAILED() tu_printf("%s %d: ASSERT FAILED\r\n", __func__, __LINE__)
+ #define TU_MESS_FAILED() TU_LOG1("%s %d: ASSERT FAILED\r\n", __func__, __LINE__)
#else
#define TU_MESS_FAILED() do {} while (0)
#endif
@@ -80,7 +78,7 @@
defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
#define TU_BREAKPOINT() do { \
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
- if ( (*ARM_CM_DHCSR) & 1UL ) __asm("BKPT #0\n"); /* Only halt mcu if debugger is attached */ \
+ if (0u != ((*ARM_CM_DHCSR) & 1UL)) { __asm("BKPT #0\n"); } /* Only halt mcu if debugger is attached */ \
} while(0)
#elif defined(__riscv) && !TUSB_MCU_VENDOR_ESPRESSIF
@@ -100,7 +98,7 @@
*------------------------------------------------------------------*/
#define TU_VERIFY_DEFINE(_cond, _ret) \
do { \
- if ( !(_cond) ) { return _ret; } \
+ if (!(_cond)) { return _ret; } \
} while(0)
#define TU_VERIFY_1ARGS(_cond) TU_VERIFY_DEFINE(_cond, false)
diff --git a/src/device/dcd.h b/src/device/dcd.h
index 7744e4e00..da675bb33 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -214,7 +214,7 @@ TU_ATTR_ALWAYS_INLINE static inline void dcd_event_setup_received(uint8_t rhport
dcd_event_t event;
event.rhport = rhport;
event.event_id = DCD_EVENT_SETUP_RECEIVED;
- memcpy(&event.setup_received, setup, sizeof(tusb_control_request_t));
+ (void) memcpy(&event.setup_received, setup, sizeof(tusb_control_request_t));
dcd_event_handler(&event, in_isr);
}
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 765bce572..d4dfae4b4 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -352,9 +352,13 @@ TU_ATTR_ALWAYS_INLINE static inline usbd_class_driver_t const * get_driver(uint8
if (drvid < _app_driver_count) {
// Application drivers
driver = &_app_driver[drvid];
- } else if (drvid < TOTAL_DRIVER_COUNT && BUILTIN_DRIVER_COUNT > 0) {
- driver = &_usbd_driver[drvid - _app_driver_count];
+ } else{
+ drvid -= _app_driver_count;
+ if (drvid < BUILTIN_DRIVER_COUNT) {
+ driver = &_usbd_driver[drvid];
+ }
}
+
return driver;
}
@@ -572,7 +576,7 @@ bool tud_deinit(uint8_t rhport) {
// Deinit device controller driver
dcd_int_disable(rhport);
dcd_disconnect(rhport);
- dcd_deinit(rhport);
+ TU_VERIFY(dcd_deinit(rhport));
// Deinit class drivers
for (uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++) {
@@ -594,7 +598,6 @@ bool tud_deinit(uint8_t rhport) {
#endif
_usbd_rhport = RHPORT_INVALID;
-
return true;
}
@@ -606,8 +609,8 @@ static void configuration_reset(uint8_t rhport) {
}
tu_varclr(&_usbd_dev);
- memset(_usbd_dev.itf2drv, DRVID_INVALID, sizeof(_usbd_dev.itf2drv)); // invalid mapping
- memset(_usbd_dev.ep2drv, DRVID_INVALID, sizeof(_usbd_dev.ep2drv)); // invalid mapping
+ (void) memset(_usbd_dev.itf2drv, DRVID_INVALID, sizeof(_usbd_dev.itf2drv)); // invalid mapping
+ (void) memset(_usbd_dev.ep2drv, DRVID_INVALID, sizeof(_usbd_dev.ep2drv)); // invalid mapping
}
static void usbd_reset(uint8_t rhport) {
@@ -638,12 +641,16 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
(void) in_isr; // not implemented yet
// Skip if stack is not initialized
- if (!tud_inited()) return;
+ if (!tud_inited()) {
+ return;
+ }
// Loop until there is no more events in the queue
while (1) {
dcd_event_t event;
- if (!osal_queue_receive(_usbd_q, &event, timeout_ms)) return;
+ if (!osal_queue_receive(_usbd_q, &event, timeout_ms)) {
+ return;
+ }
#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
if (event.event_id == DCD_EVENT_SETUP_RECEIVED) TU_LOG_USBD("\r\n"); // extra line for setup
@@ -667,7 +674,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
TU_ASSERT(_usbd_queued_setup > 0,);
_usbd_queued_setup--;
TU_LOG_BUF(CFG_TUD_LOG_LEVEL, &event.setup_received, 8);
- if (_usbd_queued_setup) {
+ if (_usbd_queued_setup != 0) {
TU_LOG_USBD(" Skipped since there is other SETUP in queue\r\n");
break;
}
@@ -703,8 +710,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
_usbd_dev.ep_status[epnum][ep_dir].claimed = 0;
if (0 == epnum) {
- usbd_control_xfer_cb(event.rhport, ep_addr, (xfer_result_t) event.xfer_complete.result,
- event.xfer_complete.len);
+ usbd_control_xfer_cb(event.rhport, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
} else {
usbd_class_driver_t const* driver = get_driver(_usbd_dev.ep2drv[epnum][ep_dir]);
TU_ASSERT(driver,);
@@ -738,7 +744,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
case USBD_EVENT_FUNC_CALL:
TU_LOG_USBD("\r\n");
- if (event.func_call.func) {
+ if (event.func_call.func != NULL) {
event.func_call.func(event.func_call.param);
}
break;
@@ -792,7 +798,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
}
#endif
- switch ( p_request->bmRequestType_bit.recipient ) {
+ switch (p_request->bmRequestType_bit.recipient) { //-V2520
//------------- Device Requests e.g in enumeration -------------//
case TUSB_REQ_RCPT_DEVICE:
if ( TUSB_REQ_TYPE_CLASS == p_request->bmRequestType_bit.type ) {
@@ -806,13 +812,13 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
return invoke_class_control(rhport, driver, p_request);
}
- if ( TUSB_REQ_TYPE_STANDARD != p_request->bmRequestType_bit.type ) {
+ if (TUSB_REQ_TYPE_STANDARD != p_request->bmRequestType_bit.type) {
// Non-standard request is not supported
TU_BREAKPOINT();
return false;
}
- switch ( p_request->bRequest ) {
+ switch (p_request->bRequest) { //-V2520
case TUSB_REQ_SET_ADDRESS:
// Depending on mcu, status phase could be sent either before or after changing device address,
// or even require stack to not response with status at all
@@ -834,18 +840,15 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
// Only process if new configure is different
if (_usbd_dev.cfg_num != cfg_num) {
- if ( _usbd_dev.cfg_num ) {
+ if (_usbd_dev.cfg_num != 0) {
// already configured: need to clear all endpoints and driver first
TU_LOG_USBD(" Clear current Configuration (%u) before switching\r\n", _usbd_dev.cfg_num);
- // disable SOF
dcd_sof_enable(rhport, false);
-
- // close all non-control endpoints, cancel all pending transfers if any
dcd_edpt_close_all(rhport);
// close all drivers and current configured state except bus speed
- uint8_t const speed = _usbd_dev.speed;
+ const uint8_t speed = _usbd_dev.speed;
configuration_reset(rhport);
_usbd_dev.speed = speed; // restore speed
@@ -853,18 +856,15 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
_usbd_dev.cfg_num = cfg_num;
- // Handle the new configuration and execute the corresponding callback
- if ( cfg_num ) {
- // switch to new configuration if not zero
+ // Handle the new configuration
+ if (cfg_num == 0) {
+ tud_umount_cb();
+ } else {
if (!process_set_config(rhport, cfg_num)) {
- TU_MESS_FAILED();
- TU_BREAKPOINT();
_usbd_dev.cfg_num = 0;
- return false;
+ TU_ASSERT(false);
}
tud_mount_cb();
- } else {
- tud_umount_cb();
}
}
@@ -873,17 +873,17 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
break;
case TUSB_REQ_GET_DESCRIPTOR:
- TU_VERIFY( process_get_descriptor(rhport, p_request) );
+ TU_VERIFY(process_get_descriptor(rhport, p_request));
break;
case TUSB_REQ_SET_FEATURE:
- switch(p_request->wValue) {
+ switch(p_request->wValue) { //-V2520
case TUSB_REQ_FEATURE_REMOTE_WAKEUP:
TU_LOG_USBD(" Enable Remote Wakeup\r\n");
// Host may enable remote wake up before suspending especially HID device
_usbd_dev.remote_wakeup_en = true;
tud_control_status(rhport, p_request);
- break;
+ break;
#if CFG_TUD_TEST_MODE
case TUSB_REQ_FEATURE_TEST_MODE: {
@@ -897,7 +897,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
tud_control_status(rhport, p_request);
break;
}
- #endif /* CFG_TUD_TEST_MODE */
+ #endif
// Stall unsupported feature selector
default: return false;
@@ -907,13 +907,12 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
case TUSB_REQ_CLEAR_FEATURE:
// Only support remote wakeup for device feature
TU_VERIFY(TUSB_REQ_FEATURE_REMOTE_WAKEUP == p_request->wValue);
-
TU_LOG_USBD(" Disable Remote Wakeup\r\n");
// Host may disable remote wake up after resuming
_usbd_dev.remote_wakeup_en = false;
tud_control_status(rhport, p_request);
- break;
+ break;
case TUSB_REQ_GET_STATUS: {
// Device status bit mask
@@ -939,24 +938,24 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
// all requests to Interface (STD or Class) is forwarded to class driver.
// notable requests are: GET HID REPORT DESCRIPTOR, SET_INTERFACE, GET_INTERFACE
- if ( !invoke_class_control(rhport, driver, p_request) ) {
+ if (!invoke_class_control(rhport, driver, p_request)) {
// For GET_INTERFACE and SET_INTERFACE, it is mandatory to respond even if the class
// driver doesn't use alternate settings or implement this
TU_VERIFY(TUSB_REQ_TYPE_STANDARD == p_request->bmRequestType_bit.type);
- switch(p_request->bRequest) {
- case TUSB_REQ_GET_INTERFACE:
- case TUSB_REQ_SET_INTERFACE:
- // Clear complete callback if driver set since it can also stall the request.
- usbd_control_set_complete_callback(NULL);
+ // Clear complete callback if driver set since it can also stall the request.
+ usbd_control_set_complete_callback(NULL);
- if (TUSB_REQ_GET_INTERFACE == p_request->bRequest) {
- uint8_t alternate = 0;
- tud_control_xfer(rhport, p_request, &alternate, 1);
- }else {
- tud_control_status(rhport, p_request);
- }
- break;
+ switch (p_request->bRequest) { //-V2520
+ case TUSB_REQ_GET_INTERFACE: {
+ uint8_t alternate = 0;
+ tud_control_xfer(rhport, p_request, &alternate, 1);
+ break;
+ }
+
+ case TUSB_REQ_SET_INTERFACE:
+ tud_control_status(rhport, p_request);
+ break;
default: return false;
}
@@ -973,15 +972,15 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
TU_ASSERT(ep_num < TU_ARRAY_SIZE(_usbd_dev.ep2drv) );
usbd_class_driver_t const * driver = get_driver(_usbd_dev.ep2drv[ep_num][ep_dir]);
- if ( TUSB_REQ_TYPE_STANDARD != p_request->bmRequestType_bit.type ) {
+ if (TUSB_REQ_TYPE_STANDARD != p_request->bmRequestType_bit.type) {
// Forward class request to its driver
TU_VERIFY(driver);
return invoke_class_control(rhport, driver, p_request);
} else {
// Handle STD request to endpoint
- switch ( p_request->bRequest ) {
+ switch (p_request->bRequest) { //-V2520
case TUSB_REQ_GET_STATUS: {
- uint16_t status = usbd_edpt_stalled(rhport, ep_addr) ? 0x0001 : 0x0000;
+ uint16_t status = usbd_edpt_stalled(rhport, ep_addr) ? 0x0001u : 0x0000u;
tud_control_xfer(rhport, p_request, &status, 2);
}
break;
@@ -996,7 +995,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
}
}
- if (driver) {
+ if (driver != NULL) {
// Some classes such as USBTMC needs to clear/re-init its buffer when receiving CLEAR_FEATURE request
// We will also forward std request targeted endpoint to class drivers as well
@@ -1006,7 +1005,9 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
usbd_control_set_complete_callback(NULL);
// skip ZLP status if driver already did that
- if ( !_usbd_dev.ep_status[0][TUSB_DIR_IN].busy ) tud_control_status(rhport, p_request);
+ if (!_usbd_dev.ep_status[0][TUSB_DIR_IN].busy) {
+ tud_control_status(rhport, p_request);
+ }
}
}
break;
@@ -1017,8 +1018,8 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
return false;
}
}
+ break;
}
- break;
// Unknown recipient
default:
@@ -1081,10 +1082,11 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num)
// Some drivers use 2 or more interfaces but may not have IAD e.g MIDI (always) or
// BTH (even CDC) with class in device descriptor (single interface)
- if ( assoc_itf_count == 1)
- {
+ if (assoc_itf_count == 1) {
#if CFG_TUD_CDC
- if ( driver->open == cdcd_open ) assoc_itf_count = 2;
+ if ( driver->open == cdcd_open ) {
+ assoc_itf_count = 2;
+ }
#endif
#if CFG_TUD_MIDI
@@ -1158,8 +1160,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
tusb_desc_type_t const desc_type = (tusb_desc_type_t) tu_u16_high(p_request->wValue);
uint8_t const desc_index = tu_u16_low( p_request->wValue );
- switch(desc_type)
- {
+ switch(desc_type) { //-V2520
case TUSB_DESC_DEVICE: {
TU_LOG_USBD(" Device\r\n");
@@ -1187,7 +1188,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
// requested by host if USB > 2.0 ( i.e 2.1 or 3.x )
uintptr_t desc_bos = (uintptr_t) tud_descriptor_bos_cb();
- TU_VERIFY(desc_bos);
+ TU_VERIFY(desc_bos != 0);
// Use offsetof to avoid pointer to the odd/misaligned address
uint16_t const total_len = tu_le16toh( tu_unaligned_read16((const void*) (desc_bos + offsetof(tusb_desc_bos_t, wTotalLength))) );
@@ -1203,12 +1204,12 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
if ( desc_type == TUSB_DESC_CONFIGURATION ) {
TU_LOG_USBD(" Configuration[%u]\r\n", desc_index);
desc_config = (uintptr_t) tud_descriptor_configuration_cb(desc_index);
- TU_ASSERT(desc_config);
+ TU_ASSERT(desc_config != 0);
}else {
// Host only request this after getting Device Qualifier descriptor
TU_LOG_USBD(" Other Speed Configuration\r\n");
desc_config = (uintptr_t) tud_descriptor_other_speed_configuration_cb(desc_index);
- TU_VERIFY(desc_config);
+ TU_VERIFY(desc_config != 0);
}
// Use offsetof to avoid pointer to the odd/misaligned address
@@ -1218,8 +1219,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
}
// break; // unreachable
- case TUSB_DESC_STRING:
- {
+ case TUSB_DESC_STRING: {
TU_LOG_USBD(" String[%u]\r\n", desc_index);
// String Descriptor always uses the desc set from user
diff --git a/src/device/usbd.h b/src/device/usbd.h
index bfff23399..c446638c3 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -95,7 +95,9 @@ bool tud_suspended(void);
// Check if device is ready to transfer
TU_ATTR_ALWAYS_INLINE static inline
bool tud_ready(void) {
- return tud_mounted() && !tud_suspended();
+ const bool is_mounted = tud_mounted();
+ const bool is_suspended = tud_suspended();
+ return is_mounted && !is_suspended;
}
// Remote wake up host, only if suspended and enabled by host
@@ -421,7 +423,7 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
TUD_AUDIO10_DESC_SELECTOR_UNIT_ONE_PIN_LEN, TUSB_DESC_CS_INTERFACE, AUDIO10_CS_AC_INTERFACE_SELECTOR_UNIT, _unitid, 1, _srcid, _stridx
/* Feature Unit Descriptor UAC1 (4.3.2.5) - Variable Channels */
-#define TUD_AUDIO10_DESC_FEATURE_UNIT_LEN(_nchannels) (7 + (_nchannels + 1) * 2)
+#define TUD_AUDIO10_DESC_FEATURE_UNIT_LEN(_nchannels) (7 + ((_nchannels) + 1) * 2)
// Feature Unit descriptor, take list of control bitmaps for master channel + each channel as variable arguments
#define TUD_AUDIO10_DESC_FEATURE_UNIT(_unitid, _srcid, _stridx, ...) \
TUD_AUDIO10_DESC_FEATURE_UNIT_LEN(TU_ARGS_NUM(__VA_ARGS__) - 1), TUSB_DESC_CS_INTERFACE, AUDIO10_CS_AC_INTERFACE_FEATURE_UNIT, _unitid, _srcid, 2, TU_ARGS_APPLY_EXPAND(U16_TO_U8S_LE, __VA_ARGS__), _stridx
@@ -539,7 +541,7 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
TUD_AUDIO20_DESC_OUTPUT_TERM_LEN, TUSB_DESC_CS_INTERFACE, AUDIO20_CS_AC_INTERFACE_OUTPUT_TERMINAL, _termid, U16_TO_U8S_LE(_termtype), _assocTerm, _srcid, _clkid, U16_TO_U8S_LE(_ctrl), _stridx
/* Feature Unit Descriptor(4.7.2.8) */
-#define TUD_AUDIO20_DESC_FEATURE_UNIT_LEN(_nchannels) (6 + (_nchannels + 1) * 4)
+#define TUD_AUDIO20_DESC_FEATURE_UNIT_LEN(_nchannels) (6 + ((_nchannels) + 1) * 4)
#define TUD_AUDIO20_DESC_FEATURE_UNIT(_unitid, _srcid, _stridx, ...) \
TUD_AUDIO20_DESC_FEATURE_UNIT_LEN(TU_ARGS_NUM(__VA_ARGS__) - 1), TUSB_DESC_CS_INTERFACE, AUDIO20_CS_AC_INTERFACE_FEATURE_UNIT, _unitid, _srcid, TU_ARGS_APPLY_EXPAND(U32_TO_U8S_LE, __VA_ARGS__), _stridx
@@ -728,7 +730,7 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
// Calculate wMaxPacketSize of Endpoints
#define TUD_AUDIO_EP_SIZE(_is_highspeed, _maxFrequency, _nBytesPerSample, _nChannels) \
- ((((_maxFrequency + (_is_highspeed ? 7999 : 999)) / (_is_highspeed ? 8000 : 1000)) + 1) * _nBytesPerSample * _nChannels)
+ (((((_maxFrequency) + ((_is_highspeed) ? 7999 : 999)) / ((_is_highspeed) ? 8000 : 1000)) + 1) * (_nBytesPerSample) * (_nChannels))
//--------------------------------------------------------------------+
@@ -807,44 +809,44 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
// Interface number, Alternate count, starting string index, attributes, detach timeout, transfer size
// Note: Alternate count must be numeric or macro, string index is increased by one for each Alt interface
#define TUD_DFU_DESCRIPTOR(_itfnum, _alt_count, _stridx, _attr, _timeout, _xfer_size) \
- TU_XSTRCAT(_TUD_DFU_ALT_,_alt_count)(_itfnum, 0, _stridx), \
+ TU_XSTRCAT(TUD_DFU_ALT_,_alt_count)(_itfnum, 0, _stridx), \
/* Function */ \
9, DFU_DESC_FUNCTIONAL, _attr, U16_TO_U8S_LE(_timeout), U16_TO_U8S_LE(_xfer_size), U16_TO_U8S_LE(0x0101)
-#define _TUD_DFU_ALT(_itfnum, _alt, _stridx) \
+#define TUD_DFU_ALT(_itfnum, _alt, _stridx) \
/* Interface */ \
9, TUSB_DESC_INTERFACE, _itfnum, _alt, 0, TUD_DFU_APP_CLASS, TUD_DFU_APP_SUBCLASS, DFU_PROTOCOL_DFU, _stridx
-#define _TUD_DFU_ALT_1(_itfnum, _alt_count, _stridx) \
- _TUD_DFU_ALT(_itfnum, _alt_count, _stridx)
+#define TUD_DFU_ALT_1(_itfnum, _alt_count, _stridx) \
+ TUD_DFU_ALT(_itfnum, _alt_count, _stridx)
-#define _TUD_DFU_ALT_2(_itfnum, _alt_count, _stridx) \
- _TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
- _TUD_DFU_ALT_1(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_2(_itfnum, _alt_count, _stridx) \
+ TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
+ TUD_DFU_ALT_1(_itfnum, _alt_count+1, _stridx+1)
-#define _TUD_DFU_ALT_3(_itfnum, _alt_count, _stridx) \
- _TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
- _TUD_DFU_ALT_2(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_3(_itfnum, _alt_count, _stridx) \
+ TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
+ TUD_DFU_ALT_2(_itfnum, _alt_count+1, _stridx+1)
-#define _TUD_DFU_ALT_4(_itfnum, _alt_count, _stridx) \
- _TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
- _TUD_DFU_ALT_3(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_4(_itfnum, _alt_count, _stridx) \
+ TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
+ TUD_DFU_ALT_3(_itfnum, _alt_count+1, _stridx+1)
-#define _TUD_DFU_ALT_5(_itfnum, _alt_count, _stridx) \
- _TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
- _TUD_DFU_ALT_4(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_5(_itfnum, _alt_count, _stridx) \
+ TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
+ TUD_DFU_ALT_4(_itfnum, _alt_count+1, _stridx+1)
-#define _TUD_DFU_ALT_6(_itfnum, _alt_count, _stridx) \
- _TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
- _TUD_DFU_ALT_5(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_6(_itfnum, _alt_count, _stridx) \
+ TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
+ TUD_DFU_ALT_5(_itfnum, _alt_count+1, _stridx+1)
-#define _TUD_DFU_ALT_7(_itfnum, _alt_count, _stridx) \
- _TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
- _TUD_DFU_ALT_6(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_7(_itfnum, _alt_count, _stridx) \
+ TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
+ TUD_DFU_ALT_6(_itfnum, _alt_count+1, _stridx+1)
-#define _TUD_DFU_ALT_8(_itfnum, _alt_count, _stridx) \
- _TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
- _TUD_DFU_ALT_7(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_8(_itfnum, _alt_count, _stridx) \
+ TUD_DFU_ALT(_itfnum, _alt_count, _stridx), \
+ TUD_DFU_ALT_7(_itfnum, _alt_count+1, _stridx+1)
//--------------------------------------------------------------------+
// CDC-ECM Descriptor Templates
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index b75362425..70827bfee 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -93,7 +93,7 @@ static bool data_stage_xact(uint8_t rhport) {
if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN) {
ep_addr = EDPT_CTRL_IN;
- if (xact_len) {
+ if (0u != xact_len) {
TU_VERIFY(0 == tu_memcpy_s(_ctrl_epbuf.buf, CFG_TUD_ENDPOINT0_SIZE, _ctrl_xfer.buffer, xact_len));
}
}
@@ -159,7 +159,7 @@ bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result,
// invoke optional dcd hook if available
dcd_edpt0_status_complete(rhport, &_ctrl_xfer.request);
- if (_ctrl_xfer.complete_cb) {
+ if (NULL != _ctrl_xfer.complete_cb) {
// TODO refactor with usbd_driver_print_control_complete_name
_ctrl_xfer.complete_cb(rhport, CONTROL_STAGE_ACK, &_ctrl_xfer.request);
}
@@ -185,7 +185,7 @@ bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result,
// invoke complete callback if set
// callback can still stall control in status phase e.g out data does not make sense
- if (_ctrl_xfer.complete_cb) {
+ if (NULL != _ctrl_xfer.complete_cb) {
#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
usbd_driver_print_control_complete_name(_ctrl_xfer.complete_cb);
#endif
diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h
index a1c884f12..72323ac80 100644
--- a/src/device/usbd_pvt.h
+++ b/src/device/usbd_pvt.h
@@ -117,20 +117,17 @@ bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * p_endp
// Check if endpoint is ready (not busy and not stalled)
TU_ATTR_ALWAYS_INLINE static inline
bool usbd_edpt_ready(uint8_t rhport, uint8_t ep_addr) {
- return !usbd_edpt_busy(rhport, ep_addr) && !usbd_edpt_stalled(rhport, ep_addr);
+ const bool is_busy = usbd_edpt_busy(rhport, ep_addr);
+ const bool is_stalled = usbd_edpt_stalled(rhport, ep_addr);
+ return !is_busy && !is_stalled;
}
// Enable SOF interrupt
void usbd_sof_enable(uint8_t rhport, sof_consumer_t consumer, bool en);
-/*------------------------------------------------------------------*/
-/* Helper
- *------------------------------------------------------------------*/
-
bool usbd_open_edpt_pair(uint8_t rhport, uint8_t const* p_desc, uint8_t ep_count, uint8_t xfer_type, uint8_t* ep_out, uint8_t* ep_in);
void usbd_defer_func(osal_task_func_t func, void *param, bool in_isr);
-
#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback);
#endif
diff --git a/src/host/hcd.h b/src/host/hcd.h
index 4a17326ec..36a7f5da5 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -84,7 +84,7 @@ typedef struct {
// FUNC_CALL
struct {
- void (*func) (void*);
+ void (*func) (void* param);
void* param;
}func_call;
};
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 6bafde368..734024771 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -292,13 +292,17 @@ static uint8_t _app_driver_count = 0;
#define TOTAL_DRIVER_COUNT (_app_driver_count + BUILTIN_DRIVER_COUNT)
-static inline usbh_class_driver_t const *get_driver(uint8_t drv_id) {
+// virtually joins built-in and application drivers together.
+// Application is positioned first to allow overwriting built-in ones.
+TU_ATTR_ALWAYS_INLINE static inline usbh_class_driver_t const *get_driver(uint8_t drv_id) {
usbh_class_driver_t const *driver = NULL;
-
- if ( drv_id < _app_driver_count ) {
+ if (drv_id < _app_driver_count) {
driver = &_app_driver[drv_id];
- } else if ( drv_id < TOTAL_DRIVER_COUNT && BUILTIN_DRIVER_COUNT > 0) {
- driver = &usbh_class_drivers[drv_id - _app_driver_count];
+ } else {
+ drv_id -= _app_driver_count;
+ if (drv_id < BUILTIN_DRIVER_COUNT) {
+ driver = &usbh_class_drivers[drv_id];
+ }
}
return driver;
@@ -318,7 +322,7 @@ TU_ATTR_ALWAYS_INLINE static inline usbh_device_t* get_device(uint8_t dev_addr)
}
TU_ATTR_ALWAYS_INLINE static inline bool is_hub_addr(uint8_t daddr) {
- return (CFG_TUH_HUB > 0) && (daddr > CFG_TUH_DEVICE_MAX);
+ return (CFG_TUH_HUB > 0) && (daddr > CFG_TUH_DEVICE_MAX); //-V560
}
TU_ATTR_ALWAYS_INLINE static inline bool queue_event(hcd_event_t const * event, bool in_isr) {
@@ -372,7 +376,8 @@ bool tuh_connected(uint8_t daddr) {
return _usbh_data.enumerating_daddr == 0;
} else {
const usbh_device_t* dev = get_device(daddr);
- return dev && dev->connected;
+ TU_VERIFY(dev != NULL);
+ return dev->connected;
}
}
@@ -439,8 +444,8 @@ bool tuh_configure(uint8_t rhport, uint32_t cfg_id, const void *cfg_param) {
static void clear_device(usbh_device_t* dev) {
tu_memclr(dev, sizeof(usbh_device_t));
- memset(dev->itf2drv, TUSB_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping
- memset(dev->ep2drv , TUSB_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping
+ (void) memset(dev->itf2drv, TUSB_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping
+ (void) memset(dev->ep2drv , TUSB_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping
}
bool tuh_inited(void) {
@@ -510,7 +515,7 @@ bool tuh_rhport_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
// Class drivers
for (uint8_t drv_id = 0; drv_id < TOTAL_DRIVER_COUNT; drv_id++) {
usbh_class_driver_t const* driver = get_driver(drv_id);
- if (driver) {
+ if (driver != NULL) {
TU_LOG_USBH("%s init\r\n", driver->name);
driver->init();
}
@@ -657,7 +662,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
// with enabled driver e.g HID endpoint
#if CFG_TUH_API_EDPT_XFER
tuh_xfer_cb_t const complete_cb = dev->ep_callback[epnum][ep_dir].complete_cb;
- if ( complete_cb ) {
+ if (complete_cb != NULL) {
// re-construct xfer info
tuh_xfer_t xfer = {
.daddr = event.dev_addr,
@@ -675,7 +680,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
{
uint8_t drv_id = dev->ep2drv[epnum][ep_dir];
usbh_class_driver_t const* driver = get_driver(drv_id);
- if (driver) {
+ if (driver != NULL) {
TU_LOG_USBH(" %s xfer callback\r\n", driver->name);
driver->xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result,
event.xfer_complete.len);
@@ -690,10 +695,13 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
}
case USBH_EVENT_FUNC_CALL:
- if (event.func_call.func) event.func_call.func(event.func_call.param);
+ if (event.func_call.func != NULL) {
+ event.func_call.func(event.func_call.param);
+ }
break;
default:
+ // unknown event
break;
}
@@ -743,7 +751,7 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) {
tu_str_std_request[xfer->setup->bRequest] : "Class Request");
TU_LOG_BUF_USBH(xfer->setup, 8);
- if (xfer->complete_cb) {
+ if (xfer->complete_cb != NULL) {
TU_ASSERT(usbh_setup_send(daddr, (uint8_t const *) &_usbh_epbuf.request));
}else {
// blocking if complete callback is not provided
@@ -795,7 +803,7 @@ static void _control_xfer_complete(uint8_t daddr, xfer_result_t result) {
_control_set_xfer_stage(CONTROL_STAGE_IDLE);
- if (xfer_temp.complete_cb) {
+ if (xfer_temp.complete_cb != NULL) {
xfer_temp.complete_cb(&xfer_temp);
}
}
@@ -834,7 +842,7 @@ static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t
case XFER_RESULT_SUCCESS:
switch(ctrl_info->stage) {
case CONTROL_STAGE_SETUP:
- if (request->wLength) {
+ if (request->wLength > 0) {
// DATA stage: initial data toggle is always 1
_control_set_xfer_stage(CONTROL_STAGE_DATA);
const uint8_t ep_data = tu_edpt_addr(0, request->bmRequestType_bit.direction);
@@ -844,7 +852,7 @@ static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t
TU_ATTR_FALLTHROUGH;
case CONTROL_STAGE_DATA: {
- if (request->wLength) {
+ if (request->wLength > 0) {
TU_LOG_USBH("[%u:%u] Control data:\r\n", rhport, daddr);
TU_LOG_MEM_USBH(ctrl_info->buffer, xferred_bytes, 2);
}
@@ -1084,7 +1092,7 @@ bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) {
bool tuh_bus_info_get(uint8_t daddr, tuh_bus_info_t* bus_info) {
usbh_device_t const* dev = get_device(daddr);
- if (dev) {
+ if (dev != NULL) {
*bus_info = dev->bus_info;
} else {
*bus_info = _usbh_data.dev0_bus;
@@ -1109,7 +1117,9 @@ TU_ATTR_FAST_FUNC void hcd_event_handler(hcd_event_t const* event, bool in_isr)
}
break;
- default: break;
+ default:
+ // nothing to do
+ break;
}
queue_event(event, in_isr);
@@ -1314,7 +1324,7 @@ static void process_removed_device(uint8_t rhport, uint8_t hub_addr, uint8_t hub
do {
for (uint8_t dev_id = 0; dev_id < TOTAL_DEVICES; dev_id++) {
usbh_device_t* dev = &_usbh_devices[dev_id];
- uint8_t const daddr = dev_id + 1;
+ uint8_t const daddr = dev_id + 1u;
// hub_addr = 0 means roothub, hub_port = 0 means all devices of downstream hub
if (dev->bus_info.rhport == rhport && dev->connected &&
@@ -1336,7 +1346,7 @@ static void process_removed_device(uint8_t rhport, uint8_t hub_addr, uint8_t hub
// Close class driver
for (uint8_t drv_id = 0; drv_id < TOTAL_DRIVER_COUNT; drv_id++) {
usbh_class_driver_t const* driver = get_driver(drv_id);
- if (driver) {
+ if (driver != NULL) {
driver->close(daddr);
}
}
@@ -1354,7 +1364,7 @@ static void process_removed_device(uint8_t rhport, uint8_t hub_addr, uint8_t hub
// find a marked hub to process
for (uint8_t h_id = 0; h_id < CFG_TUH_HUB; h_id++) {
- if (removing_hubs[h_id]) {
+ if (0 != removing_hubs[h_id]) {
removing_hubs[h_id] = 0;
// update hub_addr and hub_port for next loop
@@ -1423,16 +1433,13 @@ static bool enum_new_device(hcd_event_t* event) {
// wait until device connection is stable TODO non blocking
tusb_time_delay_ms_api(ENUM_DEBOUNCING_DELAY_MS);
- // clear roothub debouncing delay
- if (dev0_bus->hub_addr == 0) {
- _usbh_data.attach_debouncing_bm &= (uint8_t) ~TU_BIT(dev0_bus->rhport);
- }
-
if (dev0_bus->hub_addr == 0) {
// connected directly to roothub
// USB bus not active and frame number is not available yet.
// need to depend on tusb_time_millis_api() TODO non blocking
+ _usbh_data.attach_debouncing_bm &= (uint8_t) ~TU_BIT(dev0_bus->rhport); // clear roothub debouncing delay
+
if (!hcd_port_connect_status(dev0_bus->rhport)) {
TU_LOG_USBH("Device unplugged while debouncing\r\n");
enum_full_complete();
@@ -1503,7 +1510,7 @@ static void process_enumeration(tuh_xfer_t* xfer) {
usbh_device_t* dev = get_device(daddr);
tuh_bus_info_t* dev0_bus = &_usbh_data.dev0_bus;
if (daddr > 0) {
- TU_ASSERT(dev,);
+ TU_ASSERT(dev != NULL,);
}
uint16_t langid = 0x0409; // default is English
@@ -1513,7 +1520,7 @@ static void process_enumeration(tuh_xfer_t* xfer) {
hub_port_status_response_t port_status;
hub_port_get_status_local(dev0_bus->hub_addr, dev0_bus->hub_port, &port_status);
- if (!port_status.status.connection) {
+ if (0 == port_status.status.connection) {
TU_LOG_USBH("Device unplugged from hub while debouncing\r\n");
enum_full_complete();
return;
@@ -1535,7 +1542,7 @@ static void process_enumeration(tuh_xfer_t* xfer) {
hub_port_status_response_t port_status;
hub_port_get_status_local(dev0_bus->hub_addr, dev0_bus->hub_port, &port_status);
- if (port_status.change.reset) {
+ if (1 == port_status.change.reset) {
// Acknowledge Port Reset Change
TU_ASSERT(hub_port_clear_reset_change(dev0_bus->hub_addr, dev0_bus->hub_port, process_enumeration, ENUM_HUB_CLEAR_RESET_COMPLETE),);
} else {
@@ -1550,7 +1557,7 @@ static void process_enumeration(tuh_xfer_t* xfer) {
hub_port_status_response_t port_status;
hub_port_get_status_local(dev0_bus->hub_addr, dev0_bus->hub_port, &port_status);
- if (!port_status.status.connection) {
+ if (0 == port_status.status.connection) {
TU_LOG_USBH("Device unplugged from hub (not addressed yet)\r\n");
enum_full_complete();
return;
@@ -1619,17 +1626,18 @@ static void process_enumeration(tuh_xfer_t* xfer) {
case ENUM_GET_STRING_LANGUAGE_ID_LEN: {
// save the received device descriptor
tusb_desc_device_t const *desc_device = (tusb_desc_device_t const *) _usbh_epbuf.ctrl;
- dev->bcdUSB = desc_device->bcdUSB;
- dev->bDeviceClass = desc_device->bDeviceClass;
- dev->bDeviceSubClass = desc_device->bDeviceSubClass;
- dev->bDeviceProtocol = desc_device->bDeviceProtocol;
- dev->bMaxPacketSize0 = desc_device->bMaxPacketSize0;
- dev->idVendor = desc_device->idVendor;
- dev->idProduct = desc_device->idProduct;
- dev->bcdDevice = desc_device->bcdDevice;
- dev->iManufacturer = desc_device->iManufacturer;
- dev->iProduct = desc_device->iProduct;
- dev->iSerialNumber = desc_device->iSerialNumber;
+
+ dev->bcdUSB = desc_device->bcdUSB;
+ dev->bDeviceClass = desc_device->bDeviceClass;
+ dev->bDeviceSubClass = desc_device->bDeviceSubClass;
+ dev->bDeviceProtocol = desc_device->bDeviceProtocol;
+ dev->bMaxPacketSize0 = desc_device->bMaxPacketSize0;
+ dev->idVendor = desc_device->idVendor;
+ dev->idProduct = desc_device->idProduct;
+ dev->bcdDevice = desc_device->bcdDevice;
+ dev->iManufacturer = desc_device->iManufacturer;
+ dev->iProduct = desc_device->iProduct;
+ dev->iSerialNumber = desc_device->iSerialNumber;
dev->bNumConfigurations = desc_device->bNumConfigurations;
tuh_enum_descriptor_device_cb(daddr, desc_device); // callback
@@ -1654,9 +1662,8 @@ static void process_enumeration(tuh_xfer_t* xfer) {
tuh_descriptor_get_string(daddr, dev->iManufacturer, langid, _usbh_epbuf.ctrl, 2,
process_enumeration, ENUM_GET_STRING_MANUFACTURER);
break;
- }else {
- TU_ATTR_FALLTHROUGH;
}
+ TU_ATTR_FALLTHROUGH;
}
case ENUM_GET_STRING_MANUFACTURER: {
@@ -1666,22 +1673,21 @@ static void process_enumeration(tuh_xfer_t* xfer) {
tuh_descriptor_get_string(daddr, dev->iManufacturer, langid, _usbh_epbuf.ctrl, str_len,
process_enumeration, ENUM_GET_STRING_PRODUCT_LEN);
break;
- } else {
- TU_ATTR_FALLTHROUGH;
}
+ TU_ATTR_FALLTHROUGH;
}
- case ENUM_GET_STRING_PRODUCT_LEN:
+ case ENUM_GET_STRING_PRODUCT_LEN: {
if (dev->iProduct != 0) {
if (state == ENUM_GET_STRING_PRODUCT_LEN) {
langid = tu_le16toh(xfer->setup->wIndex); // get langid from previous setup packet if not fall through
}
- tuh_descriptor_get_string(daddr, dev->iProduct, langid, _usbh_epbuf.ctrl, 2,
- process_enumeration, ENUM_GET_STRING_PRODUCT);
+ tuh_descriptor_get_string(
+ daddr, dev->iProduct, langid, _usbh_epbuf.ctrl, 2, process_enumeration, ENUM_GET_STRING_PRODUCT);
break;
- } else {
- TU_ATTR_FALLTHROUGH;
}
+ TU_ATTR_FALLTHROUGH;
+ }
case ENUM_GET_STRING_PRODUCT: {
if (dev->iProduct != 0) {
@@ -1690,22 +1696,21 @@ static void process_enumeration(tuh_xfer_t* xfer) {
tuh_descriptor_get_string(daddr, dev->iProduct, langid, _usbh_epbuf.ctrl, str_len,
process_enumeration, ENUM_GET_STRING_SERIAL_LEN);
break;
- } else {
- TU_ATTR_FALLTHROUGH;
}
+ TU_ATTR_FALLTHROUGH;
}
- case ENUM_GET_STRING_SERIAL_LEN:
+ case ENUM_GET_STRING_SERIAL_LEN: {
if (dev->iSerialNumber != 0) {
if (state == ENUM_GET_STRING_SERIAL_LEN) {
langid = tu_le16toh(xfer->setup->wIndex); // get langid from previous setup packet if not fall through
}
- tuh_descriptor_get_string(daddr, dev->iSerialNumber, langid, _usbh_epbuf.ctrl, 2,
- process_enumeration, ENUM_GET_STRING_SERIAL);
+ tuh_descriptor_get_string(
+ daddr, dev->iSerialNumber, langid, _usbh_epbuf.ctrl, 2, process_enumeration, ENUM_GET_STRING_SERIAL);
break;
- } else {
- TU_ATTR_FALLTHROUGH;
}
+ TU_ATTR_FALLTHROUGH;
+ }
case ENUM_GET_STRING_SERIAL: {
if (dev->iSerialNumber != 0) {
@@ -1714,9 +1719,8 @@ static void process_enumeration(tuh_xfer_t* xfer) {
tuh_descriptor_get_string(daddr, dev->iSerialNumber, langid, _usbh_epbuf.ctrl, str_len,
process_enumeration, ENUM_GET_9BYTE_CONFIG_DESC);
break;
- } else {
- TU_ATTR_FALLTHROUGH;
}
+ TU_ATTR_FALLTHROUGH;
}
case ENUM_GET_9BYTE_CONFIG_DESC: {
@@ -1748,7 +1752,7 @@ static void process_enumeration(tuh_xfer_t* xfer) {
case ENUM_SET_CONFIG: {
uint8_t config_idx = (uint8_t) tu_le16toh(xfer->setup->wIndex);
if (tuh_enum_descriptor_configuration_cb(daddr, config_idx, (const tusb_desc_configuration_t*) _usbh_epbuf.ctrl)) {
- TU_ASSERT(tuh_configuration_set(daddr, config_idx+1, process_enumeration, ENUM_CONFIG_DRIVER),);
+ TU_ASSERT(tuh_configuration_set(daddr, config_idx+1u, process_enumeration, ENUM_CONFIG_DRIVER),);
} else {
config_idx++;
TU_ASSERT(config_idx < dev->bNumConfigurations,);
@@ -1794,7 +1798,7 @@ static uint8_t enum_get_new_address(bool is_hub) {
}
for (uint8_t idx = start; idx < end; idx++) {
- if (!_usbh_devices[idx].connected) {
+ if (0 == _usbh_devices[idx].connected) {
return (idx + 1);
}
}
@@ -1904,7 +1908,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num) {
// with usbh_driver_set_config_complete()
uint8_t const drv_id = dev->itf2drv[itf_num];
usbh_class_driver_t const * driver = get_driver(drv_id);
- if (driver) {
+ if (driver != NULL) {
TU_LOG_USBH("%s set config: itf = %u\r\n", driver->name, itf_num);
driver->set_config(dev_addr, itf_num);
break;
diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index bde5ec010..9aeda4d01 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -70,15 +70,15 @@ typedef struct {
} osal_queue_def_t;
#if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
- #define _OSAL_Q_NAME(_name) .name = #_name
+ #define OSAL_Q_NAME(_name) .name = #_name
#else
- #define _OSAL_Q_NAME(_name)
+ #define OSAL_Q_NAME(_name)
#endif
// _int_set is not used with an RTOS
#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
static _type _name##_##buf[_depth];\
- osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, _OSAL_Q_NAME(_name) }
+ osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, OSAL_Q_NAME(_name) }
//--------------------------------------------------------------------+
// TASK API
@@ -137,7 +137,7 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
if (in_isr) {
- if (!TUP_MCU_MULTIPLE_CORE) {
+ if (TUP_MCU_MULTIPLE_CORE == 0) {
(void) ctx;
return; // single core MCU does not need to lock in ISR
}
@@ -149,7 +149,7 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bo
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
if (in_isr) {
- if (!TUP_MCU_MULTIPLE_CORE) {
+ if (TUP_MCU_MULTIPLE_CORE == 0) {
(void) ctx;
return; // single core MCU does not need to lock in ISR
}
@@ -166,7 +166,7 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx,
//--------------------------------------------------------------------+
TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t *semdef) {
#if configSUPPORT_STATIC_ALLOCATION
- return xSemaphoreCreateBinaryStatic(semdef);
+ return xSemaphoreCreateBinaryStatic((StaticSemaphore_t*) semdef);
#else
(void) semdef;
return xSemaphoreCreateBinary();
@@ -174,7 +174,7 @@ TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_
}
TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t semd_hdl) {
- vSemaphoreDelete(semd_hdl);
+ vSemaphoreDelete((SemaphoreHandle_t) semd_hdl);
return true;
}
diff --git a/src/osal/osal_pico.h b/src/osal/osal_pico.h
index ace5907d7..f5385071a 100644
--- a/src/osal/osal_pico.h
+++ b/src/osal/osal_pico.h
@@ -81,8 +81,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t
TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
(void) in_isr;
- sem_release(sem_hdl);
- return true;
+ return sem_release(sem_hdl);
}
TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
@@ -139,7 +138,7 @@ typedef osal_queue_def_t* osal_queue_t;
TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
critical_section_init(&qdef->critsec);
- tu_fifo_clear(&qdef->ff);
+ (void) tu_fifo_clear(&qdef->ff);
return (osal_queue_t) qdef;
}
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 953483583..c33c970e4 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -919,8 +919,8 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
if (interval < 4) {
// sub millisecond interval
p_qhd->interval_ms = 0;
- p_qhd->int_smask = (interval == 1) ? TU_BIN8(11111111) :
- (interval == 2) ? TU_BIN8(10101010): TU_BIN8(01000100);
+ p_qhd->int_smask = (interval == 1) ? 0xff : // 0b11111111
+ (interval == 2) ? 0xaa /* 0b10101010 */ : 0x44 /* 0b01000100 */;
} else {
p_qhd->interval_ms = (uint8_t) tu_min16(1 << (interval - 4), 255);
p_qhd->int_smask = TU_BIT(interval % 8);
@@ -929,7 +929,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
TU_ASSERT(0 != interval, );
// Full/Low: 4.12.2.1 (EHCI) case 1 schedule start split at 1 us & complete split at 2,3,4 uframes
p_qhd->int_smask = 0x01;
- p_qhd->fl_int_cmask = TU_BIN8(11100);
+ p_qhd->fl_int_cmask = 0x1c; // 0b11100
p_qhd->interval_ms = interval;
}
break;
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index a12f7d6ed..5ca093506 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -112,22 +112,22 @@ enum {
enum {
OHCI_CCODE_NO_ERROR = 0,
OHCI_CCODE_CRC = 1,
- OHCI_CCODE_BIT_STUFFING = 2,
- OHCI_CCODE_DATA_TOGGLE_MISMATCH = 3,
- OHCI_CCODE_STALL = 4,
- OHCI_CCODE_DEVICE_NOT_RESPONDING = 5,
- OHCI_CCODE_PID_CHECK_FAILURE = 6,
- OHCI_CCODE_UNEXPECTED_PID = 7,
- OHCI_CCODE_DATA_OVERRUN = 8,
- OHCI_CCODE_DATA_UNDERRUN = 9,
- OHCI_CCODE_BUFFER_OVERRUN = 12,
- OHCI_CCODE_BUFFER_UNDERRUN = 13,
- OHCI_CCODE_NOT_ACCESSED = 14,
+ OHCI_CCODE_BIT_STUFFING = 2,
+ OHCI_CCODE_DATA_TOGGLE_MISMATCH = 3,
+ OHCI_CCODE_STALL = 4,
+ OHCI_CCODE_DEVICE_NOT_RESPONDING = 5,
+ OHCI_CCODE_PID_CHECK_FAILURE = 6,
+ OHCI_CCODE_UNEXPECTED_PID = 7,
+ OHCI_CCODE_DATA_OVERRUN = 8,
+ OHCI_CCODE_DATA_UNDERRUN = 9,
+ OHCI_CCODE_BUFFER_OVERRUN = 12,
+ OHCI_CCODE_BUFFER_UNDERRUN = 13,
+ OHCI_CCODE_NOT_ACCESSED = 14,
};
enum {
OHCI_INT_ON_COMPLETE_YES = 0,
- OHCI_INT_ON_COMPLETE_NO = TU_BIN8(111)
+ OHCI_INT_ON_COMPLETE_NO = 0x7 // 0b111
};
enum {
@@ -147,21 +147,36 @@ enum {
};
//--------------------------------------------------------------------+
+// Support for explicit D-cache operations
+//--------------------------------------------------------------------+
+TU_ATTR_WEAK bool hcd_dcache_clean(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; return true; }
+TU_ATTR_WEAK bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; return true; }
+
+// Optional macro to access ED in uncached way
+#ifndef hcd_dcache_uncached
+#define hcd_dcache_uncached(x) (x)
+#endif
+
+//--------------------------------------------------------------------+
// INTERNAL OBJECT & FUNCTION DECLARATION
//--------------------------------------------------------------------+
CFG_TUH_MEM_SECTION TU_ATTR_ALIGNED(256) static ohci_data_t ohci_data;
-static ohci_ed_t * const p_ed_head[] =
-{
- [TUSB_XFER_CONTROL] = &ohci_data.control[0].ed,
- [TUSB_XFER_BULK ] = &ohci_data.bulk_head_ed,
- [TUSB_XFER_INTERRUPT] = &ohci_data.period_head_ed,
+static ohci_ed_t * const p_ed_head[] = {
+ [TUSB_XFER_CONTROL] = hcd_dcache_uncached(&ohci_data.control[0].ed),
+ [TUSB_XFER_BULK ] = hcd_dcache_uncached(&ohci_data.bulk_head_ed),
+ [TUSB_XFER_INTERRUPT] = hcd_dcache_uncached(&ohci_data.period_head_ed),
[TUSB_XFER_ISOCHRONOUS] = NULL // TODO Isochronous
};
static void ed_list_insert(ohci_ed_t * p_pre, ohci_ed_t * p_ed);
static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr);
static gtd_extra_data_t *gtd_get_extra_data(ohci_gtd_t const * const gtd);
+static ohci_ed_t* ed_from_addr(uint8_t dev_addr, uint8_t ep_addr);
+
+TU_ATTR_ALWAYS_INLINE static inline ohci_ed_t* ed_control(uint8_t daddr) {
+ return hcd_dcache_uncached(&ohci_data.control[daddr].ed);
+}
//--------------------------------------------------------------------+
// USBH-HCD API
@@ -169,13 +184,11 @@ static gtd_extra_data_t *gtd_get_extra_data(ohci_gtd_t const * const gtd);
// If your system requires separation of virtual and physical memory, implement
// tusb_app_virt_to_phys and tusb_app_virt_to_phys in your application.
-TU_ATTR_ALWAYS_INLINE static inline void *_phys_addr(void *virtual_address)
-{
+TU_ATTR_ALWAYS_INLINE static inline void *_phys_addr(void *virtual_address) {
return tusb_app_virt_to_phys(virtual_address);
}
-TU_ATTR_ALWAYS_INLINE static inline void *_virt_addr(void *physical_address)
-{
+TU_ATTR_ALWAYS_INLINE static inline void *_virt_addr(void *physical_address) {
return tusb_app_phys_to_virt(physical_address);
}
@@ -188,32 +201,29 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
//------------- Data Structure init -------------//
tu_memclr(&ohci_data, sizeof(ohci_data_t));
- for(uint8_t i=0; i<32; i++)
- { // assign all interrupt pointers to period head ed
+ // assign all interrupt pointers to period head ed
+ for(uint8_t i=0; i<32; i++) {
ohci_data.hcca.interrupt_table[i] = (uint32_t) _phys_addr(&ohci_data.period_head_ed);
}
- ohci_data.control[0].ed.skip = 1;
- ohci_data.bulk_head_ed.skip = 1;
- ohci_data.period_head_ed.skip = 1;
+ ohci_data.control[0].ed.w0.skip = 1;
+ ohci_data.bulk_head_ed.w0.skip = 1;
+ ohci_data.period_head_ed.w0.skip = 1;
//If OHCI hardware is in SMM mode, gain ownership (Ref OHCI spec 5.1.1.3.3)
- if (OHCI_REG->control_bit.interrupt_routing == 1)
- {
+ if (OHCI_REG->control_bit.interrupt_routing == 1) {
OHCI_REG->command_status_bit.ownership_change_request = 1;
while (OHCI_REG->control_bit.interrupt_routing == 1) {}
- }
-
- //If OHCI hardware has come from warm-boot, signal resume (Ref OHCI spec 5.1.1.3.4)
- else if (OHCI_REG->control_bit.hc_functional_state != OHCI_CONTROL_FUNCSTATE_RESET &&
- OHCI_REG->control_bit.hc_functional_state != OHCI_CONTROL_FUNCSTATE_OPERATIONAL)
- {
+ } else if (OHCI_REG->control_bit.hc_functional_state != OHCI_CONTROL_FUNCSTATE_RESET &&
+ OHCI_REG->control_bit.hc_functional_state != OHCI_CONTROL_FUNCSTATE_OPERATIONAL) {
+ //If OHCI hardware has come from warm-boot, signal resume (Ref OHCI spec 5.1.1.3.4)
//Wait 20 ms. (Ref Usb spec 7.1.7.7)
OHCI_REG->control_bit.hc_functional_state = OHCI_CONTROL_FUNCSTATE_RESUME;
-
tusb_time_delay_ms_api(20);
}
+ hcd_dcache_clean(&ohci_data, sizeof(ohci_data));
+
// reset controller
OHCI_REG->command_status_bit.controller_reset = 1;
while( OHCI_REG->command_status_bit.controller_reset ) {} // should not take longer than 10 us
@@ -250,7 +260,6 @@ uint32_t hcd_frame_number(uint8_t rhport)
return (ohci_data.frame_number_hi << 16) | OHCI_REG->frame_number;
}
-
//--------------------------------------------------------------------+
// PORT API
//--------------------------------------------------------------------+
@@ -276,26 +285,18 @@ tusb_speed_t hcd_port_speed_get(uint8_t hostid)
// endpoints are tied to an address, which only reclaim after a long delay when enumerating
// thus there is no need to make sure ED is not in HC's cahed as it will not for sure
-void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
-{
+void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
// TODO OHCI
(void) rhport;
// addr0 serves as static head --> only set skip bit
- if ( dev_addr == 0 )
- {
- ohci_data.control[0].ed.skip = 1;
- }else
- {
- // remove control
- ed_list_remove_by_addr( p_ed_head[TUSB_XFER_CONTROL], dev_addr);
-
- // remove bulk
- ed_list_remove_by_addr(p_ed_head[TUSB_XFER_BULK], dev_addr);
-
- // remove interrupt
- ed_list_remove_by_addr(p_ed_head[TUSB_XFER_INTERRUPT], dev_addr);
-
+ if (dev_addr == 0) {
+ ohci_ed_t* ed = ed_control(0);
+ ed->w0.skip = 1;
+ } else {
+ ed_list_remove_by_addr(p_ed_head[TUSB_XFER_CONTROL], dev_addr); // remove control
+ ed_list_remove_by_addr(p_ed_head[TUSB_XFER_BULK], dev_addr); // remove bulk
+ ed_list_remove_by_addr(p_ed_head[TUSB_XFER_INTERRUPT], dev_addr); // remove interrupt
// TODO remove ISO
}
}
@@ -307,35 +308,36 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
//--------------------------------------------------------------------+
// List Helper
//--------------------------------------------------------------------+
-static inline tusb_xfer_type_t ed_get_xfer_type(ohci_ed_t const * const p_ed)
-{
- return (p_ed->ep_number == 0 ) ? TUSB_XFER_CONTROL :
- (p_ed->is_iso ) ? TUSB_XFER_ISOCHRONOUS :
- (p_ed->is_interrupt_xfer) ? TUSB_XFER_INTERRUPT : TUSB_XFER_BULK;
+static inline tusb_xfer_type_t ed_get_xfer_type(ohci_ed_word0_t w0) {
+ return (w0.ep_number == 0 ) ? TUSB_XFER_CONTROL :
+ (w0.is_iso ) ? TUSB_XFER_ISOCHRONOUS :
+ (w0.is_interrupt_xfer) ? TUSB_XFER_INTERRUPT : TUSB_XFER_BULK;
}
-static void ed_init(ohci_ed_t *p_ed, uint8_t dev_addr, uint16_t ep_size, uint8_t ep_addr, uint8_t xfer_type, uint8_t interval)
-{
+static void ed_init(ohci_ed_t *p_ed, uint8_t dev_addr, uint16_t ep_size, uint8_t ep_addr, uint8_t xfer_type, uint8_t interval) {
(void) interval;
// address 0 is used as async head, which always on the list --> cannot be cleared
- if (dev_addr != 0)
- {
- tu_memclr(p_ed, sizeof(ohci_ed_t));
+ if (dev_addr != 0) {
+ p_ed->td_tail = 0;
+ p_ed->td_head.address = 0;
+ p_ed->next = 0;
}
tuh_bus_info_t bus_info;
tuh_bus_info_get(dev_addr, &bus_info);
- p_ed->dev_addr = dev_addr;
- p_ed->ep_number = ep_addr & 0x0F;
- p_ed->pid = (xfer_type == TUSB_XFER_CONTROL) ? PID_FROM_TD : (tu_edpt_dir(ep_addr) ? PID_IN : PID_OUT);
- p_ed->speed = bus_info.speed;
- p_ed->is_iso = (xfer_type == TUSB_XFER_ISOCHRONOUS) ? 1 : 0;
- p_ed->max_packet_size = ep_size;
+ ohci_ed_word0_t w0 = {.value = 0};
+ w0.dev_addr = dev_addr;
+ w0.ep_number = ep_addr & 0x0F;
+ w0.pid = (xfer_type == TUSB_XFER_CONTROL) ? PID_FROM_TD : (tu_edpt_dir(ep_addr) ? PID_IN : PID_OUT);
+ w0.speed = bus_info.speed;
+ w0.is_iso = (xfer_type == TUSB_XFER_ISOCHRONOUS) ? 1 : 0;
+ w0.max_packet_size = ep_size;
- p_ed->used = 1;
- p_ed->is_interrupt_xfer = (xfer_type == TUSB_XFER_INTERRUPT ? 1 : 0);
+ w0.used = 1;
+ w0.is_interrupt_xfer = (xfer_type == TUSB_XFER_INTERRUPT ? 1 : 0);
+ p_ed->w0 = w0;
}
static void gtd_init(ohci_gtd_t *p_td, uint8_t *data_ptr, uint16_t total_bytes) {
@@ -358,126 +360,109 @@ static void gtd_init(ohci_gtd_t *p_td, uint8_t *data_ptr, uint16_t total_bytes)
}
}
-static ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr)
-{
- if ( tu_edpt_number(ep_addr) == 0 ) return &ohci_data.control[dev_addr].ed;
+static ohci_ed_t* ed_from_addr(uint8_t dev_addr, uint8_t ep_addr) {
+ if (tu_edpt_number(ep_addr) == 0) {
+ return ed_control(dev_addr);
+ }
ohci_ed_t* ed_pool = ohci_data.ed_pool;
-
- for(uint32_t i=0; i<ED_MAX; i++)
- {
- if ( (ed_pool[i].dev_addr == dev_addr) &&
- ep_addr == tu_edpt_addr(ed_pool[i].ep_number, ed_pool[i].pid == PID_IN) )
- {
- return &ed_pool[i];
+ for (size_t i = 0; i < ED_MAX; i++) {
+ ohci_ed_t* qhd = hcd_dcache_uncached(&ed_pool[i]);
+ if ((qhd->w0.dev_addr == dev_addr) &&
+ ep_addr == tu_edpt_addr(qhd->w0.ep_number, qhd->w0.pid == PID_IN)) {
+ return qhd;
}
}
return NULL;
}
-static ohci_ed_t * ed_find_free(void)
-{
+static ohci_ed_t* ed_find_free(void) {
ohci_ed_t* ed_pool = ohci_data.ed_pool;
-
- for(uint8_t i = 0; i < ED_MAX; i++)
- {
- if ( !ed_pool[i].used ) return &ed_pool[i];
+ for (size_t i = 0; i < ED_MAX; i++) {
+ ohci_ed_t* qhd = hcd_dcache_uncached(&ed_pool[i]);
+ if (!qhd->w0.used) {
+ return qhd;
+ }
}
-
return NULL;
}
-static void ed_list_insert(ohci_ed_t * p_pre, ohci_ed_t * p_ed)
-{
+static void ed_list_insert(ohci_ed_t * p_pre, ohci_ed_t * p_ed) {
p_ed->next = p_pre->next;
p_pre->next = (uint32_t) _phys_addr(p_ed);
}
-static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr)
-{
+static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr) {
ohci_ed_t* p_prev = p_head;
- while( p_prev->next )
- {
- ohci_ed_t* ed = (ohci_ed_t*) _virt_addr((void *)p_prev->next);
+ while (p_prev->next) {
+ ohci_ed_t* ed = (ohci_ed_t*)_virt_addr((void*)p_prev->next);
- if (ed->dev_addr == dev_addr)
- {
+ if (ed->w0.dev_addr == dev_addr) {
// Prevent Host Controller from processing this ED while we remove it
- ed->skip = 1;
+ ed->w0.skip = 1;
// unlink ed, will also move up p_prev
p_prev->next = ed->next;
// point the removed ED's next pointer to list head to make sure HC can always safely move away from this ED
- ed->next = (uint32_t) _phys_addr(p_head);
- ed->used = 0;
- ed->skip = 0;
- }else
- {
- p_prev = (ohci_ed_t*) _virt_addr((void *)p_prev->next);
+ ed->next = (uint32_t)_phys_addr(p_head);
+ ed->w0.used = 0;
+ ed->w0.skip = 0;
+ } else {
+ p_prev = (ohci_ed_t*)_virt_addr((void*)p_prev->next);
}
}
}
-static ohci_gtd_t * gtd_find_free(void)
-{
- for(uint8_t i=0; i < GTD_MAX; i++)
- {
- if ( !ohci_data.gtd_pool[i].used ) return &ohci_data.gtd_pool[i];
+static ohci_gtd_t* gtd_find_free(void) {
+ for (uint8_t i = 0; i < GTD_MAX; i++) {
+ if (!ohci_data.gtd_pool[i].used) {
+ return &ohci_data.gtd_pool[i];
+ }
}
-
return NULL;
}
-static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd)
-{
- // tail is always NULL
- if ( tu_align16(p_ed->td_head.address) == 0 )
- { // TD queue is empty --> head = TD
- p_ed->td_head.address |= (uint32_t) _phys_addr(p_gtd);
- }
- else
- { // TODO currently only support queue up to 2 TD each endpoint at a time
- ((ohci_gtd_t*) tu_align16((uint32_t)_virt_addr((void *)p_ed->td_head.address)))->next = (uint32_t) _phys_addr(p_gtd);
- }
-}
-
//--------------------------------------------------------------------+
// Endpoint API
//--------------------------------------------------------------------+
-bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
-{
- (void) rhport;
+bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc) {
+ (void)rhport;
// TODO iso support
TU_ASSERT(ep_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS);
//------------- Prepare Queue Head -------------//
- ohci_ed_t * p_ed;
-
- if ( ep_desc->bEndpointAddress == 0 )
- {
- p_ed = &ohci_data.control[dev_addr].ed;
- }else
- {
+ ohci_ed_t* p_ed;
+ if (ep_desc->bEndpointAddress == 0) {
+ p_ed = ed_control(dev_addr);
+ } else {
p_ed = ed_find_free();
}
TU_ASSERT(p_ed);
- ed_init( p_ed, dev_addr, tu_edpt_packet_size(ep_desc), ep_desc->bEndpointAddress,
- ep_desc->bmAttributes.xfer, ep_desc->bInterval );
+ ed_init(p_ed, dev_addr, tu_edpt_packet_size(ep_desc), ep_desc->bEndpointAddress,
+ ep_desc->bmAttributes.xfer, ep_desc->bInterval);
// control of dev0 is used as static async head
- if ( dev_addr == 0 )
- {
- p_ed->skip = 0; // only need to clear skip bit
+ if (dev_addr == 0) {
+ p_ed->w0.skip = 0; // only need to clear skip bit
return true;
}
- ed_list_insert( p_ed_head[ep_desc->bmAttributes.xfer], p_ed );
+ if (tu_edpt_number(ep_desc->bEndpointAddress) != 0) {
+ // Get an empty TD and use it as the end-of-list marker.
+ // This marker TD will be used when a transfer is made on this EP
+ // (and a new, empty TD will be allocated for the next-next transfer).
+ ohci_gtd_t* gtd = gtd_find_free();
+ TU_ASSERT(gtd);
+ p_ed->td_head.address = (uint32_t)_phys_addr(gtd);
+ p_ed->td_tail = (uint32_t)_phys_addr(gtd);
+ }
+ ed_list_insert(p_ed_head[ep_desc->bmAttributes.xfer], p_ed);
return true;
}
@@ -486,18 +471,20 @@ bool hcd_edpt_close(uint8_t rhport, uint8_t daddr, uint8_t ep_addr) {
return false; // TODO not implemented yet
}
-bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
-{
+bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) {
(void) rhport;
- ohci_ed_t* ed = &ohci_data.control[dev_addr].ed;
+ ohci_ed_t* ed = ed_control(dev_addr);
ohci_gtd_t *qtd = &ohci_data.control[dev_addr].gtd;
+ hcd_dcache_clean(setup_packet, 8);
+
gtd_init(qtd, (uint8_t*)(uintptr_t) setup_packet, 8);
qtd->index = dev_addr;
qtd->pid = PID_SETUP;
qtd->data_toggle = GTD_DT_DATA0;
qtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;
+ hcd_dcache_clean(qtd, sizeof(ohci_gtd_t));
//------------- Attach TDs list to Control Endpoint -------------//
ed->td_head.address = (uint32_t) _phys_addr(qtd);
@@ -507,43 +494,53 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
return true;
}
-bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen)
-{
+bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) {
(void) rhport;
uint8_t const epnum = tu_edpt_number(ep_addr);
uint8_t const dir = tu_edpt_dir(ep_addr);
- if ( epnum == 0 )
- {
- ohci_ed_t* ed = &ohci_data.control[dev_addr].ed;
- ohci_gtd_t* gtd = &ohci_data.control[dev_addr].gtd;
+ // IN transfer: invalidate buffer, OUT transfer: clean buffer
+ if (dir) {
+ hcd_dcache_invalidate(buffer, buflen);
+ } else {
+ hcd_dcache_clean(buffer, buflen);
+ }
+ ohci_ed_t * ed = ed_from_addr(dev_addr, ep_addr);
+ TU_ASSERT(ed);
+ if (epnum == 0) {
+ ohci_gtd_t* gtd = &ohci_data.control[dev_addr].gtd;
gtd_init(gtd, buffer, buflen);
-
gtd->index = dev_addr;
- gtd->pid = dir ? PID_IN : PID_OUT;
- gtd->data_toggle = GTD_DT_DATA1; // Both Data and Ack stage start with DATA1
+ gtd->pid = dir ? PID_IN : PID_OUT;
+ gtd->data_toggle = GTD_DT_DATA1; // Both Data and Ack stage start with DATA1
gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;
+ hcd_dcache_clean(gtd, sizeof(ohci_gtd_t));
- ed->td_head.address = (uint32_t) _phys_addr(gtd);
+ ed->td_head.address = (uint32_t)_phys_addr(gtd);
OHCI_REG->command_status_bit.control_list_filled = 1;
- }else
- {
- ohci_ed_t * ed = ed_from_addr(dev_addr, ep_addr);
- ohci_gtd_t* gtd = gtd_find_free();
-
- TU_ASSERT(gtd);
+ } else {
+ tusb_xfer_type_t xfer_type = ed_get_xfer_type(ed->w0);
+ ohci_gtd_t* gtd = (ohci_gtd_t*)_virt_addr((void*)ed->td_tail);
gtd_init(gtd, buffer, buflen);
gtd->index = ed-ohci_data.ed_pool;
gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;
- td_insert_to_ed(ed, gtd);
+ // Insert a new, empty TD at the tail, to be used by the next transfer
+ ohci_gtd_t* new_gtd = gtd_find_free();
+ TU_ASSERT(new_gtd);
- tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_addr(dev_addr, ep_addr) );
- if (TUSB_XFER_BULK == xfer_type) OHCI_REG->command_status_bit.bulk_list_filled = 1;
+ gtd->next = (uint32_t)_phys_addr(new_gtd);
+ hcd_dcache_clean(gtd, sizeof(ohci_gtd_t));
+
+ ed->td_tail = (uint32_t)_phys_addr(new_gtd);
+
+ if (TUSB_XFER_BULK == xfer_type) {
+ OHCI_REG->command_status_bit.bulk_list_filled = 1;
+ }
}
return true;
@@ -561,13 +558,14 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
(void) rhport;
ohci_ed_t * const p_ed = ed_from_addr(dev_addr, ep_addr);
- p_ed->is_stalled = 0;
- p_ed->td_tail &= 0x0Ful; // set tail pointer back to NULL
+ ohci_ed_word2_t td_head = p_ed->td_head;
+ td_head.toggle = 0; // reset data toggle
+ td_head.halted = 0;
+ p_ed->td_head = td_head;
- p_ed->td_head.toggle = 0; // reset data toggle
- p_ed->td_head.halted = 0;
-
- if ( TUSB_XFER_BULK == ed_get_xfer_type(p_ed) ) OHCI_REG->command_status_bit.bulk_list_filled = 1;
+ if (TUSB_XFER_BULK == ed_get_xfer_type(p_ed->w0)) {
+ OHCI_REG->command_status_bit.bulk_list_filled = 1;
+ }
return true;
}
@@ -576,14 +574,18 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
//--------------------------------------------------------------------+
// OHCI Interrupt Handler
//--------------------------------------------------------------------+
-static ohci_td_item_t* list_reverse(ohci_td_item_t* td_head)
-{
- ohci_td_item_t* td_reverse_head = NULL;
+TU_ATTR_ALWAYS_INLINE static inline bool is_itd(ohci_td_item_t* item) {
+ (void) item;
+ return false; // ISO not supported yet
+}
- while(td_head != NULL)
- {
+static ohci_td_item_t* list_reverse(ohci_td_item_t* td_head) {
+ ohci_td_item_t* td_reverse_head = NULL;
+ while(td_head != NULL) {
td_head = _virt_addr(td_head);
- uint32_t next = td_head->next;
+ const uint32_t item_size = is_itd(td_head) ? sizeof(ohci_itd_t) : sizeof(ohci_gtd_t);
+ hcd_dcache_invalidate(td_head, item_size);
+ const uint32_t next = td_head->next;
// make current's item become reverse's first item
td_head->next = (uint32_t) td_reverse_head;
@@ -595,24 +597,22 @@ static ohci_td_item_t* list_reverse(ohci_td_item_t* td_head)
return _virt_addr(td_reverse_head);
}
-static inline bool gtd_is_control(ohci_gtd_t const * const p_qtd)
-{
+TU_ATTR_ALWAYS_INLINE static inline bool gtd_is_control(ohci_gtd_t const * const p_qtd) {
return ((uint32_t) p_qtd) < ((uint32_t) ohci_data.gtd_pool); // check ohci_data_t for memory layout
}
-static inline ohci_ed_t* gtd_get_ed(ohci_gtd_t const * const p_qtd)
-{
- if ( gtd_is_control(p_qtd) )
- {
- return &ohci_data.control[p_qtd->index].ed;
- }else
- {
- return &ohci_data.ed_pool[p_qtd->index];
+TU_ATTR_ALWAYS_INLINE static inline ohci_ed_t* gtd_get_ed(ohci_gtd_t const* const p_qtd) {
+ ohci_ed_t* ed;
+ if (gtd_is_control(p_qtd)) {
+ ed = &ohci_data.control[p_qtd->index].ed;
+ } else {
+ ed = &ohci_data.ed_pool[p_qtd->index];
}
+ return hcd_dcache_uncached(ed);
}
static gtd_extra_data_t *gtd_get_extra_data(ohci_gtd_t const * const gtd) {
- if ( gtd_is_control(gtd) ) {
+ if (gtd_is_control(gtd)) {
uint8_t idx = ((uintptr_t)gtd - (uintptr_t)&ohci_data.control->gtd) / sizeof(ohci_data.control[0]);
return &ohci_data.gtd_extra_control[idx];
}else {
@@ -620,102 +620,77 @@ static gtd_extra_data_t *gtd_get_extra_data(ohci_gtd_t const * const gtd) {
}
}
-static inline uint32_t gtd_xfer_byte_left(uint32_t buffer_end, uint32_t current_buffer)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t gtd_xfer_byte_left(uint32_t buffer_end, uint32_t current_buffer) {
// 5.2.9 OHCI sample code
-
// CBP is 0 mean all data is transferred
- if (current_buffer == 0) return 0;
+ if (current_buffer == 0) {
+ return 0;
+ }
return (tu_align4k(buffer_end ^ current_buffer) ? 0x1000 : 0) +
- tu_offset4k(buffer_end) - tu_offset4k(current_buffer) + 1;
+ tu_offset4k(buffer_end) - tu_offset4k(current_buffer) + 1;
}
-static void done_queue_isr(uint8_t hostid)
-{
- (void) hostid;
+static void done_queue_isr(uint8_t hostid) {
+ (void)hostid;
// done head is written in reversed order of completion --> need to reverse the done queue first
- ohci_td_item_t* td_head = list_reverse ( (ohci_td_item_t*) tu_align16(ohci_data.hcca.done_head) );
+ ohci_td_item_t* td_head = list_reverse((ohci_td_item_t*)tu_align16(ohci_data.hcca.done_head));
ohci_data.hcca.done_head = 0;
- while( td_head != NULL )
- {
+ while (td_head != NULL) {
// TODO check if td_head is iso td
//------------- Non ISO transfer -------------//
- ohci_gtd_t * const qtd = (ohci_gtd_t *) td_head;
+ ohci_gtd_t* const qtd = (ohci_gtd_t*) td_head;
xfer_result_t const event = (qtd->condition_code == OHCI_CCODE_NO_ERROR) ? XFER_RESULT_SUCCESS :
(qtd->condition_code == OHCI_CCODE_STALL) ? XFER_RESULT_STALLED : XFER_RESULT_FAILED;
-
qtd->used = 0; // free TD
- if ( (qtd->delay_interrupt == OHCI_INT_ON_COMPLETE_YES) || (event != XFER_RESULT_SUCCESS) )
- {
- ohci_ed_t * const ed = gtd_get_ed(qtd);
- uint32_t const xferred_bytes = gtd_get_extra_data(qtd)->expected_bytes - gtd_xfer_byte_left((uint32_t) qtd->buffer_end, (uint32_t) qtd->current_buffer_pointer);
-
- // NOTE Assuming the current list is BULK and there is no other EDs in the list has queued TDs.
- // When there is a error resulting this ED is halted, and this EP still has other queued TD
- // --> the Bulk list only has this halted EP queueing TDs (remaining)
- // --> Bulk list will be considered as not empty by HC !!! while there is no attempt transaction on this list
- // --> HC will not process Control list (due to service ratio when Bulk list not empty)
- // To walk-around this, the halted ED will have TailP = HeadP (empty list condition), when clearing halt
- // the TailP must be set back to NULL for processing remaining TDs
- if (event != XFER_RESULT_SUCCESS)
- {
- ed->td_tail &= 0x0Ful;
- ed->td_tail |= tu_align16(ed->td_head.address); // mark halted EP as empty queue
- if ( event == XFER_RESULT_STALLED ) ed->is_stalled = 1;
- }
-
- uint8_t dir = (ed->ep_number == 0) ? (qtd->pid == PID_IN) : (ed->pid == PID_IN);
-
- hcd_event_xfer_complete(ed->dev_addr, tu_edpt_addr(ed->ep_number, dir), xferred_bytes, event, true);
+ if ((qtd->delay_interrupt == OHCI_INT_ON_COMPLETE_YES) || (event != XFER_RESULT_SUCCESS)) {
+ const ohci_ed_t* ed = gtd_get_ed(qtd);
+ const ohci_ed_word0_t ed_w0 = ed->w0;
+ const uint32_t xferred_bytes = gtd_get_extra_data(qtd)->expected_bytes - gtd_xfer_byte_left((uint32_t)qtd->buffer_end, (uint32_t)qtd->current_buffer_pointer);
+ uint8_t dir = (ed_w0.ep_number == 0) ? (qtd->pid == PID_IN) : (ed_w0.pid == PID_IN);
+ const uint8_t ep_addr = tu_edpt_addr(ed_w0.ep_number, dir);
+ hcd_event_xfer_complete(ed_w0.dev_addr, ep_addr, xferred_bytes, event, true);
}
- td_head = (ohci_td_item_t*) _virt_addr((void *)td_head->next);
+ td_head = (ohci_td_item_t*)_virt_addr((void*)td_head->next);
}
}
void hcd_int_handler(uint8_t hostid, bool in_isr) {
- (void) in_isr;
-
- uint32_t const int_en = OHCI_REG->interrupt_enable;
+ (void)in_isr;
+ uint32_t const int_en = OHCI_REG->interrupt_enable;
uint32_t const int_status = OHCI_REG->interrupt_status & int_en;
- if (int_status == 0) return;
+ if (int_status == 0) {
+ return;
+ }
// Disable MIE as per OHCI spec 5.3
OHCI_REG->interrupt_disable = OHCI_INT_MASTER_ENABLE_MASK;
// Frame number overflow
- if ( int_status & OHCI_INT_FRAME_OVERFLOW_MASK )
- {
+ if (int_status & OHCI_INT_FRAME_OVERFLOW_MASK) {
ohci_data.frame_number_hi++;
}
//------------- RootHub status -------------//
- if ( int_status & OHCI_INT_RHPORT_STATUS_CHANGE_MASK )
- {
- for (int i = 0; i < TUP_OHCI_RHPORTS; i++)
- {
+ if (int_status & OHCI_INT_RHPORT_STATUS_CHANGE_MASK) {
+ for (int i = 0; i < TUP_OHCI_RHPORTS; i++) {
uint32_t const rhport_status = OHCI_REG->rhport_status[i] & RHPORT_ALL_CHANGE_MASK;
- if ( rhport_status & RHPORT_CONNECT_STATUS_CHANGE_MASK )
- {
+ if (rhport_status & RHPORT_CONNECT_STATUS_CHANGE_MASK) {
// TODO check if remote wake-up
- if ( OHCI_REG->rhport_status_bit[i].current_connect_status )
- {
+ if (OHCI_REG->rhport_status_bit[i].current_connect_status) {
// TODO reset port immediately, without this controller will got 2-3 (debouncing connection status change)
OHCI_REG->rhport_status[i] = RHPORT_PORT_RESET_STATUS_MASK;
hcd_event_device_attach(i, true);
- }else
- {
+ } else {
hcd_event_device_remove(i, true);
}
}
- if ( rhport_status & RHPORT_PORT_SUSPEND_CHANGE_MASK)
- {
-
+ if (rhport_status & RHPORT_PORT_SUSPEND_CHANGE_MASK) {
}
OHCI_REG->rhport_status[i] = rhport_status; // acknowledge all interrupt
@@ -723,13 +698,11 @@ void hcd_int_handler(uint8_t hostid, bool in_isr) {
}
//------------- Transfer Complete -------------//
- if (int_status & OHCI_INT_WRITEBACK_DONEHEAD_MASK)
- {
+ if (int_status & OHCI_INT_WRITEBACK_DONEHEAD_MASK) {
done_queue_isr(hostid);
}
OHCI_REG->interrupt_status = int_status; // Acknowledge handled interrupt
-
OHCI_REG->interrupt_enable = OHCI_INT_MASTER_ENABLE_MASK; // Enable MIE
}
//--------------------------------------------------------------------+
diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h
index 38cc84858..d9ebe1d54 100644
--- a/src/portable/ohci/ohci.h
+++ b/src/portable/ohci/ohci.h
@@ -48,6 +48,10 @@ enum {
// tinyUSB's OHCI implementation caps number of EDs to 8 bits
TU_VERIFY_STATIC (ED_MAX <= 256, "Reduce CFG_TUH_DEVICE_MAX or CFG_TUH_ENDPOINT_MAX");
+#define GTD_ALIGN_SIZE TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 16)
+#define ED_ALIGN_SIZE TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 16)
+#define ITD_ALIGN_SIZE TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 32)
+
//--------------------------------------------------------------------+
// OHCI Data Structure
//--------------------------------------------------------------------+
@@ -61,18 +65,35 @@ typedef struct {
TU_VERIFY_STATIC( sizeof(ohci_hcca_t) == 256, "size is not correct" );
+// An OHCI host controller is controlled using data structures placed in memory (RAM).
+// It needs to both read and write these data structures (as defined by the OHCI specification),
+// and this can be mentally conceptualized similar to two software threads running on
+// two different CPUs. In order to prevent a _data race_ where data gets corrupted,
+// the CPU and the OHCI host controller need to agree on how the memory should be accessed.
+// In this driver, we do this by transferring logical ownership of transfer descriptors (TDs)
+// between the CPU and the OHCI host controller. Only the device which holds the logical ownership
+// is allowed to read or write the TD. This ownership is not visible anywhere in the code,
+// but it instead must be inferred based on the logical state of the transfer.
+//
+// If dcache-supporting mode is enabled, we need to do additional manual cache operations
+// in order to correctly transfer this logical ownership and prevent data corruption.
+// In order to do this, we also choose to align each OHCI TD so that it doesn't
+// share CPU cache lines with other TDs. This is because manual cache operations
+// can only be performed on cache line granularity. In other words, one cache line is
+// the _smallest_ amount that can be read/written at a time. If there were to be multiple TDs
+// in the same cache line, they would be required to always have the same logical ownership.
+// This ends up being impossible to guarantee, so we choose a design which avoids the situation entirely.
+
// common link item for gtd and itd for list travel
-// use as pointer only
typedef struct TU_ATTR_ALIGNED(16) {
uint32_t reserved[2];
volatile uint32_t next;
uint32_t reserved2;
}ohci_td_item_t;
-typedef struct TU_ATTR_ALIGNED(16)
-{
- // Word 0
- uint32_t used : 1;
+typedef struct TU_ATTR_ALIGNED(GTD_ALIGN_SIZE) {
+ // Word 0
+ uint32_t used : 1;
uint32_t index : 8; // endpoint index the gtd belongs to, or device address in case of control xfer
uint32_t : 9; // can be used
uint32_t buffer_rounding : 1;
@@ -82,56 +103,55 @@ typedef struct TU_ATTR_ALIGNED(16)
volatile uint32_t error_count : 2;
volatile uint32_t condition_code : 4;
- // Word 1
- uint8_t* volatile current_buffer_pointer;
+ // Word 1
+ uint8_t* volatile current_buffer_pointer;
- // Word 2 : next TD
- volatile uint32_t next;
+ // Word 2 : next TD
+ volatile uint32_t next;
- // Word 3
- uint8_t* buffer_end;
+ // Word 3
+ uint8_t* buffer_end;
} ohci_gtd_t;
+TU_VERIFY_STATIC(sizeof(ohci_gtd_t) == GTD_ALIGN_SIZE, "size is not correct" );
-TU_VERIFY_STATIC( sizeof(ohci_gtd_t) == 16, "size is not correct" );
-
-typedef struct TU_ATTR_ALIGNED(16)
-{
- // Word 0
- uint32_t dev_addr : 7;
- uint32_t ep_number : 4;
- uint32_t pid : 2;
- uint32_t speed : 1;
- uint32_t skip : 1;
- uint32_t is_iso : 1;
- uint32_t max_packet_size : 11;
- // HCD: make use of 5 reserved bits
- uint32_t used : 1;
- uint32_t is_interrupt_xfer : 1;
- uint32_t is_stalled : 1;
- uint32_t : 2;
-
- // Word 1
- uint32_t td_tail;
+typedef union {
+ struct {
+ uint32_t dev_addr : 7;
+ uint32_t ep_number : 4;
+ uint32_t pid : 2;
+ uint32_t speed : 1;
+ uint32_t skip : 1;
+ uint32_t is_iso : 1;
+ uint32_t max_packet_size : 11;
+ // HCD: make use of 5 reserved bits
+ uint32_t used : 1;
+ uint32_t is_interrupt_xfer : 1;
+ uint32_t : 3;
+ };
+ uint32_t value;
+} ohci_ed_word0_t;
+TU_VERIFY_STATIC(sizeof(ohci_ed_word0_t) == 4, "size is not correct" );
- // Word 2
- volatile union {
- uint32_t address;
- struct {
- uint32_t halted : 1;
- uint32_t toggle : 1;
- uint32_t : 30;
- };
- }td_head;
+typedef union {
+ uint32_t address;
+ struct {
+ uint32_t halted : 1;
+ uint32_t toggle : 1;
+ uint32_t : 30;
+ };
+} ohci_ed_word2_t;
+TU_VERIFY_STATIC(sizeof(ohci_ed_word2_t) == 4, "size is not correct" );
- // Word 3: next ED
- uint32_t next;
+typedef struct TU_ATTR_ALIGNED(ED_ALIGN_SIZE) {
+ ohci_ed_word0_t w0; // Word 0
+ uint32_t td_tail; // Word 1
+ volatile ohci_ed_word2_t td_head; // Word 2
+ uint32_t next; // Word 3
} ohci_ed_t;
+TU_VERIFY_STATIC(sizeof(ohci_ed_t) == ED_ALIGN_SIZE, "size is not correct" );
-TU_VERIFY_STATIC( sizeof(ohci_ed_t) == 16, "size is not correct" );
-
-typedef struct TU_ATTR_ALIGNED(32)
-{
- /*---------- Word 1 ----------*/
+typedef struct TU_ATTR_ALIGNED(ITD_ALIGN_SIZE) {
+ /*---------- Word 1 ----------*/
uint32_t starting_frame : 16;
uint32_t : 5; // can be used
uint32_t delay_interrupt : 3;
@@ -139,24 +159,25 @@ typedef struct TU_ATTR_ALIGNED(32)
uint32_t : 1; // can be used
volatile uint32_t condition_code : 4;
- /*---------- Word 2 ----------*/
- uint32_t buffer_page0; // 12 lsb bits can be used
- /*---------- Word 3 ----------*/
- volatile uint32_t next;
+ /*---------- Word 2 ----------*/
+ uint32_t buffer_page0; // 12 lsb bits can be used
- /*---------- Word 4 ----------*/
- uint32_t buffer_end;
+ /*---------- Word 3 ----------*/
+ volatile uint32_t next;
- /*---------- Word 5-8 ----------*/
- volatile uint16_t offset_packetstatus[8];
-} ochi_itd_t;
+ /*---------- Word 4 ----------*/
+ uint32_t buffer_end;
-TU_VERIFY_STATIC( sizeof(ochi_itd_t) == 32, "size is not correct" );
+ /*---------- Word 5-8 ----------*/
+ volatile uint16_t offset_packetstatus[8];
+} ohci_itd_t;
+TU_VERIFY_STATIC(sizeof(ohci_itd_t) == ITD_ALIGN_SIZE, "size is not correct" );
typedef struct {
uint16_t expected_bytes; // up to 8192 bytes so max is 13 bits
} gtd_extra_data_t;
+TU_VERIFY_STATIC(sizeof(gtd_extra_data_t) == 2, "size is not correct" );
// structure with member alignment required from large to small
typedef struct TU_ATTR_ALIGNED(256) {
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index 63b50f13d..30ffadc35 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -225,6 +225,32 @@
#define USB_CNTR_LPMODE USB_CNTR_SUSPRDY
#define USB_CNTR_FSUSP USB_CNTR_SUSPEN
+#elif CFG_TUSB_MCU == OPT_MCU_STM32U3
+ #include "stm32u3xx.h"
+ #define FSDEV_PMA_SIZE (2048u)
+ #define FSDEV_BUS_32BIT
+ #define FSDEV_HAS_SBUF_ISO 1 // This is assumed to work but has not been tested...
+ #define USB USB_DRD_FS
+
+ #define USB_EP_CTR_RX USB_EP_VTRX
+ #define USB_EP_CTR_TX USB_EP_VTTX
+ #define USB_EP_T_FIELD USB_CHEP_UTYPE
+ #define USB_EPREG_MASK USB_CHEP_REG_MASK
+ #define USB_EPTX_DTOGMASK USB_CHEP_TX_DTOGMASK
+ #define USB_EPRX_DTOGMASK USB_CHEP_RX_DTOGMASK
+ #define USB_EPTX_DTOG1 USB_CHEP_TX_DTOG1
+ #define USB_EPTX_DTOG2 USB_CHEP_TX_DTOG2
+ #define USB_EPRX_DTOG1 USB_CHEP_RX_DTOG1
+ #define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2
+ #define USB_EPRX_STAT USB_CH_RX_VALID
+ #define USB_EPKIND_MASK USB_EP_KIND_MASK
+ #define USB_CNTR_FRES USB_CNTR_USBRST
+ #define USB_CNTR_RESUME USB_CNTR_L2RES
+ #define USB_ISTR_EP_ID USB_ISTR_IDN
+ #define USB_EPADDR_FIELD USB_CHEP_ADDR
+ #define USB_CNTR_LPMODE USB_CNTR_SUSPRDY
+ #define USB_CNTR_FSUSP USB_CNTR_SUSPEN
+
#else
#error You are using an untested or unimplemented STM32 variant. Please update the driver.
// This includes U0
@@ -338,6 +364,8 @@ static const IRQn_Type fsdev_irq[] = {
USB_IRQn,
#elif CFG_TUSB_MCU == OPT_MCU_STM32U0
USB_DRD_FS_IRQn,
+ #elif CFG_TUSB_MCU == OPT_MCU_STM32U3
+ USB_FS_IRQn,
#else
#error Unknown arch in USB driver
#endif
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index 5fff4b6ed..22a25fe40 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -85,6 +85,12 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t dwc2_ep_count(const dwc2_regs_t* dwc
#endif
}
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline bool edpt_is_enabled(dwc2_dep_t* dep) {
+ return (dep->ctl & EPCTL_EPENA) != 0;
+}
//--------------------------------------------------------------------
// DMA
@@ -117,7 +123,7 @@ static void dma_setup_prepare(uint8_t rhport) {
dwc2_regs_t* dwc2 = DWC2_REG(rhport);
if (dwc2->gsnpsid >= DWC2_CORE_REV_3_00a) {
- if(dwc2->epout[0].doepctl & DOEPCTL_EPENA) {
+ if(edpt_is_enabled(&dwc2->epout[0])) {
return;
}
}
@@ -200,7 +206,7 @@ static bool dfifo_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t packet_size) {
}
} else {
// Check IN endpoints concurrently active limit
- if(dwc2_controller->ep_in_count) {
+ if(0 != dwc2_controller->ep_in_count) {
TU_ASSERT(_dcd_data.allocated_epin_count < dwc2_controller->ep_in_count);
_dcd_data.allocated_epin_count++;
}
@@ -217,10 +223,10 @@ static bool dfifo_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t packet_size) {
// Both TXFD and TXSA are in unit of 32-bit words.
if (epnum == 0) {
- dwc2->dieptxf0 = (fifo_size << DIEPTXF0_TX0FD_Pos) | _dcd_data.dfifo_top;
+ dwc2->dieptxf0 = ((uint32_t) fifo_size << DIEPTXF0_TX0FD_Pos) | _dcd_data.dfifo_top;
} else {
// DIEPTXF starts at FIFO #1.
- dwc2->dieptxf[epnum - 1] = (fifo_size << DIEPTXF_INEPTXFD_Pos) | _dcd_data.dfifo_top;
+ dwc2->dieptxf[epnum - 1] = ((uint32_t) fifo_size << DIEPTXF_INEPTXFD_Pos) | _dcd_data.dfifo_top;
}
}
@@ -238,10 +244,10 @@ static void dfifo_device_init(uint8_t rhport) {
if (is_dma) {
_dcd_data.dfifo_top -= 2 * dwc2_controller->ep_count;
}
- dwc2->gdfifocfg = (_dcd_data.dfifo_top << GDFIFOCFG_EPINFOBASE_SHIFT) | _dcd_data.dfifo_top;
+ dwc2->gdfifocfg = ((uint32_t) _dcd_data.dfifo_top << GDFIFOCFG_EPINFOBASE_SHIFT) | _dcd_data.dfifo_top;
// Allocate FIFO for EP0 IN
- dfifo_alloc(rhport, 0x80, CFG_TUD_ENDPOINT0_SIZE);
+ (void) dfifo_alloc(rhport, 0x80, CFG_TUD_ENDPOINT0_SIZE);
}
@@ -282,16 +288,18 @@ static void edpt_disable(uint8_t rhport, uint8_t ep_addr, bool stall) {
const uint8_t dir = tu_edpt_dir(ep_addr);
dwc2_dep_t* dep = &dwc2->ep[dir == TUSB_DIR_IN ? 0 : 1][epnum];
+ const uint32_t stall_mask = (stall ? EPCTL_STALL : 0);
+
if (dir == TUSB_DIR_IN) {
- if (!(dep->diepctl & DIEPCTL_EPENA)) {
- dep->diepctl |= DIEPCTL_SNAK | (stall ? DIEPCTL_STALL : 0);
+ if (!edpt_is_enabled(dep)) {
+ dep->diepctl |= DIEPCTL_SNAK | stall_mask;
} else {
// Stop transmitting packets and NAK IN xfers.
dep->diepctl |= DIEPCTL_SNAK;
while ((dep->diepint & DIEPINT_INEPNE) == 0) {}
// Disable the endpoint.
- dep->diepctl |= DIEPCTL_EPDIS | (stall ? DIEPCTL_STALL : 0);
+ dep->diepctl |= DIEPCTL_EPDIS | stall_mask;
while ((dep->diepint & DIEPINT_EPDISD_Msk) == 0) {}
dep->diepint = DIEPINT_EPDISD;
@@ -300,9 +308,10 @@ static void edpt_disable(uint8_t rhport, uint8_t ep_addr, bool stall) {
// Flush the FIFO, and wait until we have confirmed it cleared.
dfifo_flush_tx(dwc2, epnum);
} else {
- // Only disable currently enabled non-control endpoint
- if ((epnum == 0) || !(dep->doepctl & DOEPCTL_EPENA)) {
- dep->doepctl |= stall ? DOEPCTL_STALL : 0;
+ if (!edpt_is_enabled(dep) || epnum == 0) {
+ // non-control not-enabled: stall if set
+ // For EP0 Out, keep it enabled to receive SETUP packets
+ dep->doepctl |= stall_mask;
} else {
// Asserting GONAK is required to STALL an OUT endpoint.
// Simpler to use polling here, we don't use the "B"OUTNAKEFF interrupt
@@ -312,7 +321,7 @@ static void edpt_disable(uint8_t rhport, uint8_t ep_addr, bool stall) {
while ((dwc2->gintsts & GINTSTS_BOUTNAKEFF_Msk) == 0) {}
// Ditto here disable the endpoint.
- dep->doepctl |= DOEPCTL_EPDIS | (stall ? DOEPCTL_STALL : 0);
+ dep->doepctl |= DOEPCTL_EPDIS | stall_mask;
while ((dep->doepint & DOEPINT_EPDISD_Msk) == 0) {}
dep->doepint = DOEPINT_EPDISD;
@@ -360,7 +369,7 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin
if (depctl.type == DEPCTL_EPTYPE_ISOCHRONOUS && xfer->interval == 1) {
const dwc2_dsts_t dsts = {.value = dwc2->dsts};
const uint32_t odd_now = dsts.frame_number & 1u;
- if (odd_now) {
+ if (odd_now != 0) {
depctl.set_data0_iso_even = 1;
} else {
depctl.set_data1_iso_odd = 1;
@@ -379,7 +388,7 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin
// Enable tx fifo empty interrupt only if there is data. Note must after depctl enable
if (dir == TUSB_DIR_IN && total_bytes != 0) {
- dwc2->diepempmsk |= (1u << epnum);
+ dwc2->diepempmsk |= (1u << epnum); //-V629
}
}
}
@@ -551,7 +560,7 @@ void dcd_edpt_close_all(uint8_t rhport) {
for (uint8_t n = 1; n < ep_count; n++) {
for (uint8_t d = 0; d < 2; d++) {
dwc2_dep_t* dep = &dwc2->ep[d][n];
- if (dep->ctl & EPCTL_EPENA) {
+ if (edpt_is_enabled(dep)) {
dep->ctl |= EPCTL_SNAK | EPCTL_EPDIS;
}
xfer_status[n][1-d].max_size = 0;
@@ -645,8 +654,12 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t* ff, uint16_t
void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
dwc2_regs_t* dwc2 = DWC2_REG(rhport);
edpt_disable(rhport, ep_addr, true);
- if((tu_edpt_number(ep_addr) == 0) && dma_device_enabled(dwc2)) {
- dma_setup_prepare(rhport);
+
+ // For control endpoint, prepare to receive SETUP packet
+ if (tu_edpt_number(ep_addr) == 0) {
+ if (dma_device_enabled(dwc2)) {
+ dma_setup_prepare(rhport);
+ }
}
}
@@ -683,8 +696,9 @@ static void handle_bus_reset(uint8_t rhport) {
// Disable all IN endpoints
for (uint8_t n = 0; n < ep_count; n++) {
- if (dwc2->epin[n].diepctl & DIEPCTL_EPENA) {
- dwc2->epin[n].diepctl |= DIEPCTL_SNAK | DIEPCTL_EPDIS;
+ dwc2_dep_t* dep = &dwc2->epin[n];
+ if (edpt_is_enabled(dep)) {
+ dep->diepctl |= DIEPCTL_SNAK | DIEPCTL_EPDIS;
}
}
@@ -809,9 +823,9 @@ static void handle_rxflvl_irq(uint8_t rhport) {
const uint16_t byte_count = grxstsp.byte_count;
xfer_ctl_t* xfer = XFER_CTL_BASE(epnum, TUSB_DIR_OUT);
- if (byte_count) {
+ if (byte_count != 0) {
// Read packet off RxFIFO
- if (xfer->ff) {
+ if (xfer->ff != NULL) {
tu_fifo_write_n_const_addr_full_words(xfer->ff, (const void*) (uintptr_t) rx_fifo, byte_count);
} else {
dfifo_read_packet(dwc2, xfer->buffer, byte_count);
@@ -838,7 +852,7 @@ static void handle_rxflvl_irq(uint8_t rhport) {
// the specified OUT endpoint which will be handled by handle_epout_irq()
break;
- default: break;
+ default: break; // nothing to do
}
}
@@ -846,7 +860,7 @@ static void handle_epout_slave(uint8_t rhport, uint8_t epnum, dwc2_doepint_t doe
if (doepint_bm.setup_phase_done) {
// Cleanup previous pending EP0 IN transfer if any
dwc2_dep_t* epin0 = &DWC2_REG(rhport)->epin[0];
- if (epin0->diepctl & DIEPCTL_EPENA) {
+ if (edpt_is_enabled(epin0)) {
edpt_disable(rhport, 0x80, false);
}
dcd_event_setup_received(rhport, _dcd_usbbuf.setup_packet, true);
@@ -860,7 +874,6 @@ static void handle_epout_slave(uint8_t rhport, uint8_t epnum, dwc2_doepint_t doe
// can is set when GRXSTS_PKTSTS_SETUP_RX is popped therefore they can bet set before/together with setup_phase_done
if (!doepint_bm.status_phase_rx && !doepint_bm.setup_packet_rx) {
xfer_ctl_t* xfer = XFER_CTL_BASE(epnum, TUSB_DIR_OUT);
-
if ((epnum == 0) && _dcd_data.ep0_pending[TUSB_DIR_OUT]) {
// EP0 can only handle one packet, Schedule another packet to be received.
edpt_schedule_packets(rhport, epnum, TUSB_DIR_OUT);
@@ -877,7 +890,7 @@ static void handle_epin_slave(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diep
xfer_ctl_t* xfer = XFER_CTL_BASE(epnum, TUSB_DIR_IN);
if (diepint_bm.xfer_complete) {
- if ((epnum == 0) && _dcd_data.ep0_pending[TUSB_DIR_IN]) {
+ if ((epnum == 0) && (0 != _dcd_data.ep0_pending[TUSB_DIR_IN])) {
// EP0 can only handle one packet. Schedule another packet to be transmitted.
edpt_schedule_packets(rhport, epnum, TUSB_DIR_IN);
} else {
@@ -888,7 +901,7 @@ static void handle_epin_slave(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diep
// TX FIFO empty bit is read-only. It will only be cleared by hardware when written bytes is more than
// - 64 bytes or
// - Half/Empty of TX FIFO size (configured by GAHBCFG.TXFELVL)
- if (diepint_bm.txfifo_empty && (dwc2->diepempmsk & (1 << epnum))) {
+ if (diepint_bm.txfifo_empty && tu_bit_test(dwc2->diepempmsk, epnum)) {
dwc2_ep_tsize_t tsiz = {.value = epin->tsiz};
const uint16_t remain_packets = tsiz.packet_count;
@@ -904,7 +917,7 @@ static void handle_epin_slave(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diep
}
// Push packet to Tx-FIFO
- if (xfer->ff) {
+ if (xfer->ff != NULL) {
volatile uint32_t* tx_fifo = dwc2->fifo[epnum];
tu_fifo_read_n_const_addr_full_words(xfer->ff, (void*)(uintptr_t)tx_fifo, xact_bytes);
} else {
@@ -929,7 +942,7 @@ static void handle_epout_dma(uint8_t rhport, uint8_t epnum, dwc2_doepint_t doepi
if (doepint_bm.setup_phase_done) {
// Cleanup previous pending EP0 IN transfer if any
dwc2_dep_t* epin0 = &DWC2_REG(rhport)->epin[0];
- if (epin0->diepctl & DIEPCTL_EPENA) {
+ if (edpt_is_enabled(epin0)) {
edpt_disable(rhport, 0x80, false);
}
dma_setup_prepare(rhport);
@@ -995,7 +1008,7 @@ static void handle_ep_irq(uint8_t rhport, uint8_t dir) {
// DAINT for a given EP clears when DEPINTx is cleared.
// EPINT will be cleared when DAINT bits are cleared.
for (uint8_t epnum = 0; epnum < ep_count; epnum++) {
- if (dwc2->daint & TU_BIT(daint_offset + epnum)) {
+ if (tu_bit_test(dwc2->daint,daint_offset + epnum)) {
dwc2_dep_t* epout = &ep_base[epnum];
union {
uint32_t value;
@@ -1004,7 +1017,7 @@ static void handle_ep_irq(uint8_t rhport, uint8_t dir) {
} intr;
intr.value = epout->intr;
- epout->intr = intr.value; // Clear interrupt
+ epout->intr = intr.value; // Clear interrupt //-V::2584::{otg_int}
if (is_dma) {
#if CFG_TUD_DWC2_DMA_ENABLE
diff --git a/src/portable/synopsys/dwc2/dwc2_common.c b/src/portable/synopsys/dwc2/dwc2_common.c
index 5ff18ab94..980574e12 100644
--- a/src/portable/synopsys/dwc2/dwc2_common.c
+++ b/src/portable/synopsys/dwc2/dwc2_common.c
@@ -29,16 +29,6 @@
#define DWC2_COMMON_DEBUG 2
#if defined(TUP_USBIP_DWC2) && (CFG_TUH_ENABLED || CFG_TUD_ENABLED)
-
-#if CFG_TUD_ENABLED
-#include "device/dcd.h"
-#endif
-
-#if CFG_TUH_ENABLED
-#include "host/hcd.h"
-#include "host/usbh.h"
-#endif
-
#include "dwc2_common.h"
//--------------------------------------------------------------------
diff --git a/src/portable/synopsys/dwc2/dwc2_common.h b/src/portable/synopsys/dwc2/dwc2_common.h
index 0166b0261..dc204f578 100644
--- a/src/portable/synopsys/dwc2/dwc2_common.h
+++ b/src/portable/synopsys/dwc2/dwc2_common.h
@@ -30,6 +30,14 @@
#include "common/tusb_common.h"
#include "dwc2_type.h"
+#if CFG_TUD_ENABLED
+#include "device/dcd.h"
+#endif
+
+#if CFG_TUH_ENABLED
+#include "host/hcd.h"
+#endif
+
// Following symbols must be defined by port header
// - _dwc2_controller[]: array of controllers
// - DWC2_EP_MAX: largest EP counts of all controllers
diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h
index 08950ccc0..9da8de41f 100644
--- a/src/portable/synopsys/dwc2/dwc2_stm32.h
+++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
@@ -176,7 +176,9 @@ TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_
TU_ATTR_ALWAYS_INLINE static inline void dwc2_remote_wakeup_delay(void) {
// try to delay for 1 ms
uint32_t count = SystemCoreClock / 1000;
- while (count--) __NOP();
+ while (count--) {
+ __NOP();
+ }
}
// MCU specific PHY init, called BEFORE core reset
diff --git a/src/portable/synopsys/dwc2/dwc2_type.h b/src/portable/synopsys/dwc2/dwc2_type.h
index 75643529f..adcc579e3 100644
--- a/src/portable/synopsys/dwc2/dwc2_type.h
+++ b/src/portable/synopsys/dwc2/dwc2_type.h
@@ -1435,7 +1435,7 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo ) == 0x1000, "incorrect size");
#define DAINTMSK_OEPM_Msk (0xFFFFUL << DAINTMSK_OEPM_Pos) // 0xFFFF0000
#define DAINTMSK_OEPM DAINTMSK_OEPM_Msk // OUT EP interrupt mask bits
-#define DAINT_SHIFT(_dir) ((_dir == TUSB_DIR_IN) ? 0 : 16)
+#define DAINT_SHIFT(_dir) (((_dir) == TUSB_DIR_IN) ? 0 : 16)
#if 0
/******************** Bit definition for OTG register ********************/
diff --git a/src/tusb.c b/src/tusb.c
index 08bd020e3..7313a2c20 100644
--- a/src/tusb.c
+++ b/src/tusb.c
@@ -117,11 +117,15 @@ bool tusb_inited(void) {
bool ret = false;
#if CFG_TUD_ENABLED
- ret = ret || tud_inited();
+ if (tud_inited()) {
+ ret = true;
+ }
#endif
#if CFG_TUH_ENABLED
- ret = ret || tuh_inited();
+ if (tuh_inited()) {
+ ret = true;
+ }
#endif
return ret;
@@ -209,7 +213,8 @@ bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex) {
(void) mutex;
// pre-check to help reducing mutex lock
- TU_VERIFY((ep_state->busy == 0) && (ep_state->claimed == 0));
+ TU_VERIFY(ep_state->busy == 0);
+ TU_VERIFY(ep_state->claimed == 0);
(void) osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER);
// can only claim the endpoint if it is not busy and not claimed yet.
@@ -298,7 +303,7 @@ uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf,
uint8_t const* p_desc = (uint8_t const*) desc_itf;
uint16_t len = 0;
- while (itf_count--) {
+ while ((itf_count--) > 0) {
// Next on interface desc
len += tu_desc_len(desc_itf);
p_desc = tu_desc_next(p_desc);
@@ -337,7 +342,7 @@ bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool ove
tu_fifo_config(&s->ff, ff_buf, ff_bufsize, 1, overwritable);
#if OSAL_MUTEX_REQUIRED
- if (ff_buf && ff_bufsize) {
+ if (ff_buf != NULL && ff_bufsize > 0) {
osal_mutex_t new_mutex = osal_mutex_create(&s->ff_mutexdef);
tu_fifo_config_mutex(&s->ff, is_tx ? new_mutex : NULL, is_tx ? NULL : new_mutex);
}
@@ -352,9 +357,13 @@ bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool ove
bool tu_edpt_stream_deinit(tu_edpt_stream_t* s) {
(void) s;
#if OSAL_MUTEX_REQUIRED
- if (s->ff.mutex_wr) osal_mutex_delete(s->ff.mutex_wr);
- if (s->ff.mutex_rd) osal_mutex_delete(s->ff.mutex_rd);
- #endif
+ if (s->ff.mutex_wr) {
+ osal_mutex_delete(s->ff.mutex_wr);
+ }
+ if (s->ff.mutex_rd) {
+ osal_mutex_delete(s->ff.mutex_rd);
+ }
+#endif
return true;
}
@@ -403,7 +412,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool stream_release(uint8_t hwid, tu_edpt_st
bool tu_edpt_stream_write_zlp_if_needed(uint8_t hwid, tu_edpt_stream_t* s, uint32_t last_xferred_bytes) {
// ZLP condition: no pending data, last transferred bytes is multiple of packet size
const uint16_t mps = s->is_mps512 ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS;
- TU_VERIFY(!tu_fifo_count(&s->ff) && last_xferred_bytes && (0 == (last_xferred_bytes & (mps - 1))));
+ TU_VERIFY(!tu_fifo_count(&s->ff) && last_xferred_bytes > 0 && (0 == (last_xferred_bytes & (mps - 1))));
TU_VERIFY(stream_claim(hwid, s));
TU_ASSERT(stream_xfer(hwid, s, 0));
return true;
@@ -411,14 +420,13 @@ bool tu_edpt_stream_write_zlp_if_needed(uint8_t hwid, tu_edpt_stream_t* s, uint3
uint32_t tu_edpt_stream_write_xfer(uint8_t hwid, tu_edpt_stream_t* s) {
// skip if no data
- TU_VERIFY(tu_fifo_count(&s->ff), 0);
-
+ TU_VERIFY(tu_fifo_count(&s->ff) > 0, 0);
TU_VERIFY(stream_claim(hwid, s), 0);
// Pull data from FIFO -> EP buf
uint16_t const count = tu_fifo_read_n(&s->ff, s->ep_buf, s->ep_bufsize);
- if (count) {
+ if (count > 0) {
TU_ASSERT(stream_xfer(hwid, s, count), 0);
return count;
} else {
@@ -430,7 +438,7 @@ uint32_t tu_edpt_stream_write_xfer(uint8_t hwid, tu_edpt_stream_t* s) {
}
uint32_t tu_edpt_stream_write(uint8_t hwid, tu_edpt_stream_t* s, void const* buffer, uint32_t bufsize) {
- TU_VERIFY(bufsize); // TODO support ZLP
+ TU_VERIFY(bufsize > 0); // TODO support ZLP
if (0 == tu_fifo_depth(&s->ff)) {
// no fifo for buffered
@@ -453,7 +461,7 @@ uint32_t tu_edpt_stream_write(uint8_t hwid, tu_edpt_stream_t* s, void const* buf
}
uint32_t tu_edpt_stream_write_available(uint8_t hwid, tu_edpt_stream_t* s) {
- if (tu_fifo_depth(&s->ff)) {
+ if (tu_fifo_depth(&s->ff) > 0) {
return (uint32_t) tu_fifo_remaining(&s->ff);
} else {
bool is_busy = true;
@@ -596,10 +604,12 @@ void tu_print_mem(void const* buf, uint32_t count, uint8_t indent) {
// fill up last row to 16 for printing ascii
const uint32_t remain = count % 16;
uint8_t nback = (uint8_t) (remain ? remain : 16);
- if (remain) {
+ if (remain > 0) {
for (uint32_t i = 0; i < 16 - remain; i++) {
tu_printf(" ");
- for (int j = 0; j < 2 * size; j++) tu_printf(" ");
+ for (int j = 0; j < 2 * size; j++) {
+ tu_printf(" ");
+ }
}
}
diff --git a/src/tusb_option.h b/src/tusb_option.h
index e00311039..b90df2724 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -98,6 +98,7 @@
#define OPT_MCU_STM32C0 318 ///< ST C0
#define OPT_MCU_STM32N6 319 ///< ST N6
#define OPT_MCU_STM32WBA 320 ///< ST WBA
+#define OPT_MCU_STM32U3 321 ///< ST U3
// Sony
#define OPT_MCU_CXD56 400 ///< SONY CXD56
@@ -217,9 +218,9 @@
#define OPT_MCU_AT32F413 2506 ///< ArteryTek AT32F413
// Check if configured MCU is one of listed
-// Apply _TU_CHECK_MCU with || as separator to list of input
-#define _TU_CHECK_MCU(_m) (CFG_TUSB_MCU == _m)
-#define TU_CHECK_MCU(...) (TU_ARGS_APPLY(_TU_CHECK_MCU, ||, __VA_ARGS__))
+// Apply TU_MCU_IS_EQUAL with || as separator to list of input
+#define TU_MCU_IS_EQUAL(_m) (CFG_TUSB_MCU == (_m))
+#define TU_CHECK_MCU(...) (TU_ARGS_APPLY(TU_MCU_IS_EQUAL, ||, __VA_ARGS__))
//--------------------------------------------------------------------+
// Supported OS