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authorWilliam D. Jones <[email protected]>2019-10-02 01:18:56 -0400
committerWilliam D. Jones <[email protected]>2019-10-02 01:19:12 -0400
commit3edb5548e98e76cda7479d2d039b0557eda26a1b (patch)
tree2f83f2bf5a9aee9e60f2c4a4ece3579cd5a39f7a /src
parent19ee5199265d064e23c376c4ab0fdf92b08a5378 (diff)
dcd_msp430x5xx: Ensure DBUF bit is cleared on endpoint open, as it
could get spuriously set in debugging sessions. cdc_msc functional.
Diffstat (limited to 'src')
-rw-r--r--src/portable/ti/msp430x5xx/dcd_msp430x5xx.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c
index 2f67e5d37..ac7e27ee7 100644
--- a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c
+++ b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c
@@ -257,12 +257,16 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
// while debugging, despite stall code never being called. It appears
// these registers don't get cleared on reset, being part of RAM.
// Investigate and see if I can duplicate.
+ // Also, DBUF got set on OUT EP 2 while debugging. Only OUT EPs seem to be
+ // affected at this time. USB RAM directly precedes main RAM; perhaps I'm
+ // overwriting registers via buffer overflow w/ my debugging code?
ep_regs[SIZXY] = desc_edpt->wMaxPacketSize.size;
ep_regs[BCTX] |= NAK;
ep_regs[BBAX] = buf_base;
- ep_regs[CNF] &= ~(TOGGLE | STALL); // ISO xfers not supported on MSP430,
- // so no need to gate DATA0/1 and frame
- // behavior. Clear stall bit- see above comment.
+ ep_regs[CNF] &= ~(TOGGLE | STALL | DBUF); // ISO xfers not supported on
+ // MSP430, so no need to gate DATA0/1 and frame
+ // behavior. Clear stall and double buffer bit as
+ // well- see above comment.
ep_regs[CNF] |= (UBME | USBIIE);
USBKEYPID = USBKEY;