summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorcopilot-swe-agent[bot] <[email protected]>2026-04-09 10:44:08 +0000
committerGitHub <[email protected]>2026-04-09 10:44:08 +0000
commit41575d2de943393f6cc7e5228ab904614fadce28 (patch)
tree956a9bc58d7fdbfdb7b13a51a76bdbd71a62086d /src
parentab32a2cd2b7472966b309521d80b15488393af0e (diff)
Polish FSDEV delay code readability
Agent-Logs-Url: https://github.com/hathach/tinyusb/sessions/3ec0d5b6-cb8e-48ff-8606-3371beb1efcb Co-authored-by: HiFiPhile <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/portable/st/stm32_fsdev/fsdev_stm32.h2
-rw-r--r--src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c3
2 files changed, 3 insertions, 2 deletions
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index 5950efbe3..5e383eb97 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -139,6 +139,7 @@
#endif
#ifndef FSDEV_STM32_CPU_MHZ
+ // Max CPU frequency in MHz, used to derive conservative FSDEV PMA delay defaults.
#if CFG_TUSB_MCU == OPT_MCU_STM32H5
#define FSDEV_STM32_CPU_MHZ 250U
#elif CFG_TUSB_MCU == OPT_MCU_STM32U5
@@ -146,7 +147,6 @@
#elif CFG_TUSB_MCU == OPT_MCU_STM32U3
#define FSDEV_STM32_CPU_MHZ 96U
#elif CFG_TUSB_MCU == OPT_MCU_STM32U0
- // Used by STM32 FSDEV PMA delay defaults as a conservative max CPU frequency.
#define FSDEV_STM32_CPU_MHZ 56U
#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
#define FSDEV_STM32_CPU_MHZ 64U
diff --git a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
index 50ff975fc..18cf302d8 100644
--- a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
@@ -152,7 +152,8 @@ static inline void channel_write_status(uint8_t ch_id, uint32_t ch_reg, tusb_dir
static inline uint16_t channel_get_rx_count(uint8_t ch_id) {
uint32_t ch_reg = ch_read(ch_id);
- fsdev_btable_workaround_delay((FSDEV_REG->ISTR & U_ISTR_LS_DCONN) || (ch_reg & U_EP_LSEP));
+ const bool is_low_speed = (FSDEV_REG->ISTR & U_ISTR_LS_DCONN) || (ch_reg & U_EP_LSEP);
+ fsdev_btable_workaround_delay(is_low_speed);
return btable_get_count(ch_id, BTABLE_BUF_RX);
}