diff options
| author | hathach <[email protected]> | 2025-06-12 21:20:49 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2025-06-12 21:20:49 +0700 |
| commit | 7d66a3e7758665138f495b5d9174c1874332ce1a (patch) | |
| tree | 4a42611449e2adcf33c0947b6c8074a83cfb3edc /src | |
| parent | 2e231a7517180a486211681127891d41cdbd48ee (diff) | |
merge n6 and h7rs (same config)
Diffstat (limited to 'src')
| -rw-r--r-- | src/common/tusb_mcu.h | 11 | ||||
| -rw-r--r-- | src/portable/synopsys/dwc2/dwc2_stm32.h | 4 |
2 files changed, 3 insertions, 12 deletions
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 027446a85..2ee2132bf 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -312,7 +312,7 @@ #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 -#elif TU_CHECK_MCU(OPT_MCU_STM32H7RS) +#elif TU_CHECK_MCU(OPT_MCU_STM32H7RS, OPT_MCU_STM32N6) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 @@ -322,15 +322,6 @@ // MCU with on-chip HS Phy #define TUP_RHPORT_HIGHSPEED 1 -#elif TU_CHECK_MCU(OPT_MCU_STM32N6) - #define TUP_USBIP_DWC2 - #define TUP_USBIP_DWC2_STM32 - - #define TUP_DCD_ENDPOINT_MAX 9 - - // MCU with on-chip HS Phy - #define TUP_RHPORT_HIGHSPEED 2 - //--------------------------------------------------------------------+ // Sony //--------------------------------------------------------------------+ diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index 0c1f835a9..dc4251c29 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -79,8 +79,8 @@ extern "C" { #elif CFG_TUSB_MCU == OPT_MCU_STM32N6 #include "stm32n6xx.h" - #define EP_MAX_FS 6 - #define EP_FIFO_SIZE_FS 1280 + #define EP_MAX_FS 9 + #define EP_FIFO_SIZE_FS 4096 #define EP_MAX_HS 9 #define EP_FIFO_SIZE_HS 4096 |