Merge pull request #181 from pigrew/ST_FSDEV_EP0

ST FSDEV EP0 left in stall

1 files changed, 15 insertions, 14 deletions

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 9debef2ae..c33f9b865 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -252,7 +252,9 @@ void dcd_init (uint8_t rhport)
 void dcd_int_enable (uint8_t rhport)
 {
   (void)rhport;
-
+  // Member here forces write to RAM before allowing ISR to execute
+  __DSB();
+  __ISB();
 #if CFG_TUSB_MCU == OPT_MCU_STM32F0 || CFG_TUSB_MCU == OPT_MCU_STM32L0
   NVIC_EnableIRQ(USB_IRQn);
 #elif CFG_TUSB_MCU == OPT_MCU_STM32F3
@@ -276,10 +278,7 @@ void dcd_int_disable(uint8_t rhport)
 #else
   #error Unknown arch in USB driver
 #endif
-  // I'm not convinced that memory synchronization is completely necessary, but
-  // it isn't a bad idea.
-  __DSB();
-  __ISB();
+  // CMSIS has a membar after disabling interrupts
 }
 
 // Receive Set Address request, mcu port must also include status IN response
@@ -419,10 +418,15 @@ static uint16_t dcd_ep_ctr_handler(void)
           uint8_t userMemBuf[8];
           /* Get SETUP Packet*/
           count = pcd_get_ep_rx_cnt(USB, EPindex);
-          //TU_ASSERT_ERR(count == 8);
-          dcd_read_packet_memory(userMemBuf, *pcd_ep_rx_address_ptr(USB,EPindex), 8);
+          if(count == 8) // Setup packet should always be 8 bytes. If not, ignore it, and try again.
+          {
+            // Must reset EP to NAK (in case it had been stalling) (though, maybe too late here)
+            pcd_set_ep_rx_status(USB,0u,USB_EP_RX_NAK);
+            pcd_set_ep_tx_status(USB,0u,USB_EP_TX_NAK);
+            dcd_read_packet_memory(userMemBuf, *pcd_ep_rx_address_ptr(USB,EPindex), 8);
+            dcd_event_setup_received(0, (uint8_t*)userMemBuf, true);
+          }
           /* SETUP bit kept frozen while CTR_RX = 1*/
-          dcd_event_setup_received(0, (uint8_t*)userMemBuf, true);
           pcd_clear_rx_ep_ctr(USB, EPindex);
         }
         else if ((wEPVal & USB_EP_CTR_RX) != 0U) // OUT
@@ -440,10 +444,6 @@ static uint16_t dcd_ep_ctr_handler(void)
           }
 
           /* Process Control Data OUT status Packet*/
-          if(EPindex == 0u && xfer->total_len == 0u)
-          {
-             pcd_clear_ep_kind(USB,0); // Good, so allow non-zero length packets now.
-          }
           dcd_event_xfer_complete(0, EPindex, xfer->total_len, XFER_RESULT_SUCCESS, true);
 
           pcd_set_ep_rx_cnt(USB, EPindex, CFG_TUD_ENDPOINT0_SIZE);
@@ -627,7 +627,9 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
   }
 
   pcd_set_ep_address(USB, epnum, epnum);
-  pcd_clear_ep_kind(USB,0); // Be normal, for now, instead of only accepting zero-byte packets
+  // Be normal, for now, instead of only accepting zero-byte packets (on control endpoint)
+  // or being double-buffered (bulk endpoints)
+  pcd_clear_ep_kind(USB,0);
 
   if(dir == TUSB_DIR_IN)
   {
@@ -688,7 +690,6 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
     if (epnum == 0 && buffer == NULL)
     {
         xfer->buffer = (uint8_t*)_setup_packet;
-        pcd_set_ep_kind(USB,0); // Expect a zero-byte INPUT
     }
     if(total_bytes > xfer->max_packet_size)
     {