diff options
| author | hathach <[email protected]> | 2013-03-27 11:51:44 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2013-03-27 11:51:44 +0700 |
| commit | 7b5d9edc5af88422b26116a56032091e96714495 (patch) | |
| tree | 3062a01b7636ea43beb05a15ae9c736dd11edb04 /tests | |
| parent | b0ff7a7e235b1901def71305e6c35e6c3cda222c (diff) | |
add test for pipe_interrupt_xfer
implement keyboard app code
- forcefully place keyboard_report in RAM section 3
change used bit in qtd from reserved in buffer[1] to alternate link
add code for fake ehci controller runs on period interrupt
change signature of tusbh_hid_keyboard_get_report
- tusb_keyboard_report_t* to uint8_t*
implement period (interrupt) complete isr processing
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/test/host/ehci/test_ehci_structure.c | 2 | ||||
| -rw-r--r-- | tests/test/host/ehci/test_pipe_bulk_xfer.c | 1 | ||||
| -rw-r--r-- | tests/test/host/ehci/test_pipe_interrupt_xfer.c | 208 | ||||
| -rw-r--r-- | tests/test/support/ehci_controller.c | 30 |
4 files changed, 232 insertions, 9 deletions
diff --git a/tests/test/host/ehci/test_ehci_structure.c b/tests/test/host/ehci/test_ehci_structure.c index b024094dc..2a83cedfb 100644 --- a/tests/test/host/ehci/test_ehci_structure.c +++ b/tests/test/host/ehci/test_ehci_structure.c @@ -113,6 +113,7 @@ void test_qtd_structure(void) { TEST_ASSERT_EQUAL( 0, offsetof(ehci_qtd_t, next)); TEST_ASSERT_EQUAL( 4, offsetof(ehci_qtd_t, alternate)); + TEST_ASSERT_EQUAL( 5, BITFIELD_OFFSET_OF_UINT32(ehci_qtd_t, 1, used)); //------------- Word 2 -------------// TEST_ASSERT_EQUAL( 0, BITFIELD_OFFSET_OF_UINT32(ehci_qtd_t, 2, pingstate_err) ); @@ -131,7 +132,6 @@ void test_qtd_structure(void) TEST_ASSERT_EQUAL( 31, BITFIELD_OFFSET_OF_UINT32(ehci_qtd_t, 2, data_toggle) ); TEST_ASSERT_EQUAL( 12, offsetof(ehci_qtd_t, buffer)); - TEST_ASSERT_EQUAL( 16, offsetof(ehci_qtd_t, used)); } void test_qhd_structure(void) diff --git a/tests/test/host/ehci/test_pipe_bulk_xfer.c b/tests/test/host/ehci/test_pipe_bulk_xfer.c index ad34530a5..a4a23cda7 100644 --- a/tests/test/host/ehci/test_pipe_bulk_xfer.c +++ b/tests/test/host/ehci/test_pipe_bulk_xfer.c @@ -49,7 +49,6 @@ usbh_device_info_t usbh_devices[TUSB_CFG_HOST_DEVICE_MAX+1]; -uint8_t const control_max_packet_size = 64; uint8_t const hub_addr = 2; uint8_t const hub_port = 2; uint8_t dev_addr; diff --git a/tests/test/host/ehci/test_pipe_interrupt_xfer.c b/tests/test/host/ehci/test_pipe_interrupt_xfer.c new file mode 100644 index 000000000..81a0f990f --- /dev/null +++ b/tests/test/host/ehci/test_pipe_interrupt_xfer.c @@ -0,0 +1,208 @@ +/* + * test_ehci_pipe_bulk_xfer.c + * + * Created on: Feb 27, 2013 + * Author: hathach + */ + +/* + * Software License Agreement (BSD License) + * Copyright (c) 2012, hathach (tinyusb.org) + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the tiny usb stack. + */ + +#include "unity.h" +#include "tusb_option.h" +#include "errors.h" +#include "binary.h" + +#include "hal.h" +#include "mock_osal.h" +#include "hcd.h" +#include "mock_usbh_hcd.h" +#include "ehci.h" +#include "ehci_controller.h" + +usbh_device_info_t usbh_devices[TUSB_CFG_HOST_DEVICE_MAX+1]; + +uint8_t const hub_addr = 2; +uint8_t const hub_port = 2; +uint8_t dev_addr; +uint8_t hostid; +uint8_t xfer_data [100]; +uint8_t data2[100]; + +ehci_qhd_t *period_head; +ehci_qhd_t *p_qhd_interrupt; +pipe_handle_t pipe_hdl_interrupt; + +tusb_descriptor_endpoint_t const desc_ept_interrupt_in = +{ + .bLength = sizeof(tusb_descriptor_endpoint_t), + .bDescriptorType = TUSB_DESC_ENDPOINT, + .bEndpointAddress = 0x81, + .bmAttributes = { .xfer = TUSB_XFER_INTERRUPT }, + .wMaxPacketSize = 8, + .bInterval = 0 +}; + +tusb_descriptor_endpoint_t const desc_ept_interupt_out = +{ + .bLength = sizeof(tusb_descriptor_endpoint_t), + .bDescriptorType = TUSB_DESC_ENDPOINT, + .bEndpointAddress = 0x01, + .bmAttributes = { .xfer = TUSB_XFER_INTERRUPT }, + .wMaxPacketSize = 64, + .bInterval = 0 +}; + +//--------------------------------------------------------------------+ +// Setup/Teardown + helper declare +//--------------------------------------------------------------------+ +void setUp(void) +{ + memclr_(&lpc_usb0, sizeof(LPC_USB0_Type)); + memclr_(&lpc_usb1, sizeof(LPC_USB1_Type)); + + memclr_(usbh_devices, sizeof(usbh_device_info_t)*(TUSB_CFG_HOST_DEVICE_MAX+1)); + memclr_(xfer_data, sizeof(xfer_data)); + + hcd_init(); + + dev_addr = 1; + + hostid = RANDOM(CONTROLLER_HOST_NUMBER) + TEST_CONTROLLER_HOST_START_INDEX; + for (uint8_t i=0; i<TUSB_CFG_HOST_DEVICE_MAX+1; i++) + { + usbh_devices[i].core_id = hostid; + usbh_devices[i].hub_addr = hub_addr; + usbh_devices[i].hub_port = hub_port; + usbh_devices[i].speed = TUSB_SPEED_HIGH; + } + + period_head = get_period_head( hostid ); + pipe_hdl_interrupt = hcd_pipe_open(dev_addr, &desc_ept_interrupt_in, TUSB_CLASS_HID); + + TEST_ASSERT_EQUAL(dev_addr, pipe_hdl_interrupt.dev_addr); + TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl_interrupt.xfer_type); + + p_qhd_interrupt = &ehci_data.device[ dev_addr -1].qhd[ pipe_hdl_interrupt.index ]; +} + +void tearDown(void) +{ +} +//--------------------------------------------------------------------+ +// BULK TRANSFER +//--------------------------------------------------------------------+ +void verify_qtd(ehci_qtd_t *p_qtd, uint8_t p_data[], uint16_t length) +{ + TEST_ASSERT_TRUE(p_qtd->alternate.terminate); // not used, always invalid + + //------------- status -------------// + TEST_ASSERT_FALSE(p_qtd->pingstate_err); + TEST_ASSERT_FALSE(p_qtd->non_hs_split_state); + TEST_ASSERT_FALSE(p_qtd->non_hs_period_missed_uframe); + TEST_ASSERT_FALSE(p_qtd->xact_err); + TEST_ASSERT_FALSE(p_qtd->babble_err); + TEST_ASSERT_FALSE(p_qtd->buffer_err); + TEST_ASSERT_FALSE(p_qtd->halted); + TEST_ASSERT_TRUE(p_qtd->active); + + TEST_ASSERT_FALSE(p_qtd->data_toggle); + TEST_ASSERT_EQUAL(3, p_qtd->cerr); + TEST_ASSERT_EQUAL(0, p_qtd->current_page); + TEST_ASSERT_EQUAL(length, p_qtd->total_bytes); + TEST_ASSERT_TRUE(p_qtd->used); + + TEST_ASSERT_EQUAL_HEX( p_data, p_qtd->buffer[0] ); + for(uint8_t i=1; i<5; i++) + { + TEST_ASSERT_EQUAL_HEX( align4k((uint32_t) (p_data+4096*i)), align4k(p_qtd->buffer[i]) ); + } +} + +void test_interrupt_xfer(void) +{ + //------------- Code Under Test -------------// + hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), true); + + ehci_qtd_t* p_qtd = p_qhd_interrupt->p_qtd_list_head; + TEST_ASSERT_NOT_NULL(p_qtd); + + verify_qtd( p_qtd, xfer_data, sizeof(xfer_data)); + TEST_ASSERT_EQUAL_HEX(p_qhd_interrupt->qtd_overlay.next.address, p_qtd); + TEST_ASSERT_TRUE(p_qtd->next.terminate); + TEST_ASSERT_EQUAL(EHCI_PID_IN, p_qtd->pid); + TEST_ASSERT_TRUE(p_qtd->int_on_complete); +} + +void test_interrupt_xfer_double(void) +{ + //------------- Code Under Test -------------// + hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), false); + hcd_pipe_xfer(pipe_hdl_interrupt, data2, sizeof(data2), true); + + ehci_qtd_t* p_head = p_qhd_interrupt->p_qtd_list_head; + ehci_qtd_t* p_tail = p_qhd_interrupt->p_qtd_list_tail; + + //------------- list head -------------// + TEST_ASSERT_NOT_NULL(p_head); + verify_qtd(p_head, xfer_data, sizeof(xfer_data)); + TEST_ASSERT_EQUAL_HEX(p_qhd_interrupt->qtd_overlay.next.address, p_head); + TEST_ASSERT_EQUAL(EHCI_PID_IN, p_head->pid); + TEST_ASSERT_FALSE(p_head->next.terminate); + TEST_ASSERT_FALSE(p_head->int_on_complete); + + //------------- list tail -------------// + TEST_ASSERT_NOT_NULL(p_tail); + verify_qtd(p_tail, data2, sizeof(data2)); + TEST_ASSERT_EQUAL_HEX( align32(p_head->next.address), p_tail); + TEST_ASSERT_EQUAL(EHCI_PID_IN, p_tail->pid); + TEST_ASSERT_TRUE(p_tail->next.terminate); + TEST_ASSERT_TRUE(p_tail->int_on_complete); +} + +void test_interrupt_xfer_complete_isr(void) +{ + hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), false); + hcd_pipe_xfer(pipe_hdl_interrupt, data2, sizeof(data2), true); + + ehci_qtd_t* p_head = p_qhd_interrupt->p_qtd_list_head; + ehci_qtd_t* p_tail = p_qhd_interrupt->p_qtd_list_tail; + + usbh_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, BUS_EVENT_XFER_COMPLETE); + + //------------- Code Under Test -------------// + ehci_controller_run(hostid); + + TEST_ASSERT_TRUE(p_qhd_interrupt->qtd_overlay.next.terminate); + TEST_ASSERT_FALSE(p_head->used); + TEST_ASSERT_FALSE(p_tail->used); + TEST_ASSERT_NULL(p_qhd_interrupt->p_qtd_list_head); + TEST_ASSERT_NULL(p_qhd_interrupt->p_qtd_list_tail); +} diff --git a/tests/test/support/ehci_controller.c b/tests/test/support/ehci_controller.c index 80e3c3c44..31605cec0 100644 --- a/tests/test/support/ehci_controller.c +++ b/tests/test/support/ehci_controller.c @@ -55,12 +55,10 @@ LPC_USB1_Type lpc_usb1; //--------------------------------------------------------------------+ // IMPLEMENTATION //--------------------------------------------------------------------+ -void ehci_controller_run(uint8_t hostid) +bool complete_all_qtd_in_list(ehci_qhd_t *head) { - //------------- Async List -------------// - ehci_registers_t* const regs = get_operational_register(hostid); + ehci_qhd_t *p_qhd = head; - ehci_qhd_t *p_qhd = (ehci_qhd_t*) regs->async_list_base; do { if ( !p_qhd->qtd_overlay.halted ) @@ -72,11 +70,29 @@ void ehci_controller_run(uint8_t hostid) p_qhd->qtd_overlay = *p_qtd; } } - p_qhd = (ehci_qhd_t*) align32(p_qhd->next.address); - }while(p_qhd != get_async_head(hostid)); // stop if loop around + if (!p_qhd->next.terminate) + { + p_qhd = (ehci_qhd_t*) align32(p_qhd->next.address); + } + else + { + break; + } + }while(p_qhd != head); // stop if loop around + + return true; +} + +void ehci_controller_run(uint8_t hostid) +{ + //------------- Async List -------------// + ehci_registers_t* const regs = get_operational_register(hostid); + complete_all_qtd_in_list((ehci_qhd_t*) regs->async_list_base); + //------------- Period List -------------// + complete_all_qtd_in_list( get_period_head(hostid) ); + regs->usb_sts = EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_NXP_PERIODIC; - regs->usb_sts = EHCI_INT_MASK_NXP_ASYNC; hcd_isr(hostid); } |
