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authorhathach <[email protected]>2013-11-01 12:11:26 +0700
committerhathach <[email protected]>2013-11-01 12:11:26 +0700
commit3a54ad4c0d4e31bf9a13cebb771ccc9e9f4f6449 (patch)
treea47a948c51dd729c57593ab572c157665f4e3fd3 /tinyusb/host/ehci
parentc760c69d51e44c98f9a15feb3f93bee599026332 (diff)
implement msc device class
usbd auto stall control for not supported return from class control request usbd implement xfer isr callback mechanism DCD - implement dcd multiple qtd support - dcd dcd_pipe_stall - implement dcd_pipe_queue_xfer - xfer_complete_isr - flush control endpoint if received new setup while previous transfer is not complete change msc_cmd_block_wrapper_t flags field to dir force full speed for easy testing NOTEs: somehow unable to get endpoint IN interrupt with ioc
Diffstat (limited to 'tinyusb/host/ehci')
-rw-r--r--tinyusb/host/ehci/ehci.c2
-rw-r--r--tinyusb/host/ehci/ehci.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/tinyusb/host/ehci/ehci.c b/tinyusb/host/ehci/ehci.c
index 30c6665ec..643bf3443 100644
--- a/tinyusb/host/ehci/ehci.c
+++ b/tinyusb/host/ehci/ehci.c
@@ -438,7 +438,7 @@ tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t t
{ // the just added qtd is pointed by list_tail
p_qhd->p_qtd_list_tail->int_on_complete = 1;
}
- p_qhd->qtd_overlay.next.address = (uint32_t) p_qhd->p_qtd_list_head; // attach to queue head to start transferring
+ p_qhd->qtd_overlay.next.address = (uint32_t) p_qhd->p_qtd_list_head; // attach head QTD to QHD start transferring
return TUSB_ERROR_NONE;
}
diff --git a/tinyusb/host/ehci/ehci.h b/tinyusb/host/ehci/ehci.h
index 1c507279f..015de9186 100644
--- a/tinyusb/host/ehci/ehci.h
+++ b/tinyusb/host/ehci/ehci.h
@@ -291,7 +291,7 @@ typedef struct {
/// SITD is 32-byte aligned but occupies only 28 --> 6 bytes for storing extra data
uint8_t used;
- uint8_t IhdIdx;
+ uint8_t ihd_idx;
uint8_t reserved2[2];
}ATTR_ALIGNED(32) ehci_sitd_t;