1 files changed, 2 insertions, 2 deletions
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index 0f0eb4ed3..d2f61a5ce 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -120,10 +120,10 @@ static inline void SystemClock_Config(void) {
   // From H743 eval manual ETM can only work at 50 MHz clock by default because ETM signals
   // are shared with other peripherals. Trace CLK = PLL1R.
   RCC_OscInitStruct.PLL.PLLM = 5;
-  RCC_OscInitStruct.PLL.PLLN      = 160; // May reduce to 200 Mhz when tracing to avoid overflowing trace buffer
+  RCC_OscInitStruct.PLL.PLLN      = 160; // May reduce to 100/200 Mhz when tracing to avoid overflowing trace buffer
   RCC_OscInitStruct.PLL.PLLP      = 2;
   RCC_OscInitStruct.PLL.PLLQ      = 4;
-  RCC_OscInitStruct.PLL.PLLR      = 16;  // Trace clock is limit to 50 Mhz to meet board requirement
+  RCC_OscInitStruct.PLL.PLLR      = RCC_OscInitStruct.PLL.PLLN/10;  // Trace clock is limit to 50 Mhz to meet board requirement
   RCC_OscInitStruct.PLL.PLLRGE    = RCC_PLL1VCIRANGE_2;
   RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM;
   RCC_OscInitStruct.PLL.PLLFRACN = 0;