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-rw-r--r--src/host/ehci/ehci.c42
-rw-r--r--src/host/ehci/ehci.h10
-rw-r--r--src/host/hcd.h19
-rw-r--r--src/host/hub.c2
-rw-r--r--src/host/ohci/ohci.c17
-rw-r--r--src/host/ohci/ohci.h2
-rw-r--r--src/host/usbh.c107
-rw-r--r--src/host/usbh.h9
8 files changed, 159 insertions, 49 deletions
diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c
index 9ddffaf2c..295da4566 100644
--- a/src/host/ehci/ehci.c
+++ b/src/host/ehci/ehci.c
@@ -108,16 +108,39 @@ bool hcd_init(void)
return ehci_init(TUH_OPT_RHPORT);
}
+uint32_t hcd_uframe_number(uint8_t rhport)
+{
+ (void) rhport;
+ return ehci_data.uframe_number + ehci_data.regs->frame_index;
+}
+
void hcd_port_reset(uint8_t rhport)
{
(void) rhport;
ehci_registers_t* regs = ehci_data.regs;
- regs->portsc_bm.port_enabled = 0; // disable port before reset
- regs->portsc_bm.port_reset = 1;
+// regs->portsc_bm.port_enabled = 0; // disable port before reset
+// regs->portsc_bm.port_reset = 1;
+
+ uint32_t portsc = regs->portsc;
+
+ portsc &= ~(EHCI_PORTSC_MASK_PORT_EANBLED);
+ portsc |= EHCI_PORTSC_MASK_PORT_RESET;
+
+ regs->portsc = portsc;
}
+#if 0
+void hcd_port_reset_end(uint8_t rhport)
+{
+ (void) rhport;
+
+ ehci_registers_t* regs = ehci_data.regs;
+ regs->portsc_bm.port_reset = 0;
+}
+#endif
+
bool hcd_port_connect_status(uint8_t rhport)
{
(void) rhport;
@@ -192,7 +215,7 @@ static bool ehci_init(uint8_t rhport)
regs->status = EHCI_INT_MASK_ALL; // 2. clear all status
regs->inten = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | EHCI_INT_MASK_ASYNC_ADVANCE |
- EHCI_INT_MASK_NXP_PERIODIC | EHCI_INT_MASK_NXP_ASYNC ;
+ EHCI_INT_MASK_NXP_PERIODIC | EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_FRAMELIST_ROLLOVER;
//------------- Asynchronous List -------------//
ehci_qhd_t * const async_head = qhd_async_head(rhport);
@@ -358,7 +381,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
if ( dev_addr == 0 ) return true;
// Insert to list
- ehci_link_t * list_head;
+ ehci_link_t * list_head = NULL;
switch (ep_desc->bmAttributes.xfer)
{
@@ -378,8 +401,10 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
default: break;
}
+ TU_ASSERT(list_head);
+
// TODO might need to disable async/period list
- list_insert( list_head, (ehci_link_t*) p_qhd, EHCI_QTYPE_QHD);
+ list_insert(list_head, (ehci_link_t*) p_qhd, EHCI_QTYPE_QHD);
return true;
}
@@ -623,7 +648,7 @@ static void xfer_error_isr(uint8_t hostid)
}
//------------- Host Controller Driver's Interrupt Handler -------------//
-void hcd_isr(uint8_t rhport)
+void hcd_int_handler(uint8_t rhport)
{
ehci_registers_t* regs = ehci_data.regs;
@@ -634,6 +659,11 @@ void hcd_isr(uint8_t rhport)
if (int_status == 0) return;
+ if (int_status & EHCI_INT_MASK_FRAMELIST_ROLLOVER)
+ {
+ ehci_data.uframe_number += (EHCI_FRAMELIST_SIZE << 3);
+ }
+
if (int_status & EHCI_INT_MASK_PORT_CHANGE)
{
uint32_t port_status = regs->portsc & EHCI_PORTSC_MASK_ALL;
diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h
index ce2f56771..a6342b2d2 100644
--- a/src/host/ehci/ehci.h
+++ b/src/host/ehci/ehci.h
@@ -54,8 +54,8 @@
//--------------------------------------------------------------------+
// EHCI CONFIGURATION & CONSTANTS
//--------------------------------------------------------------------+
-#define EHCI_CFG_FRAMELIST_SIZE_BITS 7 /// Framelist Size (NXP specific) (0:1024) - (1:512) - (2:256) - (3:128) - (4:64) - (5:32) - (6:16) - (7:8)
-#define EHCI_FRAMELIST_SIZE (1024 >> EHCI_CFG_FRAMELIST_SIZE_BITS)
+#define EHCI_CFG_FRAMELIST_SIZE_BITS 7 /// Framelist Size (NXP specific) (0:1024) - (1:512) - (2:256) - (3:128) - (4:64) - (5:32) - (6:16) - (7:8)
+#define EHCI_FRAMELIST_SIZE (1024 >> EHCI_CFG_FRAMELIST_SIZE_BITS)
// TODO merge OHCI with EHCI
enum {
@@ -311,10 +311,14 @@ enum ehci_usbcmd_pos_ {
};
enum ehci_portsc_change_mask_{
+ EHCI_PORTSC_MASK_CURRENT_CONNECT_STATUS = TU_BIT(0),
EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE = TU_BIT(1),
+ EHCI_PORTSC_MASK_PORT_EANBLED = TU_BIT(2),
EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE = TU_BIT(3),
EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE = TU_BIT(5),
+ EHCI_PORTSC_MASK_PORT_RESET = TU_BIT(8),
+
EHCI_PORTSC_MASK_ALL =
EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE |
EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE |
@@ -445,6 +449,8 @@ typedef struct
ehci_qtd_t qtd_pool[HCD_MAX_XFER] TU_ATTR_ALIGNED(32);
ehci_registers_t* regs;
+
+ volatile uint32_t uframe_number;
}ehci_data_t;
#ifdef __cplusplus
diff --git a/src/host/hcd.h b/src/host/hcd.h
index a39e7fe16..24cc62501 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -84,17 +84,26 @@ enum {
#endif
//--------------------------------------------------------------------+
-// HCD API
+// Controller & Port API
//--------------------------------------------------------------------+
bool hcd_init(void);
-void hcd_isr(uint8_t hostid);
+void hcd_int_handler(uint8_t rhport);
void hcd_int_enable (uint8_t rhport);
void hcd_int_disable(uint8_t rhport);
-// PORT API
+// Get micro frame number (125 us)
+uint32_t hcd_uframe_number(uint8_t rhport);
+
+// Get frame number (1ms)
+static inline uint32_t hcd_frame_number(uint8_t rhport)
+{
+ return hcd_uframe_number(rhport) >> 3;
+}
+
/// return the current connect status of roothub port
bool hcd_port_connect_status(uint8_t hostid);
void hcd_port_reset(uint8_t hostid);
+void hcd_port_reset_end(uint8_t rhport);
tusb_speed_t hcd_port_speed_get(uint8_t hostid);
// HCD closes all opened endpoints belong to this device
@@ -134,9 +143,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes); // only queue, not transferring yet
bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete);
-#if 0
-tusb_error_t hcd_pipe_cancel();
-#endif
+// tusb_error_t hcd_pipe_cancel();
#ifdef __cplusplus
}
diff --git a/src/host/hub.c b/src/host/hub.c
index 00450b704..eb85dfa42 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -154,7 +154,7 @@ bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf
TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType);
TU_ASSERT(TUSB_XFER_INTERRUPT == ep_desc->bmAttributes.xfer);
- TU_ASSERT(hcd_edpt_open(rhport, dev_addr, ep_desc));
+ TU_ASSERT(usbh_edpt_open(rhport, dev_addr, ep_desc));
hub_data[dev_addr-1].itf_num = itf_desc->bInterfaceNumber;
hub_data[dev_addr-1].ep_status = ep_desc->bEndpointAddress;
diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c
index 547622edf..114f52e7d 100644
--- a/src/host/ohci/ohci.c
+++ b/src/host/ohci/ohci.c
@@ -166,7 +166,7 @@ bool hcd_init(void)
OHCI_REG->interrupt_disable = OHCI_REG->interrupt_enable; // disable all interrupts
OHCI_REG->interrupt_status = OHCI_REG->interrupt_status; // clear current set bits
OHCI_REG->interrupt_enable = OHCI_INT_WRITEBACK_DONEHEAD_MASK | OHCI_INT_RESUME_DETECTED_MASK |
- OHCI_INT_UNRECOVERABLE_ERROR_MASK | /*OHCI_INT_FRAME_OVERFLOW_MASK |*/ OHCI_INT_RHPORT_STATUS_CHANGE_MASK |
+ OHCI_INT_UNRECOVERABLE_ERROR_MASK | OHCI_INT_FRAME_OVERFLOW_MASK | OHCI_INT_RHPORT_STATUS_CHANGE_MASK |
OHCI_INT_MASTER_ENABLE_MASK;
OHCI_REG->control |= OHCI_CONTROL_CONTROL_BULK_RATIO | OHCI_CONTROL_LIST_CONTROL_ENABLE_MASK |
@@ -181,6 +181,13 @@ bool hcd_init(void)
return true;
}
+uint32_t hcd_uframe_number(uint8_t rhport)
+{
+ (void) rhport;
+ return (ohci_data.frame_number_hi << 16 | OHCI_REG->frame_number) << 3;
+}
+
+
//--------------------------------------------------------------------+
// PORT API
//--------------------------------------------------------------------+
@@ -599,13 +606,19 @@ static void done_queue_isr(uint8_t hostid)
}
}
-void hcd_isr(uint8_t hostid)
+void hcd_int_handler(uint8_t hostid)
{
uint32_t const int_en = OHCI_REG->interrupt_enable;
uint32_t const int_status = OHCI_REG->interrupt_status & int_en;
if (int_status == 0) return;
+ // Frame number overflow
+ if ( int_status & OHCI_INT_FRAME_OVERFLOW_MASK )
+ {
+ ohci_data.frame_number_hi++;
+ }
+
//------------- RootHub status -------------//
if ( int_status & OHCI_INT_RHPORT_STATUS_CHANGE_MASK )
{
diff --git a/src/host/ohci/ohci.h b/src/host/ohci/ohci.h
index 6f6ef9676..bfcdaf9a3 100644
--- a/src/host/ohci/ohci.h
+++ b/src/host/ohci/ohci.h
@@ -180,6 +180,8 @@ typedef struct TU_ATTR_ALIGNED(256)
ohci_ed_t ed_pool[HCD_MAX_ENDPOINT];
ohci_gtd_t gtd_pool[HCD_MAX_XFER];
+ volatile uint16_t frame_number_hi;
+
} ohci_data_t;
//--------------------------------------------------------------------+
diff --git a/src/host/usbh.c b/src/host/usbh.c
index f1b88259c..58550c93b 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -42,10 +42,17 @@
//--------------------------------------------------------------------+
// MACRO CONSTANT TYPEDEF
//--------------------------------------------------------------------+
+#if CFG_TUSB_DEBUG >= 2
+ #define DRIVER_NAME(_name) .name = _name,
+#else
+ #define DRIVER_NAME(_name)
+#endif
+
static host_class_driver_t const usbh_class_drivers[] =
{
#if CFG_TUH_CDC
{
+ DRIVER_NAME("CDC")
.class_code = TUSB_CLASS_CDC,
.init = cdch_init,
.open = cdch_open,
@@ -56,6 +63,7 @@ static host_class_driver_t const usbh_class_drivers[] =
#if CFG_TUH_MSC
{
+ DRIVER_NAME("MSC")
.class_code = TUSB_CLASS_MSC,
.init = msch_init,
.open = msch_open,
@@ -66,6 +74,7 @@ static host_class_driver_t const usbh_class_drivers[] =
#if HOST_CLASS_HID
{
+ DRIVER_NAME("HID")
.class_code = TUSB_CLASS_HID,
.init = hidh_init,
.open = hidh_open_subtask,
@@ -76,6 +85,7 @@ static host_class_driver_t const usbh_class_drivers[] =
#if CFG_TUH_HUB
{
+ DRIVER_NAME("HUB")
.class_code = TUSB_CLASS_HUB,
.init = hub_init,
.open = hub_open,
@@ -86,6 +96,7 @@ static host_class_driver_t const usbh_class_drivers[] =
#if CFG_TUH_VENDOR
{
+ DRIVER_NAME("VENDOR")
.class_code = TUSB_CLASS_VENDOR_SPECIFIC,
.init = cush_init,
.open = cush_open_subtask,
@@ -116,7 +127,6 @@ CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t _usbh_ctrl_buf[CFG_TUSB_H
//------------- Helper Function Prototypes -------------//
static inline uint8_t get_new_address(void);
static inline uint8_t get_configure_number_for_device(tusb_desc_device_t* dev_desc);
-static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id);
//--------------------------------------------------------------------+
// PUBLIC API (Parameter Verification is required)
@@ -127,6 +137,15 @@ tusb_device_state_t tuh_device_get_state (uint8_t const dev_addr)
return (tusb_device_state_t) _usbh_devices[dev_addr].state;
}
+
+static inline void osal_task_delay(uint32_t msec)
+{
+ (void) msec;
+
+ const uint32_t start = hcd_frame_number(TUH_OPT_RHPORT);
+ while ( ( hcd_frame_number(TUH_OPT_RHPORT) - start ) < msec ) {}
+}
+
//--------------------------------------------------------------------+
// CLASS-USBD API (don't require to verify parameters)
//--------------------------------------------------------------------+
@@ -154,7 +173,11 @@ bool usbh_init(void)
}
// Class drivers init
- for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) usbh_class_drivers[drv_id].init();
+ for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++)
+ {
+ TU_LOG2("%s init\r\n", usbh_class_drivers[drv_id].name);
+ usbh_class_drivers[drv_id].init();
+ }
TU_ASSERT(hcd_init());
hcd_int_enable(TUH_OPT_RHPORT);
@@ -216,6 +239,30 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
return TUSB_ERROR_NONE;
}
+bool usbh_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
+{
+ bool ret = hcd_edpt_open(rhport, dev_addr, ep_desc);
+
+ if (ret)
+ {
+ usbh_device_t* dev = &_usbh_devices[dev_addr];
+
+ // new endpoints belongs to latest interface (last valid value)
+ uint8_t drvid = 0xff;
+ for(uint8_t i=0; i < sizeof(dev->itf2drv); i++)
+ {
+ if ( dev->itf2drv[i] == 0xff ) break;
+ drvid = dev->itf2drv[i];
+ }
+ TU_ASSERT(drvid < USBH_CLASS_DRIVER_COUNT);
+
+ uint8_t const ep_addr = ep_desc->bEndpointAddress;
+ dev->ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)] = drvid;
+ }
+
+ return ret;
+}
+
//--------------------------------------------------------------------+
// USBH-HCD ISR/Callback API
//--------------------------------------------------------------------+
@@ -237,6 +284,7 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t ev
if (usbh_class_drivers[drv_id].isr)
{
+ //TU_LOG2("%s isr\r\n", usbh_class_drivers[drv_id].name);
usbh_class_drivers[drv_id].isr(dev_addr, ep_addr, event, xferred_bytes);
}
else
@@ -304,7 +352,11 @@ static void usbh_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_
if (tuh_umount_cb) tuh_umount_cb(dev_addr);
// Close class driver
- for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) usbh_class_drivers[drv_id].close(dev_addr);
+ for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++)
+ {
+ TU_LOG2("%s close\r\n", usbh_class_drivers[drv_id].name);
+ usbh_class_drivers[drv_id].close(dev_addr);
+ }
memset(dev->itf2drv, 0xff, sizeof(dev->itf2drv)); // invalid mapping
memset(dev->ep2drv , 0xff, sizeof(dev->ep2drv )); // invalid mapping
@@ -349,6 +401,8 @@ bool enum_task(hcd_event_t* event)
{
if( hcd_port_connect_status(dev0->rhport) )
{
+ TU_LOG2("Device connect \r\n");
+
// connection event
osal_task_delay(POWER_STABLE_DELAY); // wait until device is stable. Increase this if the first 8 bytes is failed to get
@@ -362,6 +416,8 @@ bool enum_task(hcd_event_t* event)
}
else
{
+ TU_LOG2("Device disconnect \r\n");
+
// disconnection event
usbh_device_unplugged(dev0->rhport, 0, 0);
return true; // restart task
@@ -415,6 +471,7 @@ bool enum_task(hcd_event_t* event)
TU_ASSERT_ERR( usbh_pipe_control_open(0, 8) );
//------------- Get first 8 bytes of device descriptor to get Control Endpoint Size -------------//
+ TU_LOG2("Get 8 byte of Device Descriptor\r\n");
request = (tusb_control_request_t ) {
.bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_DEVICE, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_IN },
.bRequest = TUSB_REQ_GET_DESCRIPTOR,
@@ -425,12 +482,16 @@ bool enum_task(hcd_event_t* event)
bool is_ok = usbh_control_xfer(0, &request, _usbh_ctrl_buf);
//------------- Reset device again before Set Address -------------//
+ TU_LOG2("Port reset \r\n");
+
if (dev0->hub_addr == 0)
{
// connected directly to roothub
TU_ASSERT(is_ok); // TODO some slow device is observed to fail the very fist controller xfer, can try more times
hcd_port_reset( dev0->rhport ); // reset port after 8 byte descriptor
osal_task_delay(RESET_DELAY);
+// hcd_port_reset_end(dev0->rhport);
+// osal_task_delay(RESET_DELAY);
}
#if CFG_TUH_HUB
else
@@ -449,6 +510,7 @@ bool enum_task(hcd_event_t* event)
#endif
//------------- Set new address -------------//
+ TU_LOG2("Set Address \r\n");
uint8_t const new_addr = get_new_address();
TU_ASSERT(new_addr <= CFG_TUSB_HOST_DEVICE_MAX); // TODO notify application we reach max devices
@@ -475,6 +537,7 @@ bool enum_task(hcd_event_t* event)
TU_ASSERT_ERR ( usbh_pipe_control_open(new_addr, ((tusb_desc_device_t*) _usbh_ctrl_buf)->bMaxPacketSize0 ) );
//------------- Get full device descriptor -------------//
+ TU_LOG2("Get Device Descriptor \r\n");
request = (tusb_control_request_t ) {
.bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_DEVICE, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_IN },
.bRequest = TUSB_REQ_GET_DESCRIPTOR,
@@ -493,6 +556,7 @@ bool enum_task(hcd_event_t* event)
TU_ASSERT(configure_selected <= new_dev->configure_count); // TODO notify application when invalid configuration
//------------- Get 9 bytes of configuration descriptor -------------//
+ TU_LOG2("Get 9 bytes of Configuration Descriptor\r\n");
request = (tusb_control_request_t ) {
.bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_DEVICE, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_IN },
.bRequest = TUSB_REQ_GET_DESCRIPTOR,
@@ -506,6 +570,7 @@ bool enum_task(hcd_event_t* event)
TU_ASSERT( CFG_TUSB_HOST_ENUM_BUFFER_SIZE >= ((tusb_desc_configuration_t*)_usbh_ctrl_buf)->wTotalLength );
//------------- Get full configuration descriptor -------------//
+ TU_LOG2("Get full Configuration Descriptor\r\n");
request.wLength = ((tusb_desc_configuration_t*)_usbh_ctrl_buf)->wTotalLength; // full length
TU_ASSERT( usbh_control_xfer( new_addr, &request, _usbh_ctrl_buf ) );
@@ -513,6 +578,7 @@ bool enum_task(hcd_event_t* event)
new_dev->interface_count = ((tusb_desc_configuration_t*) _usbh_ctrl_buf)->bNumInterfaces;
//------------- Set Configure -------------//
+ TU_LOG2("Set Configuration Descriptor\r\n");
request = (tusb_control_request_t ) {
.bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_DEVICE, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_OUT },
.bRequest = TUSB_REQ_SET_CONFIGURATION,
@@ -522,6 +588,7 @@ bool enum_task(hcd_event_t* event)
};
TU_ASSERT(usbh_control_xfer( new_addr, &request, NULL ));
+ TU_LOG2("Device configured\r\n");
new_dev->state = TUSB_DEVICE_STATE_CONFIGURED;
//------------- TODO Get String Descriptors -------------//
@@ -529,6 +596,8 @@ bool enum_task(hcd_event_t* event)
//------------- parse configuration & install drivers -------------//
uint8_t const* p_desc = _usbh_ctrl_buf + sizeof(tusb_desc_configuration_t);
+ // TU_LOG2_MEM(_usbh_ctrl_buf, ((tusb_desc_configuration_t*)_usbh_ctrl_buf)->wTotalLength, 0);
+
// parse each interfaces
while( p_desc < _usbh_ctrl_buf + ((tusb_desc_configuration_t*)_usbh_ctrl_buf)->wTotalLength )
{
@@ -538,7 +607,7 @@ bool enum_task(hcd_event_t* event)
p_desc = tu_desc_next(p_desc); // skip the descriptor, increase by the descriptor's length
}else
{
- tusb_desc_interface_t* desc_itf = (tusb_desc_interface_t*) p_desc;
+ tusb_desc_interface_t const* desc_itf = (tusb_desc_interface_t const*) p_desc;
// Check if class is supported
uint8_t drv_id;
@@ -568,11 +637,8 @@ bool enum_task(hcd_event_t* event)
{
uint16_t itf_len = 0;
- if ( usbh_class_drivers[drv_id].open(new_dev->rhport, new_addr, desc_itf, &itf_len) )
- {
- mark_interface_endpoint(new_dev->ep2drv, p_desc, itf_len, drv_id);
- }
-
+ TU_LOG2("%s open\r\n", usbh_class_drivers[drv_id].name);
+ TU_ASSERT( usbh_class_drivers[drv_id].open(new_dev->rhport, new_addr, desc_itf, &itf_len) );
TU_ASSERT( itf_len >= sizeof(tusb_desc_interface_t) );
p_desc += itf_len;
}
@@ -588,7 +654,7 @@ bool enum_task(hcd_event_t* event)
/* USB Host Driver task
* This top level thread manages all host controller event and delegates events to class-specific drivers.
* This should be called periodically within the mainloop or rtos thread.
- *
+ *_usbh_devices[dev_addr].
@code
int main(void)
{
@@ -652,25 +718,4 @@ static inline uint8_t get_configure_number_for_device(tusb_desc_device_t* dev_de
return config_num;
}
-// Helper marking endpoint of interface belongs to class driver
-// TODO merge with usbd
-static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id)
-{
- uint16_t len = 0;
-
- while( len < desc_len )
- {
- if ( TUSB_DESC_ENDPOINT == tu_desc_type(p_desc) )
- {
- uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress;
-
- ep2drv[ tu_edpt_number(ep_addr) ][ tu_edpt_dir(ep_addr) ] = driver_id;
- }
-
- len += tu_desc_len(p_desc);
- p_desc = tu_desc_next(p_desc);
- }
-}
-
-
#endif
diff --git a/src/host/usbh.h b/src/host/usbh.h
index fe39a19f4..27193d378 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -52,6 +52,10 @@ typedef enum tusb_interface_status_{
} tusb_interface_status_t;
typedef struct {
+ #if CFG_TUSB_DEBUG >= 2
+ char const* name;
+ #endif
+
uint8_t class_code;
void (* const init) (void);
@@ -69,7 +73,8 @@ typedef struct {
void tuh_task(void);
// Interrupt handler, name alias to HCD
-#define tuh_isr hcd_isr
+extern void hcd_int_handler(uint8_t rhport);
+#define tuh_int_handler hcd_int_handler
tusb_device_state_t tuh_device_get_state (uint8_t dev_addr);
static inline bool tuh_device_is_configured(uint8_t dev_addr)
@@ -97,6 +102,8 @@ TU_ATTR_WEAK void tuh_umount_cb(uint8_t dev_addr);
bool usbh_init(void);
bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data);
+bool usbh_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
+
#ifdef __cplusplus
}
#endif
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-20 10:29:01 +0000