diff options
Diffstat (limited to 'src/portable')
| -rw-r--r-- | src/portable/renesas/rusb2/dcd_rusb2.c | 27 | ||||
| -rw-r--r-- | src/portable/synopsys/dwc2/dcd_dwc2.c | 31 | ||||
| -rwxr-xr-x | src/portable/synopsys/dwc2/dwc2_info.py | 1 | ||||
| -rw-r--r-- | src/portable/synopsys/dwc2/hcd_dwc2.c | 2 |
4 files changed, 42 insertions, 19 deletions
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c index 786b8d980..779c7bc3d 100644 --- a/src/portable/renesas/rusb2/dcd_rusb2.c +++ b/src/portable/renesas/rusb2/dcd_rusb2.c @@ -213,17 +213,26 @@ static void pipe_write_packet_ff(rusb2_reg_t * rusb, tu_fifo_t *f, volatile void tu_fifo_buffer_info_t info; tu_fifo_get_read_info(f, &info); - uint16_t count = tu_min16(total_len, info.linear.len); - pipe_write_packet(rusb, info.linear.ptr, fifo, count); + uint16_t cnt_lin = tu_min16(total_len, info.linear.len); + uint16_t cnt_wrap = tu_min16(total_len - cnt_lin, info.wrapped.len); + uint16_t const cnt_written = cnt_lin + cnt_wrap; - uint16_t rem = total_len - count; - if (rem) { - rem = tu_min16(rem, info.wrapped.len); - pipe_write_packet(rusb, info.wrapped.ptr, fifo, rem); - count += rem; - } + // Ensure only the last write is odd if total_len is odd + if (cnt_wrap == 0) { + pipe_write_packet(rusb, info.linear.ptr, fifo, cnt_lin); + } else { + pipe_write_packet(rusb, info.linear.ptr, fifo, cnt_lin & ~1); - tu_fifo_advance_read_pointer(f, count); + if (cnt_lin & 1) { + uint8_t glue[2] = {info.linear.ptr[cnt_lin & ~1], info.wrapped.ptr[0]}; + pipe_write_packet(rusb, glue, fifo, 2); + cnt_wrap--; + info.wrapped.ptr++; + } + + pipe_write_packet(rusb, info.wrapped.ptr, fifo, cnt_wrap); + } + tu_fifo_advance_read_pointer(f, cnt_written); } // Read data sw fifo <-- hw fifo diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index 00e81217b..ba40498e6 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -39,6 +39,7 @@ #define DWC2_DEBUG 2 #include "device/dcd.h" +#include "device/usbd.h" #include "device/usbd_pvt.h" #include "dwc2_common.h" @@ -76,6 +77,10 @@ CFG_TUD_MEM_SECTION static struct { TUD_EPBUF_DEF(setup_packet, 8); } _dcd_usbbuf; +static tud_configure_dwc2_t _tud_cfg = { + .bm_double_buffered = 0 +}; + TU_ATTR_ALWAYS_INLINE static inline uint8_t dwc2_ep_count(const dwc2_regs_t* dwc2) { #if TU_CHECK_MCU(OPT_MCU_GD32VF103) (void) dwc2; @@ -186,7 +191,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t calc_device_grxfsiz(uint16_t larges return 13 + 1 + 2 * ((largest_ep_size / 4) + 1) + 2 * ep_count; } -static bool dfifo_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t packet_size) { +static bool dfifo_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t packet_size, bool is_bulk) { dwc2_regs_t* dwc2 = DWC2_REG(rhport); const dwc2_controller_t* dwc2_controller = &_dwc2_controller[rhport]; const uint8_t ep_count = dwc2_controller->ep_count; @@ -212,8 +217,9 @@ static bool dfifo_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t packet_size) { _dcd_data.allocated_epin_count++; } - // If The TXFELVL is configured as half empty, the fifo must be twice the max_size. - if ((dwc2->gahbcfg & GAHBCFG_TX_FIFO_EPMTY_LVL) == 0) { + // Enable double buffering if configured, only effective for non-periodic endpoints + // Since we queue only 1 control transfer at a time, it's only applicable for bulk IN endpoints + if (((_tud_cfg.bm_double_buffered & (1 << epnum)) != 0) && epnum > 0 && is_bulk) { fifo_size *= 2; } @@ -248,7 +254,7 @@ static void dfifo_device_init(uint8_t rhport) { dwc2->gdfifocfg = ((uint32_t) _dcd_data.dfifo_top << GDFIFOCFG_EPINFOBASE_SHIFT) | _dcd_data.dfifo_top; // Allocate FIFO for EP0 IN - (void) dfifo_alloc(rhport, 0x80, CFG_TUD_ENDPOINT0_SIZE); + (void) dfifo_alloc(rhport, 0x80, CFG_TUD_ENDPOINT0_SIZE, false); } @@ -446,6 +452,16 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin //-------------------------------------------------------------------- // Controller API //-------------------------------------------------------------------- +// optional dcd configuration, called by tud_configure() +bool dcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) { + (void) rhport; + TU_VERIFY(cfg_id == TUD_CFGID_DWC2 && cfg_param != NULL); + + const tud_configure_param_t* const cfg = (const tud_configure_param_t*) cfg_param; + _tud_cfg = cfg->dwc2; + return true; +} + bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) { (void) rh_init; dwc2_regs_t* dwc2 = DWC2_REG(rhport); @@ -492,9 +508,7 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) { // Enable required interrupts dwc2->gintmsk |= GINTMSK_OTGINT | GINTMSK_USBRST | GINTMSK_ENUMDNEM | GINTMSK_WUIM; - // TX FIFO empty level for interrupt is complete empty uint32_t gahbcfg = dwc2->gahbcfg; - gahbcfg |= GAHBCFG_TX_FIFO_EPMTY_LVL; gahbcfg |= GAHBCFG_GINT; // Enable global interrupt dwc2->gahbcfg = gahbcfg; @@ -590,7 +604,8 @@ void dcd_sof_enable(uint8_t rhport, bool en) { *------------------------------------------------------------------*/ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const* desc_edpt) { - TU_ASSERT(dfifo_alloc(rhport, desc_edpt->bEndpointAddress, tu_edpt_packet_size(desc_edpt))); + TU_ASSERT(dfifo_alloc(rhport, desc_edpt->bEndpointAddress, tu_edpt_packet_size(desc_edpt), + desc_edpt->bmAttributes.xfer == TUSB_XFER_BULK)); edpt_activate(rhport, desc_edpt); return true; } @@ -625,7 +640,7 @@ void dcd_edpt_close_all(uint8_t rhport) { } bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) { - TU_ASSERT(dfifo_alloc(rhport, ep_addr, largest_packet_size)); + TU_ASSERT(dfifo_alloc(rhport, ep_addr, largest_packet_size, false)); return true; } diff --git a/src/portable/synopsys/dwc2/dwc2_info.py b/src/portable/synopsys/dwc2/dwc2_info.py index f6bd2785a..8fbbc00a0 100755 --- a/src/portable/synopsys/dwc2/dwc2_info.py +++ b/src/portable/synopsys/dwc2/dwc2_info.py @@ -2,7 +2,6 @@ import ctypes import argparse -import click import pandas as pd # hex value for register: guid, gsnpsid, ghwcfg1, ghwcfg2, ghwcfg3, ghwcfg4 diff --git a/src/portable/synopsys/dwc2/hcd_dwc2.c b/src/portable/synopsys/dwc2/hcd_dwc2.c index b92448685..fc748c85f 100644 --- a/src/portable/synopsys/dwc2/hcd_dwc2.c +++ b/src/portable/synopsys/dwc2/hcd_dwc2.c @@ -821,7 +821,7 @@ static void channel_xfer_in_retry(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hci } } -#if CFG_TUSB_DEBUG +#if CFG_TUSB_DEBUG && 0 TU_ATTR_ALWAYS_INLINE static inline void print_hcint(uint32_t hcint) { const char* str[] = { "XFRC", "HALTED", "AHBERR", "STALL", |