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AgeCommit message (Expand)Author
5 daystest/hil: drop the sysfs blindness subsystem and derive the recovery reservehathach
5 daysAdd RTT console/capture tooling (tools/rtt.py), rtt skill, and HIL harness su...Ha Thach
12 daysci: scope the build matrix and the HIL run to what a PR affectshathach
12 dayshil: run every board in one hil_test.py and hand results across as JSONhathach
2026-08-18test/hil, ci: contain a wedged USB stack instead of stranding the runnerhathach
2026-07-14test/hil: usbtest fleet enablement, shuffled scheduling, unique PIDshathach
2026-06-30Fix code-review findings (changelog rendering, release skill, sidebar)hathach
2024-10-11fix fuzzing buildhathach
2024-10-11change dcd_init() to take rhport structhathach
2024-04-16skip symlink in pre-commithathach
2023-05-23Enhance chipidea (#2075)Ha Thach
2023-04-03add some .idea configurationhathach
2023-03-22add tuh_hid_itf_get_info() and change tuh_cdc_itf_get_info() to use new tuh_i...hathach
2023-03-17finalizehathach
2023-03-17fix spellinghathach
2023-03-17use codespell as pre-commithathach
2023-03-17fix trailing space and new linehathach
2023-03-17update cihathach
2023-03-16update pre-commit yamlhathach
2023-03-15add pre-commit yamlhathach