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2026-07-28bsp, hil: flash WCH boards with the unified OpenOCD fork (#3791)Ha Thach
bsp, hil: flash with the unified OpenOCD fork https://github.com/hathach/openocd (branch tinyusb) is mainline plus every config these boards need: RPi RP2350, ADI max32/max78, the MounRiver WCH configs, and the wlinke adapter on mainline's riscv target. It is a superset of the vendor forks, so one 'openocd' covers all boards; -DOPENOCD=/OPENOCD= still select another, msdk's when MAXIM_PATH is set. Drops family_flash_openocd_wch and the OPENOCD_WCH pair, dedups family_flash_openocd_adi, aligns ch583's work area, and points hil at the flasher's own config instead of generating one per probe. Verified: HIL green on all four WCH boards and max32666fthr.
2026-07-09bsp(ch32): naked fsdev ISRs so nested USBD IRQs return safelyhathach
The three USBD lines nest under QingKe HWSTK; gcc's interrupt prologue corrupts the return, so rely on the hardware stack and bare mret. Co-Authored-By: Claude Fable 5 <[email protected]> Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg
2026-05-22ch32v20x: fix port1 IP selectionHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2026-05-22bsp/ch32: fix linker report 100% RAM usageHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2026-04-29ensure board_uart_write return -1 on defaultHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2026-04-06remove IAR toolchain support from make build systemhathach
IAR is only supported with CMake. Remove all IAR-specific references from the Make build system including toolchain files, SRC_S_IAR, LD_FILE_IAR variables, and IAR toolchain detection. Also fix GET_SECTOR_COUNT truncation in msc_file_explorer and broken formatting in stm32f7 board_uart_write. Co-Authored-By: Claude Opus 4.6 (1M context) <[email protected]>
2026-04-04implement board_uart_read()/write() as non-blocking for all familieshathach
2026-04-03stm32 add uart hwfifo if supported, otherwise usb tu_fifo_t for receive uart ↵hathach
in irq
2026-03-20Add dd command to MSC file explorer for sector read and speed reporting, ↵hathach
adjust CLI configuration and HIL tests
2026-02-28replace board_millis() with tusb_time_millis_api()hathach
2025-11-25fsdev: reorganize functionsHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2025-10-28fix warning with strict prototypes warningshathach
2025-10-28disable warning for startup filehathach
2025-10-23refactor family.cmake: rename add_board_target() to family_add_board() and ↵hathach
move it to family_configure_common() also move startup and linker from board target to actual exe
2025-10-14fix lots of warnings for missing-prototypes for irqhandlerhathach
2025-07-05always define CFG_TUH_WCH_USBIP_USBFS=1 for ch32v20x since only port1 ↵hathach
support host mode reformat hcd usbfs add uart rx for ch32v20x bsp
2025-07-04Merge branch 'refs/heads/master' into fork/verylowfreq/pr-ch32v-usbfs-hosthathach
2025-04-06Allow different port and mode for LED on ch32v boardsRadomir Dopieralski
While there is a define for the port, the clock enable is hardcoded for GPIOA, so setting a different port than GPIOA doesn't work. This fixes it by adding a define for enabling the port clock. It also adds a define for the pin mode, because not all boards have the LED connected in a way that open drain works with it.
2025-03-16Update ch32v20x family.cmakeverylowfreq
2025-03-16Fix the condition related to CFG_TUH_WCH_USBIP_USBFS macroverylowfreq
2025-03-16Add ch32v20x usbfs hcd initial support.verylowfreq
2025-01-25cmake remove EXAMPLE-tinyusb target as libraryhathach
2025-01-24add cmake RTOS=zephyr (default noos) for zephyr buildhathach
2025-01-22- change to use CMAKE_SYSTEM_CPU to prevent CMAKE_SYSTEM_PROCESSOR conflict ↵hathach
with zephyr - change tinyusb CMakeLists.txt to function tinyusb_target_add() instead of defining tinyusb lib target
2024-12-27embed metadata to family.c and board.h to generate supported boards dochathach
2024-08-13use zero wait flash for nano v203hathach
2024-07-23fsdev read/write packet use unaligned functionhathach
2024-07-22fix a bug in fsdev introduced by #1942hathach
2024-07-10skip FLASH_ function to reduce dependencyhathach
2024-07-10enable full 224KB flash for ch32v203 with flash enhanced read mode in ↵hathach
SystemInit (better with startup). add flash with wlink-rs
2024-07-05add board_reset_to_bootloader(), try to implement that for ch32v203 but not ↵hathach
working yet
2024-06-21add new ch32v203g6u board, sysfreq is defined in board.cmake/mkhathach
2024-06-14add ch32v103 bsp support, compile but does not run, probably due to ↵hathach
compile/linker issue
2024-06-14use stock core_riscv.h for ch32 v2 v3hathach
2024-06-06add c6 devkit, tested with max3421ehathach
2024-05-24increase version as pre-releases, still need more clean up before actual relesaehathach
2024-05-24change default clock to 144mhzhathach
2024-05-24add ch32 support for fsdev driver. v20x can select fsdev or usbfs with ↵hathach
make/cmake PORT=0/1. default to fsdev
2024-05-20use correct wch usbhs, usbfs for ch32v307 using CFG_TUD_MAX_SPEEDhathach
2024-05-20- update ch203 family to allow to specify flash and ram size. Introducehathach
- add ch32v203_ro_1v0 board - CFG_EXAMPLE_MSC_DUAL_READONLY to build msc_dual_lun for ch32v203
2024-05-16change default risv-gcc to riscv-none-elf- and add _zicsr extensionhathach
add cmake for ch32v20x, skip freertos examples for CH32V20X, also skip net webserver due to lack of RAM update to use openocd with wlinke adapter
2024-05-15add CH32V20x USB OTG/FS driverMatthew Tran
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-19 01:28:34 +0000