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nrf52840dk: 16 MHz TRACECLK (hardware cap) width 4, P25 soldered, SW7=Alt;
no family code needed (J-Link arms TRACECONFIG). nrf5340dk: TRACE_ETM
builds force the TAD port to 16 MHz (SystemInit's 64 MHz is marginal),
+3 ns sample timing; the interface MCU's UART1 flow control drives the
trace pins - SB27/SB28 must be cut (P0.10/P0.11 = TRACEDATA1/0).
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* update build.py script to work with circleci
* build make with circle ci
* build vm for esp only
* nrf imxrt with large resource
* nrf imxrt with large resource
* remove 2 of nrf boards
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fix clang build with nrf
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- compile nrf with __STARTUP_CLEAR_BSS and link flag -nostartfiles
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also remove pico_bootsel_via_double_reset from rp2040
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- Fix incorrect UART pins
- Enable MAX3421 host shield
- Use GPIOTE1_IRQn instead of GPIOTE_IRQn
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tested with feather nrf52840, m0, m4
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- hcd_int_disable/enable is software only to reduce interrupt lag
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interrupt pin
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- add empty tuh_int_handler/tud_int_handler if corresponidng stack not enabled
- add hcd_template.c
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fix cortex m33 for nrf5340 dk
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temporarily disable codespell
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