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2026-07-24samd5x_e5x: ETM trace support for same54_xplainedhathach
The populated 20-pin Cortex Debug+ETM header carries 4-bit trace (TRACECLK=PC27, D0-3=PC28/PC26/PC25/PC24, mux H). TRACE_ETM builds mux the pins and enable GCLK channel 47 (GCLK_CM4_TRACE) from GCLK0 - without that gate the port stays silent with pins and TPIU armed. Chip-max 120 MHz core / 60 MHz TRACECLK validated (3x 280M-fetch captures).
2025-07-09add option to pass symbol defines to ci build.pyhathach
add build.args option for hil json add MAX3421_HOST=1 for metro m4 express
2025-07-09add board_vbus_set() for samd21/d51 to enable usb host vbushathach
enable host example build for samd21/d51
2024-12-27embed metadata to family.c and board.h to generate supported boards dochathach
2024-08-22add hil support for dual host_info_to_cdchathach
replace itsybitsy m4 by metro m4 + max3421e
2024-05-03rename to samd5x_e5xhathach
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-30 14:23:00 +0000