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path: root/hw/bsp/stm32f070rbnucleo
AgeCommit message (Expand)Author
2020-10-30use cmsis 5 for all stm32hathach
2020-10-30f0 use offical st driver repohathach
2020-10-08clean up jlink default interfacehathach
2020-05-17enable -Wcast-alignhathach
2020-04-17mass rename tud/dcd_irq_handler to tud/dcd_init_handlerhathach
2020-04-08move irq for stm32 fsdevhathach
2020-03-28Update F0 BSP for new HALNathan Conrad
2020-03-26Modify include of HAL, and remove CMSIS clock configuration code, and impleme...Nathan Conrad
2020-03-22STM32FSDEV: Rewrite transfer ISRNathan Conrad
2020-03-09Adding lwip_webserver to cihathach
2020-01-10clean up flash-stlinkhathach
2019-12-11close #204 define HSE_VALUE in _hal_conf instead of board.mkhathach
2019-11-20move -flto to board.mkhathach
2019-11-03Add UART HAL source file to stm32f070 makefile.Nathan Conrad
2019-11-03Enable UART debugging on F070.Nathan Conrad
2019-10-24fix missing board uart read/write()hathach
2019-09-27add -Wextra for more warnings to examplehathach
2019-09-12Correct port assigned on the STM32F070 BSPNathan Conrad
2019-09-12ported stm32f2, added board stm32f207zg nucleohathach
2019-09-11fix #130hathach
2019-09-10Rename the STM32 MCU options.Nathan Conrad
2019-09-10Move interrupt handler into device driver, and rename the OPT_MCU_STM32 const...Nathan Conrad
2019-09-10Correct JLINK_DEVICE and FREERTOS_PORT in F070RB make file. FreeRTOS and j-li...Nathan Conrad
2019-09-09Start clock on F0 and F0, and handle USB interrupts.Nathan Conrad
2019-09-09Update F3 BSP and create F070RB BSP. Both are untested (but compile).Nathan Conrad
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