| Age | Commit message (Collapse) | Author |
|---|
|
- kill_traffic(): stop the recording at --duration-ms exactly, then reap
the workload, instead of waiting on it (up to 60s) before -stop
- sysview_report.py: key open_calls by (func id, context) so interleaved
callers of the same function don't cross-pair CALL/RET
- build.yml: intersect the sysview dep-fetch board list with the PR's own
HIL selection (tinyusb.json vs hfp.json), and skip entirely when HIL is
not running for this PR
- nrf54h20dk: shrink SYSVIEW_BUFFER_SIZE_DEFAULT to 4096 -- .data/.bss sit
in the 32 KiB primary RAM, so the family's 65536 default fails to link
- tusb_sysview.c: copy pcTaskName into a local buffer at snapshot time so
a task deleted mid-lap can't leave SendTaskInfo() dereferencing a freed TCB
- sysview_ci.py: drop a comparison against a baseline whose capture config
(example/workload/duration_s) changed, and fail cdc_burst when the link
stays enumerated but echoes nothing back
- SKILL.md: document the WCH post-mortem dump path (OpenOCD, no J-Link)
|
|
Cortex-M0/M0+, the WCH RISC-V parts and MAX3266x have no usable DWT cycle
counter, so their family.c provides SEGGER_SYSVIEW_X_GetTimestamp() from a
free-running hardware timer: a 32-bit general-purpose timer on ST parts
(sysview_stm32_tim2.h), SysTick-extended sources on the M0 families, the
core's SysTick-equivalent on WCH with the documented ordered read of the
split count registers (sysview_wch_timestamp.h), and a TMR on MAX3266x
(sysview_max32_tmr.h).
max32666fthr's DWT implements only watchpoint comparators (DWT_CTRL.NOCYCCNT=1
read live; UG6971 documents no DWT/trace at all), so SystemView's ARMv7-M
default read 0xE0001004 as a frozen 0 and every duration decoded as zero. The
TMR runs at 48 MHz (f_PCLK = f_SYS_CLK/2; Continuous mode, CMP=0xFFFFFFFF,
prescaler 1 - UG6971 15.2 guarantees TMRn_CNT readable while counting); TMR0
by default - present on every MAX32 part, unused by the examples, FreeRTOS
ticks on SysTick - overridable with -DSYSVIEW_MAX32_TMR=n. The family builds
SystemView with SEGGER_SYSVIEW_CORE_OTHER and sets CFG_TUSB_SYSVIEW_TIMESTAMP_BSP,
a tusb_sysview.c opt-in for ARMv7-M parts without CYCCNT where the BSP also
reports the rate via SEGGER_SYSVIEW_X_GetTimestampFreq(); the fixed-1MHz
microsecond contract is unreachable on a powers-of-two-only prescaler.
SEGGER_SYSVIEW_X_GetInterruptId() gains the ICSR.VECTACTIVE read for
CORE_OTHER builds. MAX32650/32690 use different GCR clock-gate names and stay
unported. Measured on the rig: seven host-timed 1.000 s gaps at
1.00044-1.00091 (median +0.05%).
stm32f0 refuses to configure SYSVIEW for stm32f070xb at CMake time: that
variant has no TIM2 at all, and the alternative was an undefined-reference
link error with no hint.
The shared hw/bsp/sysview_*.h join ci_select rule 16's hw/bsp file list
(cross-family build files, compiled only under -DSYSVIEW which no CI leg
enables), mirrored in the spec's rule table, so master's classification
guard resolves them on both axes.
|
|
Level 2 marks the stack's task-side entry points (tud_task/tuh_task inner
loop, usbd_edpt_xfer, control transfers); level 3 adds the class drivers
(cdc, msc) and the rp2040 dcd/hcd as the reference portable layer. All
call sites compile away below their level.
|
|
tusb_sysview.{c,h} carry the SystemView glue: the TU_SV_* event/function-name
table (offset TU_SV_EVENT_BASE 512), module registration, the leveled
CFG_TUD_SYSVIEW/CFG_TUH_SYSVIEW gates (1 = ISR only, 2 = +stack call sites,
3 = +class drivers), per-task stack high-water reporting with a cached
snapshot refreshed once per rotation, and the dual-role guard that collapses
double-recording when device and host share one vector.
ISR exit emits RecordExitISRToScheduler() when SCB->ICSR.PENDSVSET is set at
exit (Cortex-M0/M3+), so FreeRTOS captures don't show a causeless task switch
after every USB ISR; RISC-V keeps the plain exit record.
Unit-tested under ceedling against a fake SEGGER_SYSVIEW.h vendor header.
|
|
bound endpoint number in tu_bind_driver_to_ep_itf
|
|
ERR050101: while an isochronous IN endpoint is active, an IN token addressed to
that same endpoint number on ANOTHER device sharing the host can silently
unprime one of this device's OUT endpoints - control, bulk, interrupt or
isochronous alike. NXP states it cannot be detected by software and raises no
interrupt, so the endpoint simply stops answering and the transfer never
completes.
The workaround is a uniqueness requirement rather than a particular number: the
isochronous IN endpoint must not share its number with any IN endpoint in use on
the bus. One family-wide constant therefore defeats it, since two affected
boards on the same hub then pick the same number and each becomes the other's
aggressor. CFG_TUSB_MIMXRT1XXX_ERRATA_ERR050101 is set only for the parts whose
errata list it - RT1015, RT1020, RT1024 and RT1050, where it is marked no fix
scheduled, plus RT1060 and RT1064 rev A - so RT1010 and the RT11xx family keep
the ordinary number and cannot collide with an affected board beside them.
Several affected boards on one hub can still be given distinct numbers with
-DEPNUM_ISO_IN.
The guard covers every example that has an isochronous IN endpoint: audio_test,
audio_4_channel_mic, uac2_headset, cdc_uac2, usbtest, video_capture and
video_capture_2ch. The video examples move the endpoint only when streaming
isochronously, since the bulk configuration is unaffected, and video_capture_2ch
takes two numbers because it has two streams.
The macro name follows CFG_TUSB_RP2_ERRATA_E2/E4/E15 already in tree, and its
is fixed, and which cannot be told apart at compile time - a way to define it to
0.
device_issues.rst records ERR050101 against every affected part with a link to
each errata sheet, and adds the LPC55S2x USB.3 speed-detection and USB.5
isochronous IN entries, neither of which TinyUSB works around. The branch's
design notes are included under docs/superpowers.
Verified: 340 wedge-free runs on mimxrt1064_evk, which previously wedged within
hours, and the macro resolving to endpoint 0x87 on mimxrt1064_evk against 0x83
on mimxrt1010_evk and stm32f407disco.
|
|
|
|
|
|
|
|
|
|
|
|
Larger at32f403a PMA area
|
|
|
|
Co-Authored-By: Claude Fable 5 <[email protected]>
Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg
|
|
|
|
* license: use SPDX identifiers for src/ headers
Replace the full ~20-line MIT license boilerplate on every src/ file with a
two-line SPDX tag (SPDX-FileCopyrightText + SPDX-License-Identifier), following
the REUSE convention used by CircuitPython and the Linux kernel. Removes ~3500
lines of duplicated boilerplate.
|
|
Signed-off-by: HiFiPhile <[email protected]>
|
|
The BSP family and MCU option were named "ch58x"/"CH58X", but the supported part is
the CH583/CH582 (and the SDK repo is openwch/ch583); CH585 is a separate MCU family,
so the CH58x umbrella was misleading. Rename to the specific family:
- hw/bsp/ch58x -> hw/bsp/ch583 (dir), and the BSP-local files ch58x_it.* ->
ch583_it.*, system_ch58x.* -> system_ch583.* (include guards/refs updated). The
vendor SDK files (CH58x_common.h, CH58x_*.c in hw/mcu/wch/ch583) keep their names.
- OPT_MCU_CH58X -> OPT_MCU_CH583 in tusb_option.h, tusb_mcu.h, and the shared WCH
USBFS driver (ch32_usbfs_reg.h, dcd_ch32_usbfs.c). OPT_MCU_CH582 is kept as an
alias (same value), so either name selects the same code.
- FAMILY_MCUS CH58X -> CH583, CFG_TUSB_MCU=OPT_MCU_CH583, mcu:CH58X -> mcu:CH583 in
the example skip lists, the CI build matrix (ci_set_matrix.py), the get_deps family
tag, and docs/reference/boards.rst.
Board names (ch582m_evt, yd-ch582m) are unchanged. Verified: make + cmake build for
ch582m_evt, and ci.lan HIL (all device examples pass).
Co-Authored-By: Claude Opus 4.8 (1M context) <[email protected]>
|
|
Replace PR #3515's separate dcd_ch58x_usbfs.c / hcd_ch58x_usbfs.c with the
shared WCH USBFS device driver (combined per-endpoint control, like CH32V103),
adding two CH58x-specific behaviors guarded so CH32V103/V20x/V307 are unchanged:
- CH32_USBFS_EP_MANUAL_TOG: CH58x's hardware AUTO_TOG does not stay in sync, so
the ISR toggles DATA0/DATA1 manually and discards toggle-mismatched OUT
packets. Fixes multi-packet bulk-IN (e.g. MSC READ10) that otherwise hung.
- CH32_USBFS_EP4_SHARES_EP0: EP4 has no DMA register and overlays EP0's region
(EP0[0:63] + EP4 OUT[64:127] + EP4 IN[128:191]); add a 192-byte shared buffer
and buffer-pointer helpers (transparent for the other parts). Fixes
cdc_dual_ports (Port1 is on EP4).
Add the ch582m_evt board. Device only on USB0 (rhport 0): the shared
hcd_ch32_usbfs.c is CH32V20x-specific and cannot drive CH58x, so host / USB2
(rhport 1) is left commented out in the BSP for easy re-add.
Verified on ch582m_evt via local HIL: all device examples pass.
Co-Authored-By: Claude Opus 4.8 (1M context) <[email protected]>
|
|
|
|
# Conflicts:
# README.rst
|
|
|
|
- Added a pending FIFO queue for asynchronous control transfers when the active slot is busy.
- Introduced `control_xfer_dispatch_pending` to handle queued transfers on slot availability.
- Improved synchronization for blocking and non-blocking transfer modes, preventing deadlocks in RTOS.
- Refactored and renamed related functions for clarity and consistency.
- Enhanced error handling and callback invocation for failed or stale transfers.
|
|
Signed-off-by: HiFiPhile <[email protected]>
|
|
Signed-off-by: HiFiPhile <[email protected]>
|
|
Signed-off-by: HiFiPHile <[email protected]>
|
|
endpoint state handling methods and accesses
|
|
# Conflicts:
# src/common/tusb_types.h
# src/portable/mentor/musb/dcd_musb.c
|
|
|
|
fix #3596: big-endian host support for SETUP packet handling
|
|
Fix some -Wconversion warnings
|
|
|
|
separate process_edpt_n() to process_epin() and process_epout()
|
|
`CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY` for improved configuration consistency across examples and core sources
|
|
|
|
|
|
|
|
|
|
1. Add TU_LITTLE_ENDIAN_BITFIELD / TU_BIG_ENDIAN_BITFIELD macros in
tusb_compiler.h (GCC and IAR), following Linux kernel style.
2. Update bmAttributes (tusb_desc_endpoint_t) and bmRequestType_bit
(tusb_control_request_t) in tusb_types.h to use these macros with explicit
#error fallback if undefined.
3. Add tu_le16toh() conversion in dcd_event_setup_received() for
wValue/wIndex/wLength.
Tested on CIU98320B (big-endian ARM Cortex-M, full-speed HID keyboard).
|
|
|
|
- hcd_edpt_clear_stall: use ep_addr instead of hardcoded 0 (control endpoint)
- hcd: add TUP_USBIP_FSDEV_DRD define for MCUs with host support (C0, G0, H5,
U3, U5) and use it in hcd compile guard instead of enumerating MCUs
- dcd_edpt_close_all: use FSDEV_EP_COUNT instead of CFG_TUD_ENDPPOINT_MAX for
PMA btable offset to match handle_bus_reset
- midi host tuh_midi_stream_write: add missing cable_num to system messages,
SysEx, and real-time MIDI packets. Add 0xF mask for SysEx CIN checks.
Aligns with midi_device.c tud_midi_n_stream_write implementation.
Co-Authored-By: Claude Opus 4.6 (1M context) <[email protected]>
|
|
|
|
|
|
|
|
|
|
for clarity and flexibility
|
|
|
|
|
|
remove expensive div in HWFIFO_ADDR_NEXT_N()
|
|
Add IP3516 HCD support
|
