| Age | Commit message (Collapse) | Author |
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gets triggered for ISOCHRONOUS endpoints. It is necessary for those endpoints to set the NUM_BLOCK and BLSIZE for the receiving buffer in both, USB_COUNTn_TX and USB_COUNTn_RX. Despite the datasheet showing those fields only for the USB_COUNTn_RX register
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If src is odd then src[wNBytes] is accessed.
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* Correct handling of SOF interrupt
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register on ISOCHRONOUS endpoints
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available but requested
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through lookup table. Allocation of endpoint is now only performed in dcd_edpt_open
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tu_edpt_number in the stm32 device driver as a crude tool to control mapping of the endpoint address to actual endpoint register
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TUSB_OPT_DEVICE_ENABLED still usable for backward compatible
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- implement dcd_edpt_close_all()
- reset dtoggle when open endpoint
- correct dev interrupt mask on bus reset
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correctly responded to TD 9.13 Set Configuration Test
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[PORT] Add GD32VF103 support and Sipeed Longan Nano Board support
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addresses (e.g. after plugging the device into a different port).
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