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2024-03-31minor clean uphathach
2024-03-30Code refactor.HiFiPhile
2024-03-30Flush FIFO on bus reset.HiFiPhile
2024-03-30dwc2: add endpoint allocation support.HiFiPhile
2024-02-15Do not enable the Mode mismatch interrupt source, it is not clearedChris Desjardins
If this interrupt ever hits it will result in an infinite interrupt loop as it is never cleared.
2024-02-01Merge branch 'master' into src/portable/synopsys/dwc2/fix_sof_int_handlingHiFiPhile
2024-01-10Disable ULPI clock during sleep on stm32f7 when using internal phyAlex Voinea
2023-11-22fix h7 running on fullspeed phy has issue with WFI if not disable ULPI clockhathach
2023-11-22add spec version to dwc2 infohathach
2023-11-19Fix CIHiFiPhile
2023-11-19Add dwc2 info of F429.HiFiPhile
2023-10-31dwc2 flush tx,rx fifo in dcd_init()hathach
2023-10-31usb on u5a5 hs work well with correct VBVALEXTOEN/VBVALOVAL sethathach
2023-10-31minor clean uphathach
2023-10-30minor space format dwc2 driverhathach
2023-10-30addd dwc2_info.py/md update stm32u5a5 board clock & power configure, able to ↵hathach
get passed otg clock reset
2023-10-18adding nulceo stm32u5a5, fix clock configure issuehathach
dwc2 core stuck at reset
2023-09-26Added support for USB2 HS peripheral (with integrated HS PHY) on STM32U59x chipsbac
2023-02-27synopsys/dwc2: fix SOF interrupt handlingGunar Schorcht
SOF is not a flag of the GOTGINT register but of the GINTSTS register. Therefore the flag must be written in the GINTSTS register instead of the GOTGINT register to clear the interrupt.
2023-01-11dwc2: fix IAR warnings.MasterPhi
2022-12-04Fix typosBastien Nocera
2022-10-13Add support for STM32U5 mcuLynnL4
2022-09-13re-added code in pr 1438 to fix compile with h7 with 1 usb otghathach
2022-06-29fix buid_board.py scripthathach
2022-06-24add more warning option, also fix -Wconversion with rp2040hathach
-Wuninitialized, -Wunused, -Wredundant-decls
2022-06-06more ci fixhathach
2022-06-04update all dwc2 ports to support new dynamic controller supporthathach
2022-06-03make dwc2 stm32 rhport support dynamichathach
2022-06-01Merge pull request #1454 from Iktek/bugfix_1453Ha Thach
overwrite grstctl on edpt_disable
2022-06-01grstctl set fifo + flush in one assignhathach
2022-06-01Merge pull request #1438 from Nikitarc/masterHa Thach
Update dwc2_stm32.h
2022-05-03overwrite grstctl on edpt_disablePascal Speck
2022-04-20Update dwc2_stm32.hNikitarc
Add missing #endif
2022-04-19Update dwc2_stm32.hNikitarc
Support STM32H7 with only 1 USB port: H72x / H73x / H7Ax / H7Bx
2022-03-16Fix DSTS_FNSOF in dwc2.cReinhard Panhuber
2022-03-14Merge remote-tracking branch 'upstream/add-sof-isr' into add-sof-isrReinhard Panhuber
2022-03-14Add SOF callback function for feedback value determination in uac - wip!Reinhard Panhuber
2022-03-14Merge branch 'master' into add-sof-isrHa Thach
2022-03-07added dcd_sof_enable() stubs for all other portshathach
2022-03-07Modify the wrong macro definition codeQianHao
2022-02-26add TUP_USBIP_DWC2hathach
2022-02-26more internal renamehathach
2022-02-26mcu specific renamehathach
2022-02-25rename and move dcd_attr.h to tusb_mcu_attr.hhathach
2022-02-25rename TUSB_OPT_DEVICE_ENABLED to CFG_TUD_ENABLEDhathach
TUSB_OPT_DEVICE_ENABLED still usable for backward compatible
2022-01-05Add Raspberry Pi Zero W and Zero 2 WScott Shawcroft
These are different Broadcom chips. The peripherals are essentially the same. The main differences are: * The CPU(s) * The interrupt controller * The peripheral base address (but not the peripherals that we use)
2021-11-22Merge pull request #1206 from hathach/bcm-dwc2-addressHa Thach
Bcm dwc2 address
2021-11-22use USB_OTG_GLOBAL_BASE instead of hard code valuehathach
2021-11-17clean uphathach
2021-11-15set DCFG_XCVRDLY when using external ULPI highspeed phyhathach
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