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2026-06-18dcd/ch32_usbfs: support CH32V103 combined endpoint control registerhathach
CH32V103 uses the older USBFS IP: a single combined UEPn_CTRL register per endpoint (IN response in bits [1:0], OUT response in [3:2], shared auto-toggle, separate IN/OUT toggles) instead of the separate UEPn_TX_CTRL/UEPn_RX_CTRL bytes of the newer IP (CH32V20x/V307). The shared driver was written for the newer IP, so EP0 control transfers never worked on V103: the OUT response was written to a reserved byte and the IN write clobbered the OUT bits. - ch32_usbfs_reg.h: annotate the V103 register struct with byte offsets and add a union exposing the combined UEPn_CTRL at the UEPn_TX_CTRL offset; define CH32_USBFS_EP_CTRL_COMBINED and the combined-register bit positions. - dcd_ch32_usbfs.c: abstract EP control access behind ep_tx/rx_ctrl_set() (full write) and ep_tx/rx_set_response() (response-only RMW). The newer-IP path is unchanged; the combined path read-modify-writes the single register and arms the post-SETUP data stage at DATA1. - bsp/ch32v10x: implement board_get_unique_id() (real chip UID) and drop the CSR 0x800 writes that corrupted the QingKe V3 interrupt config and left all interrupts disabled (the USB ISR never ran). Verified on ch32v103r_r1_1v0: enumerates and passes HIL for cdc_msc, hid, msc, midi, mtp, dfu, etc. Co-Authored-By: Claude Opus 4.8 (1M context) <[email protected]>
2026-05-26ch32_usbhs: fix endpoint stall length index and clear-stall responseJie Feng
Fix issue in the stall handling: - dcd_edpt_stall() for an IN endpoint cleared EP_TX_LEN(0) instead of EP_TX_LEN(ep_num), clobbering endpoint 0's transmit length register when stalling any other IN endpoint. Co-Authored-By: Claude Opus 4.7 (1M context) <[email protected]>
2026-05-23dcd/ch32x: optmize CTRL reg writing, basically revert e14b0e85HiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2026-05-23dcd/ch32hs: refactor transfer flowHiFiPhile
Refactor the driver to follow USBFS style for easier maintenance. Replace the old packet/response helpers with explicit queue and update paths for IN and OUT transfers. Introduce transfer validity tracking and per-endpoint data toggle state. Reset toggle state on init, close-all, endpoint close, clear-stall, and bus reset. Initialize endpoint controls consistently in NAK + TOG_0 mode. Tighten EP0 setup/status handling and route transfer IRQ processing through the transfer-flag path. Stop enabling ISO_ACT in INT_EN and clear unhandled interrupt flags explicitly. Signed-off-by: HiFiPhile <[email protected]>
2026-05-23dcd/ch32fs: do not set EP0 to ACK on status completeHiFiPhile
It would casue race condition, SETUP packet is always acked. Signed-off-by: HiFiPhile <[email protected]>
2026-05-23dcd/ch32fs: clear INT flag after processingHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2026-05-23dcd/ch32x : code reformatHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2026-05-23dcd/ch32fs: set EP to NAK earlier to reduce spuroius transferHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2026-05-22dcd/ch32fs: reset EP on clear stallHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2026-05-22dcd/ch32fs: fix ISO IN transferHiFiPhile
OUT is still buggy Signed-off-by: HiFiPhile <[email protected]>
2026-05-22dcd/ch32fs: only enable EP0 ACK if no data stage, reduce raceHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2026-05-22dcd/ch32fs: reset EP regs on bus resetHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2026-04-28fix(dcd_ch32_usbfs): fix dropped bulk OUT packets by properly re-arming ↵mickabrig7
EP_RX_CTRL state
2025-11-19Merge remote-tracking branch 'tinyusb/master' into ↵HiFiPhile
copilot/fix-dcd-edpt-xfer-issue Signed-off-by: HiFiPhile <[email protected]>
2025-11-17make TUP_DCD_EDPT_ISO_ALLOC i.e dcd_edpt_iso_alloc()/dcd_edpt_iso_activate() ↵hathach
as default driver implementation. dcd_edpt_close() is deprecated and will be removed from all driver in the future.
2025-10-22Apply suggestions from code reviewZixun LI
Co-authored-by: Copilot <[email protected]>
2025-10-22Add is_isr parameter to dcd_edpt_xfer and dcd_edpt_xfer_fifocopilot-swe-agent[bot]
Co-authored-by: HiFiPhile <[email protected]>
2025-10-14fix lots of warnings for missing-prototypes for irqhandlerhathach
2025-09-03use tusb_time_millis_api() instead of board_millis()hathach
make loopdelay() always inline
2025-08-24Remove dynamic memory allocationMitsumine Suzu
2025-08-24Improve retry operation at NAK response.Mitsumine Suzu
2025-08-24Insert small delay for LowSpeed deviceMitsumine Suzu
2025-08-24Small cleanups.Mitsumine Suzu
2025-07-05always define CFG_TUH_WCH_USBIP_USBFS=1 for ch32v20x since only port1 ↵hathach
support host mode reformat hcd usbfs add uart rx for ch32v20x bsp
2025-03-16Fix interupt, LowSpeed switching and renameverylowfreq
2025-03-16Update hcd_init() signature. Add osal_task_delay() implementation for none os.verylowfreq
2025-03-16Fix for timing, timeout, and device switching issuesverylowfreq
2025-03-16Fix the condition related to CFG_TUH_WCH_USBIP_USBFS macroverylowfreq
2025-03-16fix pre-commmithathach
2025-03-16Repeat xfer on USB_PID_OUT if data is larger than MaxPacketSizeverylowfreq
2025-03-16Add ch32v20x usbfs hcd initial support.verylowfreq
2025-02-06use speed enumJannis Konrad
2025-02-05ch32v3 fs: signal bus speedJannis Konrad
2024-10-14change dcd_init() return from void to boolhathach
2024-10-14change the tusb_rhport_init_t struct, exclude the rhport to make API more ↵hathach
consistent
2024-10-11change dcd_init() to take rhport structhathach
2024-06-14add ch32v103 bsp support, compile but does not run, probably due to ↵hathach
compile/linker issue
2024-06-14use stock core_riscv.h for ch32 v2 v3hathach
2024-05-24wch usbfs/usbhs need to specify which driver to use. for v307 default to ↵hathach
highspeed
2024-05-21re-add sof eventhathach
2024-05-21- minor update to ep_set_response_and_toggle/xfer_data_packethathach
- merge USBHS_ISO_ACT_FLAG, USBHS_TRANSFER_FLAG handler since they are similar - improve uart output - add note for link speed in bus reset
2024-05-21use CFG_TUD_ENDPOINT0_SIZE, rename ep0_data_in_out_buffer to simply ep0_bufferhathach
reformat indent to 2 spaces
2024-05-21fix(ch32, iso): fix iso IN transfers for CH32Denis Krasutski
2024-05-21bugfix(ch32-hs-dcd): fix ch32 DATAx managment and long packet transmissiondkrasutski
2024-05-20code formathathach
add missing MIT license
2024-05-20use correct wch usbhs, usbfs for ch32v307 using CFG_TUD_MAX_SPEEDhathach
2024-05-20temp codehathach
2024-05-19fix ep0 stall not clearingMatthew Tran
2024-05-16change default risv-gcc to riscv-none-elf- and add _zicsr extensionhathach
add cmake for ch32v20x, skip freertos examples for CH32V20X, also skip net webserver due to lack of RAM update to use openocd with wlinke adapter
2024-05-15add CH32V20x USB OTG/FS driverMatthew Tran