summaryrefslogtreecommitdiff
path: root/src/portable/wch
AgeCommit message (Collapse)Author
2025-02-05ch32v3 fs: signal bus speedJannis Konrad
2024-10-14change dcd_init() return from void to boolhathach
2024-10-14change the tusb_rhport_init_t struct, exclude the rhport to make API more ↵hathach
consistent
2024-10-11change dcd_init() to take rhport structhathach
2024-06-14add ch32v103 bsp support, compile but does not run, probably due to ↵hathach
compile/linker issue
2024-06-14use stock core_riscv.h for ch32 v2 v3hathach
2024-05-24wch usbfs/usbhs need to specify which driver to use. for v307 default to ↵hathach
highspeed
2024-05-21re-add sof eventhathach
2024-05-21- minor update to ep_set_response_and_toggle/xfer_data_packethathach
- merge USBHS_ISO_ACT_FLAG, USBHS_TRANSFER_FLAG handler since they are similar - improve uart output - add note for link speed in bus reset
2024-05-21use CFG_TUD_ENDPOINT0_SIZE, rename ep0_data_in_out_buffer to simply ep0_bufferhathach
reformat indent to 2 spaces
2024-05-21fix(ch32, iso): fix iso IN transfers for CH32Denis Krasutski
2024-05-21bugfix(ch32-hs-dcd): fix ch32 DATAx managment and long packet transmissiondkrasutski
2024-05-20code formathathach
add missing MIT license
2024-05-20use correct wch usbhs, usbfs for ch32v307 using CFG_TUD_MAX_SPEEDhathach
2024-05-20temp codehathach
2024-05-19fix ep0 stall not clearingMatthew Tran
2024-05-16change default risv-gcc to riscv-none-elf- and add _zicsr extensionhathach
add cmake for ch32v20x, skip freertos examples for CH32V20X, also skip net webserver due to lack of RAM update to use openocd with wlinke adapter
2024-05-15add CH32V20x USB OTG/FS driverMatthew Tran
2024-05-09Format.HiFiPhile
2024-05-09Merge branch 'master' into pr/2181HiFiPhile
2023-10-06feat(ch32f20x): add support of ch32f20xdenis.krasutski
2023-07-25initial add SOF supporpt to CH32V307 USB HSXelus22
2023-03-17fix trailing space and new linehathach
temporarily disable codespell
2023-01-12add dcd_remote_wakeup() stubhathach
2023-01-12rename driver with dcd_ to be consitent with other portshathach
2023-01-12add note for openocd with wch, also add wch-riscv.cfghathach
2022-03-23Clean up driverGreg Davill
2022-03-22Update comments about endpoint buffer modesGreg Davill
2022-03-22Fix typoGreg Davill
2022-03-22Add WCH CH32V307 portGreg Davill
Add WCH mcu submodule Add CH32V307V-R1-1v0 bsp
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-18 21:53:05 +0000