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2024-07-31simplify read/write 16-bit packethathach
2024-07-31fix ep type bulk typohathach
2024-07-31rename to fsdev_type.h, use FSDDEV_REG instead of USBhathach
2024-07-31refactor xfer_ctl_ptr() to take epnum/dir to reduce computationhathach
2024-07-31refactor dcd_ep_ctr_handlerhathach
2024-07-31rename to ep_read/write(), drop USBx argumenthathach
2024-07-31remove all pcd ep read, modify writehathach
2024-07-31fix ep_add_dtog()hathach
2024-07-31clean up dcd_edpt_stall/clear_statllhathach
2024-07-31improve using ep_add_status/ep_add_dtoghathach
2024-07-31enhance dcd_ep_ctr_rx_handler()hathach
2024-07-31correct ep toggle bithathach
2024-07-30add edpt0_open(), slightly update dtoghathach
2024-07-30improve set endpointhathach
2024-07-30move align buffer to pma_alloc()hathach
2024-07-30refactor btable_set_rx_bufsize()hathach
2024-07-30more btable set/get clean uphathach
2024-07-26implement btable_set_addr/counthathach
2024-07-25refactor btable tx/rx into arr[2]hathach
2024-07-25simplify btable rx/tx count/address accesshathach
2024-07-25fsdev: remove unused _setup_packethathach
2024-07-24minor changeshathach
2024-07-23fsdev read/write packet use unaligned functionhathach
2024-07-22fix a bug in fsdev introduced by #1942hathach
2024-07-17RP2040: no need to clear usb_hw (usb registers) as they are reset to default ↵Liam Fraser
state by a hardware reset
2024-07-17RP2040: Use our own unaligned memcpy to avoid alignment faults with some ↵Liam Fraser
memcpy implementations
2024-07-12simplify dwc2 test modehathach
- all dwc2 ip seems to support test mode in both fs/hs -> remove TUP_USBIP_DWC2_TEST_MODE - remove dcd_check_test_mode_support(), all should be supported - move enum tusb_feature_test_mode_t to tusb_types.h
2024-06-25Merge pull request #2686 from hathach/add-host-devinfoHa Thach
2024-06-21Merge pull request #2676 from Okarss/fsdev_documentationHa Thach
[FSDEV] Update the STM32 documentation
2024-06-20synopsys/dwc2_esp32: Add header for vTaskDelay.Andrew Leech
2024-06-18Update Host mode information for FSDEV devicesOkarss
2024-06-18LOG3 in isrhathach
2024-06-15Merge pull request #2672 from tinic/masterHa Thach
Add support for STM32U535xx/STM32U545xx
2024-06-14Update the STM32 documentationOkarss
2024-06-14Revert the DSB because of RISC-VOkarss
2024-06-14[STM32 FSDEV] Simplify toggle bit logicOkarss
2024-06-14newlinehathach
2024-06-14add ch32v103 bsp support, compile but does not run, probably due to ↵hathach
compile/linker issue
2024-06-14use stock core_riscv.h for ch32 v2 v3hathach
2024-06-12Add stm32u545nucleo board.Tinic Uro
2024-05-30Use correct backend.Tinic Uro
2024-05-29Use correct specs.Tinic Uro
2024-05-29Cleaner approach.Tinic Uro
2024-05-29Make it compile for STM32U545.Tinic Uro
2024-05-29fix xtensa_api.h includehathach
2024-05-27Merge branch 'master' into additional_dcd_sof_enableHiFiPhile
2024-05-27renesas: Add support for dcd_sof_enable().Andrew Leech
2024-05-27nrf5x: Add support for dcd_sof_enable().Andrew Leech
2024-05-27microchip samd: Add support for dcd_sof_enable().Andrew Leech
2024-05-27chipidea/mimxrt: Add support for dcd_sof_enable().Andrew Leech
generated by cgit v1.3.1 (git 2.54.0) at 2026-09-03 16:22:58 +0000