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2024-10-17get hpri triggeredhathach
2024-10-16move gahbcfg/gintmsk with dma to dwc2 commonhathach
2024-10-15move core init code to dwc2 common. update/correct build for esppressifhathach
2024-10-15adding hcd dwc2hathach
2024-10-14change dcd_init() return from void to boolhathach
2024-10-14change the tusb_rhport_init_t struct, exclude the rhport to make API more ↵hathach
consistent
2024-10-11hcd_init() take init structhathach
2024-10-11fix fuzzing buildhathach
2024-10-11change dcd_init() to take rhport structhathach
2024-10-10remove debug codehathach
2024-10-10enhance dwc2hathach
2024-10-10add f407disco to hil poolhathach
2024-10-10improving dwc2, merging diep and doep if possiblehathach
2024-10-10add stm32f769disco to hil poolhathach
2024-10-10enhance dwc2 markdown with field mappinghathach
2024-10-07Merge pull request #2809 from shuffle2/masterHa Thach
make all python files executable and standardize interpreter
2024-10-04U0 does not have dwc2 controllerhathach
2024-10-02Merge branch 'master' into fork/Maerdl/masterhathach
2024-10-01support stm32U0 deviceHaefner, Martin
2024-09-30esp32p4 use port0 as fs, port1 as highspeedhathach
2024-09-30added p4, seems to work well and enumeratedhathach
2024-09-30update/rename ghwcfg registershathach
2024-09-30update to dwc2 register structhathach
2024-09-24more renamehathach
2024-09-24add CFG_TUD_DWC2_DMA, make it compile time optionhathach
2024-09-24update dfifo allocation scheme to use top pointer, update document and ↵hathach
explanation for EPInfo address and GDFIFO. some function rename update h743 linker to use SRAM1 since USB DMA cannot access DTCM ram update xmc4500 to use uuid for testing
2024-09-17make all python files executable and standardize interpreterShawn Hoffman
2024-09-08Merge branch 'master' into dwc2_dmaHiFiPhile
2024-09-04dwc2: for esp32 force disconnect/connect using USB_WRAP otg pad override ↵hathach
(DM=DP=0) in addition to dwc2's dctrl
2024-08-30Merge pull request #2731 from cumhuronat/masterHa Thach
Fix: Properly Handle NAK Response in MAX3421E driver
2024-08-30Merge pull request #2784 from tannewt/fix_esp32_sx_resumeHa Thach
Fix ESP32-SX resume
2024-08-29Fix ESP32-SX resumeScott Shawcroft
The interrupt handler pipes through the resume event but the interrupt wasn't enabled in the first place.
2024-08-29change order, fixes #2778Reinhard Griech
2024-08-26add sndfifo owner info to skip rewriting data for retrying NAKedhathach
2024-08-23only check SNDBAV IRQ if there is data to sendCumhur Onat
2024-08-23fix for out retry attempts with nak responseCumhur Onat
2024-08-19remove weak from dcd_edpt_close() for port without TUP_DCD_EDPT_ISO_ALLOChathach
2024-08-19add hwfifo_flush()hathach
2024-08-19implement dcd_edpt_iso_alloc/dcd_edpt_iso_activate for musb. video_capture ↵hathach
example with iso kind of work but not smoothly. audio example does not seems to work as expected
2024-08-18more musb updatehathach
2024-08-17rename register bit definition to prevent conflicthathach
2024-08-17remove unused register defhathach
2024-08-17minor updatehathach
2024-08-17refactor fifo configure/setup for dynamic and static fifohathach
2024-08-17more refactor to simplify musb driverhathach
2024-08-15remove analog PHY from musb_regs_thathach
hil: remove ch32v203 since not reliable enough
2024-08-15use musb_ep_csr_t for indexed CSR, also use indexed csr for TI access as ↵hathach
well. Merge ep0 and epn together
2024-08-15update musb fifo usagehathach
2024-08-15adding universal register structs for musbhathach
2024-08-15add TUP_USBIP_MUSB macro, minor renamehathach
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