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2025-09-13ohci: Use uncached alias to access EDsR
This code is written very carefully to always use an uncached view of memory to read/write EDs. An uncached view must *always* be used, or else cache behavior can corrupt the ED. As part of this change, combine access into as few word-sized accesses as possible. This makes the code perform better. Doing this involves giving type names to the bitfields that make up the ED's data words.
2025-09-13ohci: Perform explicit cache operations on TDs, buffersR
2025-09-13ohci: Re-implement TD allocation, matching the specificationR
The initial motivation for doing this is to remove the `used` flag in the TD. If we use this flag, we end up being required to read from TDs that the OHCI controller might be modifying (i.e. the OHCI controller logically owns the TD). This happens when we try to allocate a new, empty TD while the OHCI host controller is working on a transfer. Move the `used` flag to `gtd_extra_data_t`. This data is only used by the CPU, and the OHCI controller never accesses it. The existing allocation method for TDs does *not* put an empty TD onto each ED (i.e it does *not* do what is shown in Figure 5-6 of the OHCI specification). Instead, the NextTD field of the last TD is set to 0. The TailP field of the ED is also set to 0. This works in many cases. However, this implementation means that the CPU may end up trying to write to the NextTD field of an in-progress transfer while the OHCI host controller logically owns it. Change the implementation to use an empty TD, as suggested by the specification, for endpoints other than EP0. This avoids the above issue. It is not necessary to make the change for EP0 because only at most one TD can ever be pending at a time. The above change should also remove the need for the stall workaround. In the future, we want to modify the code to access EDs through an uncached mapping. Because uncached mappings are slow, we want to access EDs as little as possible. Currently, when a TD completes, we access an ED in order to figure out the device address and endpoint number of the TD which was completed. Because moving `used` to `gtd_extra_data_t` necessitates expanding it, we have enough room to also store the device address and endpoint number of the TD. This patch does so. With the above two changes, we no longer need to access an ED when a TD completes. Also remove the `index` field from TDs as it is no longer necessary.
2025-09-12ohci: Align TDs to cache linesR
2025-09-12ohci: Add functions used for explicit cache operationsR
2025-08-05fix rp2 iso transfer: reset state before notify stack. since new audio ↵hathach
driver can execute xfer_is()
2025-08-01Merge pull request #3191 from hathach/at32Ha Thach
support at32 mcu (2)
2025-07-31clean uphathach
2025-07-28fix pre-commit, remove svd file since they are heavy and should be in ↵hathach
mcu/sdk instead add cmake support for f403a_407 and f423
2025-07-10FIx recurrent suspend ISR.HiFiPhile
2025-07-09add board_vbus_set() for samd21/d51 to enable usb host vbushathach
enable host example build for samd21/d51
2025-07-09Merge branch 'refs/heads/master' into fork/ChrisDeadman/hcd-samd-supporthathach
2025-07-07Merge pull request #2963 from HiFiPhile/stm32_cacheHa Thach
Add DWC2 cache maintenance routines for STM32
2025-07-07change CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT (not defined) to 1hathach
use stock iar linker
2025-07-07support at32 mcuzhiqiang
2025-07-05Use DMA enable for DCache conditionHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2025-07-05always define CFG_TUH_WCH_USBIP_USBFS=1 for ch32v20x since only port1 ↵hathach
support host mode reformat hcd usbfs add uart rx for ch32v20x bsp
2025-07-04Merge branch 'refs/heads/master' into fork/verylowfreq/pr-ch32v-usbfs-hosthathach
2025-06-13Add STM32 DWC2 cache supportHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2025-06-12merge n6 and h7rs (same config)hathach
2025-06-12Merge branch 'master' into fork/james-advatek/stm32n657nucleohathach
2025-06-11add h7rs to ci matrixhathach
2025-06-11Merge branch 'master' into fork/HiFiPhile/h7rshathach
2025-06-04docs: update dwc2_info.mdJames Sandison
2025-06-04chore: squash previous commits from other branchesJames Sandison
2025-05-23Merge pull request #3111 from hathach/ci_vbusHa Thach
2025-05-21add usbh_spin_lock/unlock() use spinlock instead of atomic flag for hcd max3421hathach
2025-05-21remove unused dwc2_critical.hhathach
2025-05-21add usbd_spin_lock/unlock for driver usagehathach
2025-05-21osal_spin skipping lock/unlock when executed in isrhathach
2025-05-20rename osal_critcal to osal_spinlockhathach
add spinlock implementation for most rtos
2025-05-19implement osal critical for none/freertos/pico-sdkhathach
2025-05-19dwc2 only enter critical in isr with multiple core CPUshathach
2025-05-19add osal_critical API() for use with dwc2hathach
2025-05-19fix(dcd): Fixed race condition on device disconnectTomas Rezucha
TinyUSB does not provide any locking means to protect the DCD variables. This can lead to race conditions when the user is trying to submit a transfer while the device is being disconnected. This can cause the device to be in an inconsistent state, leading to a crash or undefined behavior. This commit adds a spin-lock to protect the DCD variables during device disconnect. Closes https://github.com/espressif/esp-idf/issues/9691 Also reported in https://github.com/espressif/esp-usb/pull/131
2025-05-15Merge branch 'master' into h7rsHiFiPhile
2025-05-04dcd/ci_hs: add vbus charge option.HiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2025-04-29attach debouncing fixed issue with port1 highspeed on imxrthathach
2025-04-28usbh: add roothub debounncing flag to ignore attach/remove event on the ↵hathach
roothub that is currently doing debouncing delay
2025-04-23rename and expose tuh_bus_info_get() to applicationhathach
2025-04-23rename hcd_devtree_info_t to tuh_bus_info_t, hcd_devtree_get_info to ↵hathach
hcd_bus_info_get streamline bus info to usbh_devies, also replace dev0 (renamed to dev0_bus)
2025-04-21Merge pull request #3075 from maximevince/dwc2-proper-attach-debouncingHa Thach
dwc2/host: attach debouncing fixes
2025-04-21Merge pull request #3088 from HiFiPhile/intvHa Thach
Fix 1st nak retry one frame shorter.
2025-04-19enable SOF interrupt only if not already enabledHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2025-04-18- correctly do_ping if received nyet as transfer complete e.g msc 31 byte ↵hathach
command - correctly carry out OUT transfer when PING is ack
2025-04-18Merge branch 'master' into dwc2-proper-attach-debouncingHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2025-04-18minor renamehathach
2025-04-18Merge branch 'master' into fork/HiFiPhile/ping_outhathach
# Conflicts: # src/portable/synopsys/dwc2/hcd_dwc2.c
2025-04-18Fix 1st nak retry one frame shorter.HiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2025-04-18Merge pull request #3072 from maximevince/dwc2-retry-in-token-immediatelyHa Thach
dwc2/host: immediately retry IN token for bInterval=1