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explanation for EPInfo address and GDFIFO.
some function rename
update h743 linker to use SRAM1 since USB DMA cannot access DTCM ram
update xmc4500 to use uuid for testing
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(DM=DP=0) in addition to dwc2's dctrl
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Fix: Properly Handle NAK Response in MAX3421E driver
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Fix ESP32-SX resume
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The interrupt handler pipes through the resume event but the
interrupt wasn't enabled in the first place.
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example with iso kind of work but not smoothly. audio example does not seems to work as expected
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hil: remove ch32v203 since not reliable enough
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well. Merge ep0 and epn together
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improve hil test failed output
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EP0 OUT, which can incorrectly use queued_len of previous transfer. So reset total_len and queued_len to 0.
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without usbd consent
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fix set_rx_bufsize with invalid value for zero length packet
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- skip DIR and use CTR TX/RX to handle complete transfer
- clear CTR first, except for setup which we need to get data first
- separate handle_ctr_setup()
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hil test boards in parallel
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