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AgeCommit message (Expand)Author
2019-10-02dcd_msp430x5xx: Fix typos in dcd_edpt_clear_stall.William D. Jones
2019-10-02dcd_msp430x5xx: Ensure DBUF bit is cleared on endpoint open, as itWilliam D. Jones
2019-10-02dcd_msp430x5xx: Correct byte count masks in transmit/receive routines.William D. Jones
2019-10-01dcd_msp430x5xx: Add STALL support for nonzero endpoints.William D. Jones
2019-10-01dcd_msp430x5xx: Fix TOGGLE bit behavior, clear stall when endpointWilliam D. Jones
2019-09-29dcd_msp430x5xx: Implement receive_packet for all endpoints, correctWilliam D. Jones
2019-09-29dcd_msp430x5xx: Fix missing mask when posting IN xfer events.William D. Jones
2019-09-29dcd_msp430x5xx: Implement transmit_packet for nonzero endpoints. Untested.William D. Jones
2019-09-29Implement dcd_edpt_xfer for nonzero endpoints.William D. Jones
2019-09-29dcd_msp430x5xx: Fix clear stall logic.William D. Jones
2019-09-29dcd_msp430x5xx: Implement dcd_edpt_open.William D. Jones
2019-09-28dcd_msp430x5xx: Implement STALL logic for EP 0.William D. Jones
2019-09-28dcd_msp430x5xx: Improve EP0 IN handling (reuse short_packet field).William D. Jones
2019-09-27dcd_msp430x5xx: Implement dcd_set_address.William D. Jones
2019-09-27dcd_msp430x5xx: Implement EP0 IN xfers, clean up.William D. Jones
2019-09-27Fix typo of CFG_TUD_ENDOINT0_SIZE.Nathan Conrad
2019-09-24dcd_msp430x5xx: Fix Setup packet delay by actually enablingWilliam D. Jones
2019-09-24dcd_msp430x5xx: Setup packets are now received successfully (with delay).William D. Jones
2019-09-24msp430f5529: Change EP0 size to 8, implement interrupt logic up to busWilliam D. Jones
2019-09-23msp430f5529: Implement dcd_int_enable/disable.William D. Jones
2019-09-23msp430f5529: Enable clocks/PLL for msp_exp430f5529lp and enable USBWilliam D. Jones
2019-09-23msp430f5529: Ensure cdc_msc demo compiles.William D. Jones
2019-09-14msp430f5529: Add empty msp_exp430f5529lp BSP and DCD.William D. Jones
2019-09-11stm32f7 work with dcd synopsishathach
2019-09-11added stm32f767nucleo board, board_test workshathach
2019-09-11Merge pull request #136 from hathach/develophathach
2019-09-11fix #132hathach
2019-09-11Merge pull request #122 from cr1901/synopsyshathach
2019-09-10Rename the STM32 MCU options.Nathan Conrad
2019-09-10Remove OPT_MCU_STM for L and G series.Nathan Conrad
2019-09-10Move interrupt handler into device driver, and rename the OPT_MCU_STM32 const...Nathan Conrad
2019-09-10Fix silly typo in the F3xx support.Nathan Conrad
2019-09-10A few bug fixes, remove the unstested device notices, note supported boards ...Nathan Conrad
2019-09-09Start clock on F0 and F0, and handle USB interrupts.Nathan Conrad
2019-09-09Update F3 BSP and create F070RB BSP. Both are untested (but compile).Nathan Conrad
2019-09-09Add STM32 FSDEV driver.Nathan Conrad
2019-09-09Remove some type conversion warnings (using GCC pedantic warnings)Nathan Conrad
2019-09-09Fix typo of ENDOINTNathan Conrad
2019-09-09Remove STM32 F3 port.Nathan Conrad
2019-09-09Add dummy arguments to GET_NTH_ARG to make GCC happy (removes pedantic warnings)Nathan Conrad
2019-09-09stm32: Refactor so F4 and H7 use a single Synopsys IP source file.William D. Jones
2019-09-09dcd_stm32f4: Merge relevant changes from dcd_stm32h7.William D. Jones
2019-09-09dcd_stm32h7: Merge relevant changes from dcd_stm32f4. USB2 -> USB works as al...William D. Jones
2019-09-08enhance dcd stm32f4 to support max 4 or 6 endpoints on 407 or 412hathach
2019-09-08ported board stm32f412g discoveryhathach
2019-09-05fix #97hathach
2019-09-05Merge pull request #116 from hathach/develophathach
2019-09-0555s69 device work with usb0hathach
2019-09-05Merge pull request #114 from cr1901/stm32h7hathach
2019-09-04stm32h7: Mark USB FIFOs as volatile, otherwise optimizations will removeWilliam D. Jones