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10 daysaudio: classify feedback endpoints by protocolHiFiPHile
Use UAC1 synchronization attributes and UAC2 endpoint usage fields according to the active protocol. This prevents UAC2 audio-data IN endpoints from being mistaken for explicit feedback endpoints. Signed-off-by: HiFiPHile <[email protected]>
10 daysaudio: normalize Feature Unit volume requestsHiFiPHile
Accept the defined silence value and round ordinary volume requests to the nearest supported resolution step within the cached range. Add tests for silence, clamping, and step alignment. Signed-off-by: HiFiPHile <[email protected]>
10 daysaudio: harden streaming descriptor parsingHiFiPHile
Validate descriptor lengths before typed access, keep supported alternate settings when neighboring formats are unsupported, and reject MIDI 1.0 and 2.0 streaming interfaces from the Audio host parser. Extend parser coverage for malformed and mixed descriptor layouts. Signed-off-by: HiFiPHile <[email protected]>
10 daysaudio: allow stopped duplex streams to change rateHiFiPHile
Enforce a shared capture/playback sample rate only while the opposite stream is running. This lets both stopped streams be configured in either order while preventing a live shared clock from changing underneath a transfer. Signed-off-by: HiFiPHile <[email protected]>
10 daysaudio: reduce USB-accessible control storageHiFiPHile
Move control-transfer bookkeeping out of USB memory and overlay mount-only Clock RANGE storage with cache-aligned runtime control payload buffers. Keep explicit feedback separate because it may overlap runtime requests. Signed-off-by: HiFiPHile <[email protected]>
10 daysaudio: preserve feedback scheduler remainderHiFiPHile
Keep the fractional packet accumulator when a new explicit-feedback value is latched. Repeated feedback updates no longer bias high-speed fractional rates toward alternating undersized and oversized packets. Signed-off-by: HiFiPHile <[email protected]>
10 daysaudio: add UAC2 host streaming supportHiFiPHile
Add protocol-selectable UAC1/UAC2 parsing, UAC2 terminal and Feature Unit topology, Clock Source discovery, sampling-frequency ranges, and protocol-specific stream controls. Cover UAC2 playback, capture, control discovery, and malformed descriptors with unit tests. Signed-off-by: HiFiPHile <[email protected]>
10 daysaudio: preserve descriptor sample-rate entriesHiFiPHile
Retain every valid discrete rate in descriptor order, including duplicate public tuples. Alternate settings remain independently selectable without disruptive validation or deduplication during enumeration. Signed-off-by: HiFiPHile <[email protected]>
10 daysaudio: compact alternate-setting storageHiFiPHile
Store each Audio Streaming alternate setting once and flatten its sample rates only at the public API boundary. Keep feedback and pacing state playback-only, eliminating duplicate configuration fields from capture streams. Signed-off-by: HiFiPHile <[email protected]>
11 daysimplement explicit feeback supportHiFiPHile
Signed-off-by: HiFiPHile <[email protected]>
11 daysaddress copilot review findingsHiFiPHile
Signed-off-by: HiFiPHile <[email protected]>
12 daysMerge remote-tracking branch 'origin/master' into feature/tuh-audio-uac-1.0HiFiPHile
12 daysfeat(audio): discover stream mute and volume controlsHiFiPHile
Inspect each associated Feature Unit during mount, cache master mute support and the common MIN, MAX, and RES volume range, and ignore units with neither control. Add typed asynchronous and synchronous mute and volume APIs and demonstrate them in the host example. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): validate descriptors before parsingHiFiPHile
Check descriptor bounds, minimum lengths, frequency counts, and interface types with the host validation helpers before accessing fields. Malformed UAC1 functions now fail enumeration without out-of-bounds reads. Signed-off-by: HiFiPHile <[email protected]>
12 daysrefactor(audio): simplify class endpoint associationHiFiPHile
Keep the sampling-frequency control flag in the alternate-setting parser state shared by its single data endpoint. This supports either descriptor order without separate pending and unassigned endpoint flags. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): decode full-speed isochronous bIntervalHiFiPHile
Treat isochronous bInterval as a power-of-two exponent for both full and high speed, using the appropriate frame unit. Packet sizing and fractional scheduling now use the actual service interval. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): release instances without supported streamsHiFiPHile
Retain an audio function when at least one direction has a supported configuration, but release the tentative instance when neither direction does. Unsupported and MIDI-only functions no longer consume host slots or emit mount callbacks. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): retain multiple pending Feature UnitsHiFiPHile
Keep one unresolved Feature Unit candidate per stream direction while parsing AudioControl entities. Duplex functions are now associated correctly even when both Feature Units precede their USB terminals. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): reject unsupported UAC2 interfacesHiFiPHile
Require the UAC1 AudioControl protocol before allocating an instance. The current parser assumes UAC1 descriptor layouts, so accepting UAC2 would misinterpret entities and consume a host slot. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): keep stream state consistent on control failuresHiFiPHile
Route asynchronous activation and sampling-frequency failures through the stream error callback. Keep a running stream active when SET_INTERFACE alt 0 cannot be submitted so stop can be retried without diverging from device state. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): accept one data endpoint per AS alternateHiFiPHile
Collect one audio data endpoint for each alternate setting and ignore explicit feedback endpoints until feedback scheduling is implemented. Validate the maximum packet for every discrete rate against the endpoint, transfer buffer, and FIFO. Signed-off-by: HiFiPHile <[email protected]>
12 daysrefactor(audio): simplify UAC1 interface discoveryHiFiPHile
Parse the contiguous AudioStreaming interfaces by class and subclass instead of copying baInterfaceNr. This removes the UAC1-only collection limit and prevents MIDI AudioControl interfaces from leaving a half-allocated Audio Host instance. Signed-off-by: HiFiPHile <[email protected]>
12 daysrefactor(audio): separate stream configuration and startHiFiPHile
Make configuration a synchronous local operation that selects and opens the endpoint. Start now activates the alternate setting and sets the sampling frequency afterward, including every restart, so devices cannot reset the selected rate with SET_INTERFACE. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): drive streams from transfer completionHiFiPHile
Keep capture and playback transfers continuously armed from their completion callbacks. Capture overwrites the oldest complete frames when full, while playback sends silence on underrun without consuming partial queued audio. Signed-off-by: HiFiPHile <[email protected]>
12 daysMerge master updates into the UAC1 host branchHiFiPHile
Bring the audio work onto the current host core and build files before applying the remaining review fixes. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): resolve Feature Units independent of orderHiFiPHile
Record terminal and Feature Unit links while parsing the AudioControl block, then resolve the stream association after all entities are known. Common capture and playback descriptor orders are both supported. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): reject continuous UAC1 sample-rate rangesHiFiPHile
Collect only format descriptors with discrete sampling frequencies. The configuration API exposes concrete tuples and cannot safely represent a continuous range as one selectable rate. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): honor full-speed isochronous intervalsHiFiPHile
Convert full-speed bInterval values to the scheduler microframe timebase and size transfers for the complete service interval. Endpoints with bInterval greater than one no longer run at a one-frame cadence. Signed-off-by: HiFiPHile <[email protected]>
12 daysfeat(audio): track a Feature Unit per stream directionHiFiPHile
Associate one directly connected Feature Unit with each capture and playback stream. This lets applications control microphone and speaker paths independently. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): clear stale Feature Unit associationsHiFiPHile
Reset Feature Unit state when parsing a new audio function. Devices without a matching unit must not inherit an ID collected from an earlier interface or device. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): serialize Feature Unit requestsHiFiPHile
Keep Feature Unit request data in driver-owned storage until asynchronous completion and use the width defined for each control. This avoids overlapping request state and malformed one-byte controls. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): retain stream state when stop failsHiFiPHile
Clear the started state only after SET_INTERFACE alt 0 succeeds. A failed control transfer can then be retried instead of leaving software and device state inconsistent. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): close endpoints before stream reconfigurationHiFiPHile
Close the previously selected HCD endpoint before opening another alternate setting. This prevents stale endpoint size and controller state from surviving a format change. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): place transfer buffers in configured memoryHiFiPHile
Apply the host memory section and alignment attributes to audio transfer storage. This keeps buffers accessible to controllers that require DMA-capable memory. Signed-off-by: HiFiPHile <[email protected]>
12 daysfix(audio): distinguish data and feedback endpointsHiFiPHile
Associate UAC1 AudioStreaming endpoints by their usage type. Keep data and implicit-feedback IN endpoints as streams while leaving explicit feedback endpoints unopened until feedback scheduling is supported. Signed-off-by: HiFiPHile <[email protected]>
2026-08-21vendor: remove the obsolete host vendor driverhathach
vendor_host.c/.h implemented a CFG_TUH_VENDOR class driver that no example, board or test ever enabled: usbh's driver table entry was compiled out everywhere, and the six tusb_config.h files that mentioned the macro all set it to 0. Maintainer call - dead code, not a shrinking of supported classes. Removes the sources, the usbh driver-table entry, the CFG_TUH_VENDOR default in tusb_option.h, the tusb.h include, both build-system source lists, the rp2040 family.cmake entry and the IAR project template rows.
2026-08-19Merge pull request #3833 from hathach/claude/ci-hs-set-address-orderHa Thach
dcd(ci_hs): stage the device address before priming the status stage
2026-08-19dcd(ci_hs): stage the device address before priming the status stagehathach
IMXRT1060RM 42.7.23 and UM10503 Table 478 both ask for the DEVICEADDR write with USBADRA=1 to happen after the SET_ADDRESS data phase and before the prime of the status stage, so the controller loads USBADR from its holding register when the status stage is ACKed. The driver did it the other way round, leaving a window between the ENDPTPRIME store and the DEVICEADDR store: an IN answered inside that window ACKs with USBADRA still 0, so the holding register is never consulted and the device keeps answering on address 0 while the host has moved to the new one. Instruction timing alone cannot open that window, but dcd_set_address() runs in task context, so any interrupt landing between the two stores stretches it past a microframe. Hardware discards a staged address on a SETUP or OUT to endpoint 0 and zeroes USBADR on a bus reset, which covers a superseded SET_ADDRESS. What it cannot cover is a SETUP latched before this write and still unconsumed after the full CI_HS_BUSY_SPIN spin, which refuses the prime: condition 2 already fired for that earlier SETUP, so the stage would survive and load USBADR on the next EP0 IN ACK of an unrelated transfer. USB 2.0 9.4.6 is explicit that "the USB device does not change its device address until after the Status stage of this request is completed successfully", so the refused-prime path restores the previous USBADR rather than leaving a stage armed. Restoring the previous value rather than writing zero keeps 9.4.6's Address-state row correct, where a device already at a non-zero address must stay there; on Linux that write is always a no-op, since hub_set_address only issues SET_ADDRESS from USB_STATE_DEFAULT. Cast dev_addr before the shift: it is uint8_t, promoted to int, so an address of 64 or more reached the sign bit of a 32-bit int. No errata applies: IMXRT1060CE_A Rev 1.3 lists only ERR050101 and ERR010661 for USB, IMXRT1060CE_B Rev 1.1 only ERR010661. Validated on mimxrt1064_evk: 18/19 device+host tests, 6x usbtest 30/30, and a 100-iteration forced re-enumeration A/B that is clean on both this change and its parent (0/100 each). All 19 ci_hs boards build; unit tests 63/63; PVS drops one diagnostic (the sign-bit shift) and adds none.
2026-08-19Merge pull request #3816 from Ryzee119/ohci_gtd_fixZixun LI
ohci: fix double allocation of dummy TDs in gtd_find_free
2026-08-19ohci: defer descriptor reclaim until next frameHiFiPHile
2026-08-19Merge pull request #3830 from kasjer/kasjer/uac2-update-terminal-typesZixun LI
UAC2: Add more terminal types
2026-08-19Fix audio terminal type typosHiFiPHile
2026-08-18examples: document and work around the i.MX RT and LPC55 USB erratahathach
ERR050101: while an isochronous IN endpoint is active, an IN token addressed to that same endpoint number on ANOTHER device sharing the host can silently unprime one of this device's OUT endpoints - control, bulk, interrupt or isochronous alike. NXP states it cannot be detected by software and raises no interrupt, so the endpoint simply stops answering and the transfer never completes. The workaround is a uniqueness requirement rather than a particular number: the isochronous IN endpoint must not share its number with any IN endpoint in use on the bus. One family-wide constant therefore defeats it, since two affected boards on the same hub then pick the same number and each becomes the other's aggressor. CFG_TUSB_MIMXRT1XXX_ERRATA_ERR050101 is set only for the parts whose errata list it - RT1015, RT1020, RT1024 and RT1050, where it is marked no fix scheduled, plus RT1060 and RT1064 rev A - so RT1010 and the RT11xx family keep the ordinary number and cannot collide with an affected board beside them. Several affected boards on one hub can still be given distinct numbers with -DEPNUM_ISO_IN. The guard covers every example that has an isochronous IN endpoint: audio_test, audio_4_channel_mic, uac2_headset, cdc_uac2, usbtest, video_capture and video_capture_2ch. The video examples move the endpoint only when streaming isochronously, since the bulk configuration is unaffected, and video_capture_2ch takes two numbers because it has two streams. The macro name follows CFG_TUSB_RP2_ERRATA_E2/E4/E15 already in tree, and its is fixed, and which cannot be told apart at compile time - a way to define it to 0. device_issues.rst records ERR050101 against every affected part with a link to each errata sheet, and adds the LPC55S2x USB.3 speed-detection and USB.5 isochronous IN entries, neither of which TinyUSB works around. The branch's design notes are included under docs/superpowers. Verified: 340 wedge-free runs on mimxrt1064_evk, which previously wedged within hours, and the macro resolving to endpoint 0x87 on mimxrt1064_evk against 0x83 on mimxrt1010_evk and stm32f407disco.
2026-08-18dcd(ip3511): fix DEVCMDSTAT write-1-to-clear handling and EP0 setup raceshathach
DEVCMDSTAT mixes read/write fields with write-1-to-clear latches, so a blind read-modify-write writes a pending latch back as a one and silently clears it - a setup consumed that way strands EP0. Mask the latches on every update. The setup path follows the manual's order: acknowledge the latch, then read the payload. The EP0 IN interrupt is cleared along with EP0 OUT, as the control endpoint flowchart requires - a control IN completion latched before the setup must not reach usbd after it, where it would be applied to the request the setup just started and arm its status stage early. The payload is copied a byte at a time out of a buffer now declared volatile: the controller DMAs a new setup packet into it as soon as the latch is cleared, and C orders volatile accesses only against each other, so gcc sinks a plain memcpy below the guard read that follows at -O2 and -O3 - leaving only -Os, the level CI builds, correct.
2026-08-18usbd: handle a refused transfer without halting, and report ithathach
A refused transfer is a recoverable condition - a new setup superseding a control response, for instance - rather than a bug, but every failure path treated it as one. TU_ASSERT carries TU_BREAKPOINT, which is gated on a debugger being attached rather than on CFG_TUSB_DEBUG, so on a rig where a probe is always attached it halted the CPU even in release builds. Use TU_VERIFY on the control transfer paths, including the multi-packet data stage continuation, and drop the breakpoint from the endpoint transfer failure arm, which already marks the endpoint ready again so the next transfer can proceed. The result of usbd_control_xfer_cb() was separately dropped on the floor, leaving EP0 neither armed nor stalled and nothing recorded. It is logged now, and deliberately not stalled: a DCD refuses an EP0 prime when a newer setup is already latched, and EP0 stalls are cleared by hardware when that setup arrives, so a stall issued here would land after the auto-clear and stall the transfer that superseded this one. The pending setup re-drives EP0 by itself.
2026-08-18dcd(ci_hs): rework bus reset handling and bound the register waitshathach
A bus reset was detected only from the port change that ends it, which is late: the manual asks the DCD to clear the endpoint semaphores, cancel every prime and free the dTDs while the reset is still being driven. Enable the reset interrupt and do all of that there, in the manual's order (IMXRT1060RM 42.5.6.2.1, p.2394), including the two steps that were missing - confirming the port is still being reset, and freeing the dTDs. A failed check means the cleanup arrived late and the controller may be in an undefined state, so the manual's remedy is carried out rather than noted: a controller reset, followed by the full re-initialisation it then requires, since the reset detaches the device. The port change that ends the reset is left with what the manual gives it, the negotiated speed, which the new BUS_RESET_END event carries. A port change is classified by the interrupt that preceded it: a suspend raises no port change of its own, the resume that ends it does. Every unbounded register spin is now bounded. They waited on bits the hardware clears within a frame, but each could hang an interrupt handler outright on a controller that had stopped responding. The endpoint flush follows all three steps of IMXRT1060RM 42.5.6.6.5 (p.2413), repeating a flush the controller refuses while a packet is in progress - previously reported as success. EP0 setup handling is hardened alongside: the payload is copied out of the queue head through the volatile qualifier before ENDPTSETUPSTAT is cleared, since that clear releases the setup lockout and a back-to-back setup can overwrite the buffer immediately after, and C orders volatile accesses only against each other, so a plain memcpy may legally be sunk past the store. There is deliberately no unplug detection. IMXRT1060RM 42.7.31 (p.2470) states a zero Current Connect Status means the device "did not attach successfully or was forcibly disconnected by the software writing a zero to the Run bit ... It does not state the device being disconnected or suspended", so a cable pull raises no port change at all; VBUS via OTGSC is the manual's disconnect indicator and is board dependent. Verified on mimxrt1064_evk: 30 forced bus resets each re-enumerating at high speed with no descriptor errors, plus repeated full usbtest batteries at 30/30 across the series.
2026-08-18usbd: split bus reset into start/end edge eventshathach
A driver that can see reset signalling begin has no way to say so: the only event carries the negotiated speed, which does not exist until the reset ends. On ChipIdea that left the stack believing it was still configured for the whole reset window - 3 ms at minimum, tens of milliseconds in practice - while the controller had already torn its endpoints down, so a class driver writing in that window primed a disabled endpoint over a zeroed queue head. Add DCD_EVENT_BUS_RESET_START for the leading edge and rename the existing event to DCD_EVENT_BUS_RESET_END, keeping DCD_EVENT_BUS_RESET as an alias. START is optional and END stays self-sufficient, so every other driver and the unit tests are untouched.
2026-08-18UAC2: Add more terminal typesJerzy Kasenberg
This adds more standard terminal types that can be used in descriptors to improve end user experience when operating system can present more acurate image for audio device terminal. Signed-off-by: Jerzy Kasenberg <[email protected]>
2026-08-17Merge pull request #3790 from hathach/fix/lpc43-hfp-reliabilityHa Thach
Fix HFP HIL reliability issue
2026-08-17ohci: reclaim orphaned TDs on device disconnectRyzee119