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2023-11-01remove legacy driver st/synopsyshathach
2023-10-31Merge pull request #2300 from hathach/add-u5a5Ha Thach
Add support for stm32u5a5 (highspeed with built-in femtoPHY)
2023-10-31dwc2 flush tx,rx fifo in dcd_init()hathach
2023-10-31usb on u5a5 hs work well with correct VBVALEXTOEN/VBVALOVAL sethathach
2023-10-31minor clean uphathach
2023-10-30minor space format dwc2 driverhathach
2023-10-30addd dwc2_info.py/md update stm32u5a5 board clock & power configure, able to ↵hathach
get passed otg clock reset
2023-10-30Merge pull request #2291 from hathach/minor-update-max3421Ha Thach
minor update for max3421
2023-10-27update s3 devkitm with max3421 pin following metro s3, check max3421 version ↵hathach
to make sure it is valid
2023-10-24Update audio_4_channel_mic example for HS device.HiFiPhile
2023-10-19Merge pull request #2282 from HiFiPhile/uac_interlPanRe
UAC IN transfer improvements
2023-10-18Adjsut blackout time.Mengsk
2023-10-18adding nulceo stm32u5a5, fix clock configure issuehathach
dwc2 core stuck at reset
2023-10-18Merge pull request #2265 from bencowperthwaite/masterHa Thach
STM32U5 HS Support
2023-10-17Put sw_buf in USB section only if necessary.HiFiPhile
2023-10-17Fix compile.HiFiPhile
2023-10-17Add blackout time.HiFiPhile
2023-10-17Read sample rate directly from control transfer to eliminate callback.HiFiPhile
2023-10-17Add flow control for IN transfer.HiFiPhile
2023-10-10Fix naming nBytesPerSample.HiFiPhile
2023-10-10Merge branch 'master' of https://github.com/hathach/tinyusb into uac_interlHiFiPhile
2023-10-04change tuh_max3421_spi_xfer_api() signaturehathach
tested working with sam d21 and d51, not tested with nrf52, seem not working with esp32
2023-09-28improve esp32 ci, build esp32 with -DDMAX3421_HOST=1 for max3421 testinghathach
revert change in hcd.h
2023-09-28fix build with new freertos host examplehathach
2023-09-28fix esp32 msc examplehathach
2023-09-27Merge branch 'master' into add-max3421-esp32hathach
2023-09-27change hcd_int_handler(rhport, in_isr) signature: add in_isrhathach
change tuh_int_handler() to take in_isr as optional parameter (default = true)
2023-09-27update max3421 to have hcd_int_handler_ext()hathach
2023-09-26Added support for USB2 HS peripheral (with integrated HS PHY) on STM32U59x chipsbac
2023-09-26tested cdc_msc_hid_freertos with samd51hathach
add -Wno-error=format for espressif wrap up cdc_msc_hid_freertos
2023-09-25adding host/cdc_msc_hid_freertos examplehathach
2023-09-19Fix cast-align.HiFiPhile
2023-09-19Fix UAC interleaved copy.HiFiPhile
2023-09-18add default CFG_TUH_MAX3421 = 0, default spi speed for samd21/samd51 to 12Mhzhathach
2023-09-12Merge pull request #2245 from arduino/fix_msd_extraneus_bytes_on_readingHa Thach
Fix msd extraneus bytes on reading
2023-09-09minor renamehathach
2023-09-08wait_pipe_fifo_empty() now returns bool (as expected using TU_ASSERT macro)maidnl
2023-09-08renesas: added wait function for IN transactionmaidnl
This fixes a problem found on MSD class where data read from from disks were sometimes partially overwritten by the status MSD message ("USBS..."). The function introduced wait for the hw fifo pipe to be empty, that prevent that new writing in the fife overwrite data which are not yet be transmitted by hw.
2023-09-07- wrap up hcd max3421, work well with nrf52840hathach
- also add usbh_defer_func()
2023-09-06minor debug clean uphathach
2023-08-31vastly improve attach/detach device, still have issue where thing is still ↵hathach
hanged occasionally.
2023-08-31improve connection & disconnection detection. But there is still issue when ↵hathach
CONDETIRQ occurs but we are disabled interrupt (for osal queue access).
2023-08-30use ep buf to keep setup packet, work well with hid devicehathach
2023-08-30call xfer_complete_isr() when result is not successful (stalled or failed)hathach
2023-08-29- hcd_setup_send() also check for busy flaghathach
- xact_inout() to support send setup
2023-08-29- correct tuh_max3421e_int_api() for nrf52hathach
- hcd_int_disable/enable is software only to reduce interrupt lag
2023-08-28- add xfer_complete_isr()hathach
- merge addr0 ep to pool - add control status to xact in/out - use atomic flag busy to ensure only 1 transfer is active at any time - execute pending transfer after one is complete (or clear busy flag) - change rtt mode to block if full
2023-08-27more update to transactionhathach
2023-08-25try next endpoint when received NAKhathach
2023-08-25add xact_out(), xact_in() to manage transferhathach