From e69494d94a680c7b5aa5310338c206921d57640b Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 9 Jan 2026 10:47:50 +0700 Subject: fix pre-commit, clean up tusb_mcu.h, add at32f45x to ci build --- .github/workflows/ci_set_matrix.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to '.github/workflows') diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py index c276d5253..237a34b9f 100755 --- a/.github/workflows/ci_set_matrix.py +++ b/.github/workflows/ci_set_matrix.py @@ -15,7 +15,8 @@ toolchain_list = [ # family: [supported toolchain] family_list = { - "at32f402_405 at32f403a_407 at32f413 at32f415 at32f423 at32f425 at32f435_437 broadcom_32bit da1469x": ["arm-gcc"], + "at32f45x at32f402_405 at32f403a_407 at32f413 at32f415 at32f423 at32f425 at32f435_437 broadcom_32bit da1469x": [ + "arm-gcc"], "broadcom_64bit": ["aarch64-gcc"], "ch32v10x ch32v20x ch32v30x fomu gd32vf103 hpmicro": ["riscv-gcc"], "imxrt": ["arm-gcc", "arm-clang"], -- cgit v1.3.1 From 0d28bdc27f90ab5e77576e5e28f55349b36abd24 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 13 Jan 2026 16:33:14 +0700 Subject: minor clean up separate tud_mtp_data_send() and tud_mtp_data_receive() --- .github/workflows/ci_set_matrix.py | 3 ++- test/hil/hil_test.py | 14 +++++++------- 2 files changed, 9 insertions(+), 8 deletions(-) (limited to '.github/workflows') diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py index 237a34b9f..9ab08601d 100755 --- a/.github/workflows/ci_set_matrix.py +++ b/.github/workflows/ci_set_matrix.py @@ -38,7 +38,8 @@ family_list = { "stm32h7": ["arm-gcc", "arm-clang", "arm-iar"], "stm32h7rs stm32l0 stm32l4": ["arm-gcc", "arm-clang", "arm-iar"], "stm32n6": ["arm-gcc"], - "stm32u0 stm32u5 stm32wb stm32wba": ["arm-gcc", "arm-clang", "arm-iar"], + "stm32u0 stm32wb stm32wba": ["arm-gcc", "arm-clang", "arm-iar"], + "stm32u5": ["arm-gcc", "arm-clang", "arm-iar"], "-bespressif_s2_devkitc": ["esp-idf"], # S3, P4 will be built by hil test # "-bespressif_s3_devkitm": ["esp-idf"], diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py index dfea9612f..f742bbca2 100755 --- a/test/hil/hil_test.py +++ b/test/hil/hil_test.py @@ -617,13 +617,13 @@ def test_device_mtp(board): # device tests # note don't test 2 examples with cdc or 2 msc next to each other device_tests = [ - # 'device/cdc_dual_ports', - # 'device/dfu', - # 'device/cdc_msc', - # 'device/dfu_runtime', - # 'device/cdc_msc_freertos', - # 'device/hid_boot_interface', - 'device/mtp' + 'device/cdc_dual_ports', + 'device/dfu', + 'device/cdc_msc', + 'device/dfu_runtime', + 'device/cdc_msc_freertos', + 'device/hid_boot_interface', + # 'device/mtp' ] dual_tests = [ -- cgit v1.3.1 From 9a731e03e89e5e9ba530354fdfe4829b4cc0a8cf Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 14 Jan 2026 13:06:49 +0700 Subject: correct dual port hil assert --- .github/workflows/build.yml | 2 +- test/hil/hil_test.py | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to '.github/workflows') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 781d3b002..bb8c6d65d 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -315,7 +315,7 @@ jobs: run: python3 tools/get_deps.py $BUILD_ARGS - name: Build - run: python3 tools/build.py -j 4 --toolchain iar $BUILD_ARGS + run: python3 tools/build.py --toolchain iar $BUILD_ARGS - name: Test on actual hardware (hardware in the loop) run: python3 test/hil/hil_test.py hfp.json diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py index f742bbca2..b84740867 100755 --- a/test/hil/hil_test.py +++ b/test/hil/hil_test.py @@ -410,22 +410,22 @@ def test_device_cdc_dual_ports(board): sizes = [32, 64, 128, 256, 512, random.randint(2000, 5000)] def write_and_check(writer, payload): - size = len(payload) + payload_len = len(payload) for s in ser: s.reset_input_buffer() rd0 = b'' rd1 = b'' offset = 0 # Write in chunks of random 1-64 bytes (device has 64-byte buffer) - while offset < size: - chunk_size = min(random.randint(1, 64), size - offset) + while offset < payload_len: + chunk_size = min(random.randint(1, 64), payload_len - offset) ser[writer].write(payload[offset:offset + chunk_size]) ser[writer].flush() rd0 += ser[0].read(chunk_size) rd1 += ser[1].read(chunk_size) offset += chunk_size - assert rd0 == payload.lower(), f'Port0 wrong data ({size}): expected {payload.lower()[:16]}... was {rd0[:16]}' - assert rd1 == payload.upper(), f'Port1 wrong data ({size}): expected {payload.upper()[:16]}... was {rd1[:16]}' + assert rd0 == payload.lower(), f'Port0 wrong data ({payload_len}): expected {payload.lower()}... was {rd0}' + assert rd1 == payload.upper(), f'Port1 wrong data ({payload_len}): expected {payload.upper()}... was {rd1}' for size in sizes: payload0 = rand_ascii(size) -- cgit v1.3.1