From b62ac586501c43c61f21c0fca67dca437ff3a9dc Mon Sep 17 00:00:00 2001
From: UMRnInside <30196401+UMRnInside@users.noreply.github.com>
Date: Sun, 26 Apr 2026 20:35:54 +0800
Subject: Fix CH32V103 hardfault on startup

---
 hw/bsp/ch32v10x/family.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index 72dae7086..9943bf856 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -67,7 +67,10 @@ uint32_t tusb_time_millis_api(void) {
 #endif
 
 void board_init(void) {
-  __disable_irq();
+  /* __disable_irq() in CH32V103 EVT attempts to call
+   * `csrc mstatus, 0x88` in U-mode, which is allowed ONLY in M-mode.
+   * Disable this to avoid hard-fault. */
+  //__disable_irq();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(SystemCoreClock / 1000);
@@ -123,7 +126,7 @@ void board_init(void) {
   USART_Init(USART1, &usart);
   USART_Cmd(USART1, ENABLE);
 
-  __enable_irq();
+  //__enable_irq();
 
   board_led_write(true);
 }
-- 
cgit v1.3.1


From 2eb1599b4d5e773b71135d82d71e9b422935a410 Mon Sep 17 00:00:00 2001
From: UMRnInside <30196401+UMRnInside@users.noreply.github.com>
Date: Sun, 26 Apr 2026 20:36:55 +0800
Subject: Add ch32v103c_bluepill board

---
 .../ch32v10x/boards/ch32v103c_bluepill/board.cmake |  8 +++++++
 hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h  | 27 ++++++++++++++++++++++
 hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.mk |  5 ++++
 3 files changed, 40 insertions(+)
 create mode 100644 hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.cmake
 create mode 100644 hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h
 create mode 100644 hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.mk

diff --git a/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.cmake b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.cmake
new file mode 100644
index 000000000..f6e47ba30
--- /dev/null
+++ b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.cmake
@@ -0,0 +1,8 @@
+set(LD_FLASH_SIZE 64K)
+set(LD_RAM_SIZE 20K)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CFG_EXAMPLE_MSC_DUAL_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h
new file mode 100644
index 000000000..02558b953
--- /dev/null
+++ b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h
@@ -0,0 +1,27 @@
+/* Some chinese manufactors use CH32V103C8T6 to make Bluepill boards
+ */
+/* metadata:
+   name: CH32V103C8T6-Bluepill
+   url: https://stm32-base.org/boards/STM32F103C8T6-Blue-Pill
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LED_PORT            GPIOC
+#define LED_PIN             GPIO_Pin_13
+#define LED_STATE_ON        0
+
+#define BUTTON_PORT         GPIOA
+#define BUTTON_PIN          GPIO_Pin_1
+#define BUTTON_STATE_ACTIVE 1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.mk b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.mk
new file mode 100644
index 000000000..e594f42a7
--- /dev/null
+++ b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.mk
@@ -0,0 +1,5 @@
+CFLAGS += -DCFG_EXAMPLE_MSC_DUAL_READONLY
+
+LDFLAGS += \
+  -Wl,--defsym=__FLASH_SIZE=64K \
+  -Wl,--defsym=__RAM_SIZE=20K \
-- 
cgit v1.3.1


From 3adb63e62a6c7dbc854a72049aa23537a51fabc5 Mon Sep 17 00:00:00 2001
From: UMRnInside <30196401+UMRnInside@users.noreply.github.com>
Date: Sun, 24 May 2026 09:27:32 +0800
Subject: Fix typo found by Copilot

chinese -> Chinese
manufactors -> manufacturers

Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>
---
 hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h
index 02558b953..3a97b44d6 100644
--- a/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h
+++ b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h
@@ -1,4 +1,4 @@
-/* Some chinese manufactors use CH32V103C8T6 to make Bluepill boards
+/* Some Chinese manufacturers use CH32V103C8T6 to make Bluepill boards
  */
 /* metadata:
    name: CH32V103C8T6-Bluepill
-- 
cgit v1.3.1


From 972670aed49d3efd31b6211aa40c33d550cfa3ad Mon Sep 17 00:00:00 2001
From: UMRnInside <30196401+UMRnInside@users.noreply.github.com>
Date: Sun, 24 May 2026 10:00:06 +0800
Subject: use vendor-specific CSR 0x800 to toggle IRQ

---
 hw/bsp/ch32v10x/family.c | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index 9943bf856..6d52227d5 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -66,11 +66,26 @@ uint32_t tusb_time_millis_api(void) {
 }
 #endif
 
+// 0x800 CSR register is writable in U-mode
+// according to manual: https://www.wch-ic.com/downloads/QingKeV3_Processor_Manual_PDF.html
+__attribute__((always_inline)) RV_STATIC_INLINE
+void __wch_vendor_enable_irq()
+{
+  __asm volatile ("csrs 0x800, %0" : : "r" (0x88) );
+}
+
+__attribute__((always_inline)) RV_STATIC_INLINE
+void __wch_vendor_disable_irq()
+{
+  __asm volatile ("csrc 0x800, %0" : : "r" (0x88) );
+  __asm volatile ("fence.i");
+}
+
 void board_init(void) {
   /* __disable_irq() in CH32V103 EVT attempts to call
    * `csrc mstatus, 0x88` in U-mode, which is allowed ONLY in M-mode.
    * Disable this to avoid hard-fault. */
-  //__disable_irq();
+  __wch_vendor_disable_irq();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(SystemCoreClock / 1000);
@@ -126,7 +141,7 @@ void board_init(void) {
   USART_Init(USART1, &usart);
   USART_Cmd(USART1, ENABLE);
 
-  //__enable_irq();
+  __wch_vendor_enable_irq();
 
   board_led_write(true);
 }
-- 
cgit v1.3.1


From e7d59fba3506d2ae0d60f4c019153e1d9d349262 Mon Sep 17 00:00:00 2001
From: UMRnInside <30196401+UMRnInside@users.noreply.github.com>
Date: Sun, 24 May 2026 10:21:41 +0800
Subject: Fix missing prototype in ch32v10x bsp

---
 hw/bsp/ch32v10x/family.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index 6d52227d5..8eec9f4a1 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -69,13 +69,13 @@ uint32_t tusb_time_millis_api(void) {
 // 0x800 CSR register is writable in U-mode
 // according to manual: https://www.wch-ic.com/downloads/QingKeV3_Processor_Manual_PDF.html
 __attribute__((always_inline)) RV_STATIC_INLINE
-void __wch_vendor_enable_irq()
+void __wch_vendor_enable_irq(void)
 {
   __asm volatile ("csrs 0x800, %0" : : "r" (0x88) );
 }
 
 __attribute__((always_inline)) RV_STATIC_INLINE
-void __wch_vendor_disable_irq()
+void __wch_vendor_disable_irq(void)
 {
   __asm volatile ("csrc 0x800, %0" : : "r" (0x88) );
   __asm volatile ("fence.i");
@@ -84,7 +84,7 @@ void __wch_vendor_disable_irq()
 void board_init(void) {
   /* __disable_irq() in CH32V103 EVT attempts to call
    * `csrc mstatus, 0x88` in U-mode, which is allowed ONLY in M-mode.
-   * Disable this to avoid hard-fault. */
+   * Replace this with CSR 0x800 to avoid hard-fault. */
   __wch_vendor_disable_irq();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
-- 
cgit v1.3.1


From 97d84e0fd597b2d9362e47897c98c9b5ed9c6fdc Mon Sep 17 00:00:00 2001
From: UMRnInside <30196401+UMRnInside@users.noreply.github.com>
Date: Tue, 26 May 2026 22:52:30 +0800
Subject: Enable GPIOC for CH32V103 bluepill boards

---
 hw/bsp/ch32v10x/family.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index 8eec9f4a1..9f5dc5572 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -92,6 +92,7 @@ void board_init(void) {
 #endif
 
   RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
 
   EXTEN->EXTEN_CTR |= EXTEN_USBFS_IO_EN;
   uint8_t usb_div;
-- 
cgit v1.3.1