From 803d06d6856564761b1e1864f4a90562510795de Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 1 Sep 2019 14:51:40 +0700 Subject: clean up --- hw/bsp/lpcxpresso51u68/board.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk index 83ad1d360..238e723ba 100644 --- a/hw/bsp/lpcxpresso51u68/board.mk +++ b/hw/bsp/lpcxpresso51u68/board.mk @@ -6,7 +6,7 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \ -DCPU_LPC51U68JBD64 \ -Wfatal-errors \ - -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ + -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' # All source paths should be relative to the top level. -- cgit v1.3.1 From a5a768e5f7b6d0c589259718da598318b4d9f127 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 1 Sep 2019 14:58:36 +0700 Subject: update lpc51u68 linker --- hw/bsp/lpcxpresso51u68/LPC51U68_flash.ld | 200 ----------- hw/bsp/lpcxpresso51u68/board.mk | 6 +- hw/bsp/lpcxpresso51u68/startup_LPC51U68.S | 536 ------------------------------ hw/mcu/nxp/lpc_driver | 2 +- 4 files changed, 4 insertions(+), 740 deletions(-) delete mode 100644 hw/bsp/lpcxpresso51u68/LPC51U68_flash.ld delete mode 100644 hw/bsp/lpcxpresso51u68/startup_LPC51U68.S diff --git a/hw/bsp/lpcxpresso51u68/LPC51U68_flash.ld b/hw/bsp/lpcxpresso51u68/LPC51U68_flash.ld deleted file mode 100644 index 89b46c692..000000000 --- a/hw/bsp/lpcxpresso51u68/LPC51U68_flash.ld +++ /dev/null @@ -1,200 +0,0 @@ -/* -** ################################################################### -** Processors: LPC51U68JBD48 -** LPC51U68JBD64 -** -** Compiler: GNU C Compiler -** Reference manual: LPC51U68 User manual User manual Rev. 1.0 13 Dec 2017 -** Version: rev. 1.0, 2017-12-15 -** Build: b180801 -** -** Abstract: -** Linker file for the GNU C Compiler -** -** Copyright 2016 Freescale Semiconductor, Inc. -** Copyright 2016-2018 NXP -** -** SPDX-License-Identifier: BSD-3-Clause -** -** http: www.nxp.com -** mail: support@nxp.com -** -** ################################################################### -*/ - - - -/* Entry Point */ -ENTRY(Reset_Handler) - -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; -STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800; - -/* Specify the memory areas */ -MEMORY -{ - m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x000000E0 - m_text (RX) : ORIGIN = 0x000000E0, LENGTH = 0x0003FF20 - m_data_sramx (RW) : ORIGIN = 0x04000000, LENGTH = 0x00008000 - m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00010000 -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into internal flash */ - .interrupts : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } > m_interrupts - - /* The program code and other data goes into internal flash */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - KEEP (*(.init)) - KEEP (*(.fini)) - . = ALIGN(4); - } > m_text - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > m_text - - .ARM : - { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } > m_text - - .ctors : - { - __CTOR_LIST__ = .; - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. Because this is a wildcard, it - doesn't matter if the user does not - actually link against crtbegin.o; the - linker won't look for a file to match a - wildcard. The wildcard also means that it - doesn't matter which directory crtbegin.o - is in. */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*crtbegin?.o(.ctors)) - /* We don't want to include the .ctor section from - from the crtend.o file until after the sorted ctors. - The .ctor section from the crtend file contains the - end of ctors marker and it must be last */ - KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - __CTOR_END__ = .; - } > m_text - - .dtors : - { - __DTOR_LIST__ = .; - KEEP (*crtbegin.o(.dtors)) - KEEP (*crtbegin?.o(.dtors)) - KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - __DTOR_END__ = .; - } > m_text - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } > m_text - - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } > m_text - - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(SORT(.fini_array.*))) - KEEP (*(.fini_array*)) - PROVIDE_HIDDEN (__fini_array_end = .); - } > m_text - - __etext = .; /* define a global symbol at end of code */ - __DATA_ROM = .; /* Symbol is used by startup for data initialization */ - - .data : AT(__DATA_ROM) - { - . = ALIGN(4); - __DATA_RAM = .; - __data_start__ = .; /* create a global symbol at data start */ - *(.ramfunc*) /* for functions in ram */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - KEEP(*(.jcr*)) - . = ALIGN(4); - __data_end__ = .; /* define a global symbol at data end */ - } > m_data - - __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); - text_end = ORIGIN(m_text) + LENGTH(m_text); - ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") - - /* Uninitialized data section */ - .bss : - { - /* This is used by the startup in order to initialize the .bss section */ - . = ALIGN(4); - __START_BSS = .; - __bss_start__ = .; - *(.bss) - *(.bss*) - *(COMMON) - . = ALIGN(4); - __bss_end__ = .; - __END_BSS = .; - } > m_data - - .heap : - { - . = ALIGN(8); - __end__ = .; - PROVIDE(end = .); - __HeapBase = .; - . += HEAP_SIZE; - __HeapLimit = .; - __heap_limit = .; /* Add for _sbrk */ - } > m_data_sramx - - .stack : - { - . = ALIGN(8); - . += STACK_SIZE; - } > m_data_sramx - - /* Initializes stack on the end of block */ - __StackTop = ORIGIN(m_data_sramx) + LENGTH(m_data_sramx); - __StackLimit = __StackTop - STACK_SIZE; - PROVIDE(__stack = __StackTop); - - .ARM.attributes 0 : { *(.ARM.attributes) } - - ASSERT(__StackLimit >= __HeapLimit, "region m_data_sramx overflowed with stack and heap") -} - diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk index 238e723ba..9a927918e 100644 --- a/hw/bsp/lpcxpresso51u68/board.mk +++ b/hw/bsp/lpcxpresso51u68/board.mk @@ -10,7 +10,7 @@ CFLAGS += \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' # All source paths should be relative to the top level. -LD_FILE = hw/bsp/lpcxpresso51u68/LPC51U68_flash.ld +LD_FILE = hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68/gcc/LPC51U68_flash.ld SRC_C += \ hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68/system_LPC51U68.c \ @@ -24,9 +24,9 @@ INC += \ $(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68 \ $(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/drivers -SRC_S += hw/bsp/lpcxpresso51u68/startup_LPC51U68.S +SRC_S += hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68/gcc/startup_LPC51U68.S -LIBS += $(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68/libpower.a +LIBS += $(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68/gcc/libpower.a # For TinyUSB port source VENDOR = nxp diff --git a/hw/bsp/lpcxpresso51u68/startup_LPC51U68.S b/hw/bsp/lpcxpresso51u68/startup_LPC51U68.S deleted file mode 100644 index 81a6f320e..000000000 --- a/hw/bsp/lpcxpresso51u68/startup_LPC51U68.S +++ /dev/null @@ -1,536 +0,0 @@ -/* --------------------------------------------------------------------------*/ -/* @file: startup_LPC51U68.S */ -/* @purpose: CMSIS Cortex-M0+ Core Device Startup File */ -/* LPC51U68 */ -/* @version: 1.0 */ -/* @date: 2017-12-15 */ -/* --------------------------------------------------------------------------*/ -/* */ -/* Copyright 1997-2016 Freescale Semiconductor, Inc. */ -/* Copyright 2016-2018 NXP */ -/* */ -/* SPDX-License-Identifier: BSD-3-Clause */ -/*****************************************************************************/ -/* Version: GCC for ARM Embedded Processors */ -/*****************************************************************************/ - - - .syntax unified - .arch armv6-m - - .section .isr_vector, "a" - .align 2 - .globl __Vectors -__Vectors: - .long __StackTop /* Top of Stack */ - .long Reset_Handler /* Reset Handler */ - .long NMI_Handler /* NMI Handler */ - .long HardFault_Handler /* Hard Fault Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long SVC_Handler /* SVCall Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long PendSV_Handler /* PendSV Handler */ - .long SysTick_Handler /* SysTick Handler */ - - /* External Interrupts */ - .long WDT_BOD_IRQHandler /* Windowed watchdog timer, Brownout detect */ - .long DMA0_IRQHandler /* DMA controller */ - .long GINT0_IRQHandler /* GPIO group 0 */ - .long GINT1_IRQHandler /* GPIO group 1 */ - .long PIN_INT0_IRQHandler /* Pin interrupt 0 or pattern match engine slice 0 */ - .long PIN_INT1_IRQHandler /* Pin interrupt 1or pattern match engine slice 1 */ - .long PIN_INT2_IRQHandler /* Pin interrupt 2 or pattern match engine slice 2 */ - .long PIN_INT3_IRQHandler /* Pin interrupt 3 or pattern match engine slice 3 */ - .long UTICK0_IRQHandler /* Micro-tick Timer */ - .long MRT0_IRQHandler /* Multi-rate timer */ - .long CTIMER0_IRQHandler /* Standard counter/timer CTIMER0 */ - .long CTIMER1_IRQHandler /* Standard counter/timer CTIMER1 */ - .long SCT0_IRQHandler /* SCTimer/PWM */ - .long CTIMER3_IRQHandler /* Standard counter/timer CTIMER3 */ - .long FLEXCOMM0_IRQHandler /* Flexcomm Interface 0 (USART, SPI, I2C) */ - .long FLEXCOMM1_IRQHandler /* Flexcomm Interface 1 (USART, SPI, I2C) */ - .long FLEXCOMM2_IRQHandler /* Flexcomm Interface 2 (USART, SPI, I2C) */ - .long FLEXCOMM3_IRQHandler /* Flexcomm Interface 3 (USART, SPI, I2C) */ - .long FLEXCOMM4_IRQHandler /* Flexcomm Interface 4 (USART, SPI, I2C) */ - .long FLEXCOMM5_IRQHandler /* Flexcomm Interface 5 (USART, SPI, I2C) */ - .long FLEXCOMM6_IRQHandler /* Flexcomm Interface 6 (USART, SPI, I2C, I2S) */ - .long FLEXCOMM7_IRQHandler /* Flexcomm Interface 7 (USART, SPI, I2C, I2S) */ - .long ADC0_SEQA_IRQHandler /* ADC0 sequence A completion. */ - .long ADC0_SEQB_IRQHandler /* ADC0 sequence B completion. */ - .long ADC0_THCMP_IRQHandler /* ADC0 threshold compare and error. */ - .long Reserved41_IRQHandler /* Reserved interrupt */ - .long Reserved42_IRQHandler /* Reserved interrupt */ - .long USB0_NEEDCLK_IRQHandler /* USB Activity Wake-up Interrupt */ - .long USB0_IRQHandler /* USB device */ - .long RTC_IRQHandler /* RTC alarm and wake-up interrupts */ - .long Reserved46_IRQHandler /* Reserved interrupt */ - .long Reserved47_IRQHandler /* Reserved interrupt */ - - .size __Vectors, . - __Vectors - - .text - .thumb - -/* Reset Handler */ - .thumb_func - .align 2 - .globl Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - cpsid i /* Mask interrupts */ - -#ifndef __NO_SYSTEM_INIT - ldr r0,=SystemInit - blx r0 -#endif -/* Loop to copy data from read only memory to RAM. The ranges - * of copy from/to are specified by following symbols evaluated in - * linker script. - * __etext: End of code section, i.e., begin of data sections to copy from. - * __data_start__/__data_end__: RAM address range that data should be - * copied to. Both must be aligned to 4 bytes boundary. */ - - ldr r1, =__etext - ldr r2, =__data_start__ - ldr r3, =__data_end__ - - subs r3, r2 - ble .LC0 - -.LC1: - subs r3, 4 - ldr r0, [r1,r3] - str r0, [r2,r3] - bgt .LC1 -.LC0: - -#ifdef __STARTUP_CLEAR_BSS -/* This part of work usually is done in C library startup code. Otherwise, - * define this macro to enable it in this startup. - * - * Loop to zero out BSS section, which uses following symbols - * in linker script: - * __bss_start__: start of BSS section. Must align to 4 - * __bss_end__: end of BSS section. Must align to 4 - */ - ldr r1, =__bss_start__ - ldr r2, =__bss_end__ - - subs r2, r1 - ble .LC3 - - movs r0, 0 -.LC2: - str r0, [r1, r2] - subs r2, 4 - bge .LC2 -.LC3: -#endif - cpsie i /* Unmask interrupts */ - -#ifndef __START -#define __START _start -#endif -#ifndef __ATOLLIC__ - ldr r0,=__START - blx r0 -#else - ldr r0,=__libc_init_array - blx r0 - ldr r0,=main - bx r0 -#endif - .pool - .size Reset_Handler, . - Reset_Handler - - .align 1 - .thumb_func - .weak DefaultISR - .type DefaultISR, %function -DefaultISR: - ldr r0, =DefaultISR - bx r0 - .size DefaultISR, . - DefaultISR - - .align 1 - .thumb_func - .weak NMI_Handler - .type NMI_Handler, %function -NMI_Handler: - ldr r0,=NMI_Handler - bx r0 - .size NMI_Handler, . - NMI_Handler - - .align 1 - .thumb_func - .weak HardFault_Handler - .type HardFault_Handler, %function -HardFault_Handler: - ldr r0,=HardFault_Handler - bx r0 - .size HardFault_Handler, . - HardFault_Handler - - .align 1 - .thumb_func - .weak SVC_Handler - .type SVC_Handler, %function -SVC_Handler: - ldr r0,=SVC_Handler - bx r0 - .size SVC_Handler, . - SVC_Handler - - .align 1 - .thumb_func - .weak PendSV_Handler - .type PendSV_Handler, %function -PendSV_Handler: - ldr r0,=PendSV_Handler - bx r0 - .size PendSV_Handler, . - PendSV_Handler - - .align 1 - .thumb_func - .weak SysTick_Handler - .type SysTick_Handler, %function -SysTick_Handler: - ldr r0,=SysTick_Handler - bx r0 - .size SysTick_Handler, . - SysTick_Handler - - .align 1 - .thumb_func - .weak WDT_BOD_IRQHandler - .type WDT_BOD_IRQHandler, %function -WDT_BOD_IRQHandler: - ldr r0,=WDT_BOD_DriverIRQHandler - bx r0 - .size WDT_BOD_IRQHandler, . - WDT_BOD_IRQHandler - - .align 1 - .thumb_func - .weak DMA0_IRQHandler - .type DMA0_IRQHandler, %function -DMA0_IRQHandler: - ldr r0,=DMA0_DriverIRQHandler - bx r0 - .size DMA0_IRQHandler, . - DMA0_IRQHandler - - .align 1 - .thumb_func - .weak GINT0_IRQHandler - .type GINT0_IRQHandler, %function -GINT0_IRQHandler: - ldr r0,=GINT0_DriverIRQHandler - bx r0 - .size GINT0_IRQHandler, . - GINT0_IRQHandler - - .align 1 - .thumb_func - .weak GINT1_IRQHandler - .type GINT1_IRQHandler, %function -GINT1_IRQHandler: - ldr r0,=GINT1_DriverIRQHandler - bx r0 - .size GINT1_IRQHandler, . - GINT1_IRQHandler - - .align 1 - .thumb_func - .weak PIN_INT0_IRQHandler - .type PIN_INT0_IRQHandler, %function -PIN_INT0_IRQHandler: - ldr r0,=PIN_INT0_DriverIRQHandler - bx r0 - .size PIN_INT0_IRQHandler, . - PIN_INT0_IRQHandler - - .align 1 - .thumb_func - .weak PIN_INT1_IRQHandler - .type PIN_INT1_IRQHandler, %function -PIN_INT1_IRQHandler: - ldr r0,=PIN_INT1_DriverIRQHandler - bx r0 - .size PIN_INT1_IRQHandler, . - PIN_INT1_IRQHandler - - .align 1 - .thumb_func - .weak PIN_INT2_IRQHandler - .type PIN_INT2_IRQHandler, %function -PIN_INT2_IRQHandler: - ldr r0,=PIN_INT2_DriverIRQHandler - bx r0 - .size PIN_INT2_IRQHandler, . - PIN_INT2_IRQHandler - - .align 1 - .thumb_func - .weak PIN_INT3_IRQHandler - .type PIN_INT3_IRQHandler, %function -PIN_INT3_IRQHandler: - ldr r0,=PIN_INT3_DriverIRQHandler - bx r0 - .size PIN_INT3_IRQHandler, . - PIN_INT3_IRQHandler - - .align 1 - .thumb_func - .weak UTICK0_IRQHandler - .type UTICK0_IRQHandler, %function -UTICK0_IRQHandler: - ldr r0,=UTICK0_DriverIRQHandler - bx r0 - .size UTICK0_IRQHandler, . - UTICK0_IRQHandler - - .align 1 - .thumb_func - .weak MRT0_IRQHandler - .type MRT0_IRQHandler, %function -MRT0_IRQHandler: - ldr r0,=MRT0_DriverIRQHandler - bx r0 - .size MRT0_IRQHandler, . - MRT0_IRQHandler - - .align 1 - .thumb_func - .weak CTIMER0_IRQHandler - .type CTIMER0_IRQHandler, %function -CTIMER0_IRQHandler: - ldr r0,=CTIMER0_DriverIRQHandler - bx r0 - .size CTIMER0_IRQHandler, . - CTIMER0_IRQHandler - - .align 1 - .thumb_func - .weak CTIMER1_IRQHandler - .type CTIMER1_IRQHandler, %function -CTIMER1_IRQHandler: - ldr r0,=CTIMER1_DriverIRQHandler - bx r0 - .size CTIMER1_IRQHandler, . - CTIMER1_IRQHandler - - .align 1 - .thumb_func - .weak SCT0_IRQHandler - .type SCT0_IRQHandler, %function -SCT0_IRQHandler: - ldr r0,=SCT0_DriverIRQHandler - bx r0 - .size SCT0_IRQHandler, . - SCT0_IRQHandler - - .align 1 - .thumb_func - .weak CTIMER3_IRQHandler - .type CTIMER3_IRQHandler, %function -CTIMER3_IRQHandler: - ldr r0,=CTIMER3_DriverIRQHandler - bx r0 - .size CTIMER3_IRQHandler, . - CTIMER3_IRQHandler - - .align 1 - .thumb_func - .weak FLEXCOMM0_IRQHandler - .type FLEXCOMM0_IRQHandler, %function -FLEXCOMM0_IRQHandler: - ldr r0,=FLEXCOMM0_DriverIRQHandler - bx r0 - .size FLEXCOMM0_IRQHandler, . - FLEXCOMM0_IRQHandler - - .align 1 - .thumb_func - .weak FLEXCOMM1_IRQHandler - .type FLEXCOMM1_IRQHandler, %function -FLEXCOMM1_IRQHandler: - ldr r0,=FLEXCOMM1_DriverIRQHandler - bx r0 - .size FLEXCOMM1_IRQHandler, . - FLEXCOMM1_IRQHandler - - .align 1 - .thumb_func - .weak FLEXCOMM2_IRQHandler - .type FLEXCOMM2_IRQHandler, %function -FLEXCOMM2_IRQHandler: - ldr r0,=FLEXCOMM2_DriverIRQHandler - bx r0 - .size FLEXCOMM2_IRQHandler, . - FLEXCOMM2_IRQHandler - - .align 1 - .thumb_func - .weak FLEXCOMM3_IRQHandler - .type FLEXCOMM3_IRQHandler, %function -FLEXCOMM3_IRQHandler: - ldr r0,=FLEXCOMM3_DriverIRQHandler - bx r0 - .size FLEXCOMM3_IRQHandler, . - FLEXCOMM3_IRQHandler - - .align 1 - .thumb_func - .weak FLEXCOMM4_IRQHandler - .type FLEXCOMM4_IRQHandler, %function -FLEXCOMM4_IRQHandler: - ldr r0,=FLEXCOMM4_DriverIRQHandler - bx r0 - .size FLEXCOMM4_IRQHandler, . - FLEXCOMM4_IRQHandler - - .align 1 - .thumb_func - .weak FLEXCOMM5_IRQHandler - .type FLEXCOMM5_IRQHandler, %function -FLEXCOMM5_IRQHandler: - ldr r0,=FLEXCOMM5_DriverIRQHandler - bx r0 - .size FLEXCOMM5_IRQHandler, . - FLEXCOMM5_IRQHandler - - .align 1 - .thumb_func - .weak FLEXCOMM6_IRQHandler - .type FLEXCOMM6_IRQHandler, %function -FLEXCOMM6_IRQHandler: - ldr r0,=FLEXCOMM6_DriverIRQHandler - bx r0 - .size FLEXCOMM6_IRQHandler, . - FLEXCOMM6_IRQHandler - - .align 1 - .thumb_func - .weak FLEXCOMM7_IRQHandler - .type FLEXCOMM7_IRQHandler, %function -FLEXCOMM7_IRQHandler: - ldr r0,=FLEXCOMM7_DriverIRQHandler - bx r0 - .size FLEXCOMM7_IRQHandler, . - FLEXCOMM7_IRQHandler - - .align 1 - .thumb_func - .weak ADC0_SEQA_IRQHandler - .type ADC0_SEQA_IRQHandler, %function -ADC0_SEQA_IRQHandler: - ldr r0,=ADC0_SEQA_DriverIRQHandler - bx r0 - .size ADC0_SEQA_IRQHandler, . - ADC0_SEQA_IRQHandler - - .align 1 - .thumb_func - .weak ADC0_SEQB_IRQHandler - .type ADC0_SEQB_IRQHandler, %function -ADC0_SEQB_IRQHandler: - ldr r0,=ADC0_SEQB_DriverIRQHandler - bx r0 - .size ADC0_SEQB_IRQHandler, . - ADC0_SEQB_IRQHandler - - .align 1 - .thumb_func - .weak ADC0_THCMP_IRQHandler - .type ADC0_THCMP_IRQHandler, %function -ADC0_THCMP_IRQHandler: - ldr r0,=ADC0_THCMP_DriverIRQHandler - bx r0 - .size ADC0_THCMP_IRQHandler, . - ADC0_THCMP_IRQHandler - - .align 1 - .thumb_func - .weak Reserved41_IRQHandler - .type Reserved41_IRQHandler, %function -Reserved41_IRQHandler: - ldr r0,=Reserved41_DriverIRQHandler - bx r0 - .size Reserved41_IRQHandler, . - Reserved41_IRQHandler - - .align 1 - .thumb_func - .weak Reserved42_IRQHandler - .type Reserved42_IRQHandler, %function -Reserved42_IRQHandler: - ldr r0,=Reserved42_DriverIRQHandler - bx r0 - .size Reserved42_IRQHandler, . - Reserved42_IRQHandler - - .align 1 - .thumb_func - .weak USB0_NEEDCLK_IRQHandler - .type USB0_NEEDCLK_IRQHandler, %function -USB0_NEEDCLK_IRQHandler: - ldr r0,=USB0_NEEDCLK_DriverIRQHandler - bx r0 - .size USB0_NEEDCLK_IRQHandler, . - USB0_NEEDCLK_IRQHandler - - .align 1 - .thumb_func - .weak USB0_IRQHandler - .type USB0_IRQHandler, %function -USB0_IRQHandler: - ldr r0,=USB0_DriverIRQHandler - bx r0 - .size USB0_IRQHandler, . - USB0_IRQHandler - - .align 1 - .thumb_func - .weak RTC_IRQHandler - .type RTC_IRQHandler, %function -RTC_IRQHandler: - ldr r0,=RTC_DriverIRQHandler - bx r0 - .size RTC_IRQHandler, . - RTC_IRQHandler - - .align 1 - .thumb_func - .weak Reserved46_IRQHandler - .type Reserved46_IRQHandler, %function -Reserved46_IRQHandler: - ldr r0,=Reserved46_DriverIRQHandler - bx r0 - .size Reserved46_IRQHandler, . - Reserved46_IRQHandler - - .align 1 - .thumb_func - .weak Reserved47_IRQHandler - .type Reserved47_IRQHandler, %function -Reserved47_IRQHandler: - ldr r0,=Reserved47_DriverIRQHandler - bx r0 - .size Reserved47_IRQHandler, . - Reserved47_IRQHandler - -/* Macro to define default handlers. Default handler - * will be weak symbol and just dead loops. They can be - * overwritten by other handlers */ - .macro def_irq_handler handler_name - .weak \handler_name - .set \handler_name, DefaultISR - .endm - def_irq_handler WDT_BOD_DriverIRQHandler - def_irq_handler DMA0_DriverIRQHandler - def_irq_handler GINT0_DriverIRQHandler - def_irq_handler GINT1_DriverIRQHandler - def_irq_handler PIN_INT0_DriverIRQHandler - def_irq_handler PIN_INT1_DriverIRQHandler - def_irq_handler PIN_INT2_DriverIRQHandler - def_irq_handler PIN_INT3_DriverIRQHandler - def_irq_handler UTICK0_DriverIRQHandler - def_irq_handler MRT0_DriverIRQHandler - def_irq_handler CTIMER0_DriverIRQHandler - def_irq_handler CTIMER1_DriverIRQHandler - def_irq_handler SCT0_DriverIRQHandler - def_irq_handler CTIMER3_DriverIRQHandler - def_irq_handler FLEXCOMM0_DriverIRQHandler - def_irq_handler FLEXCOMM1_DriverIRQHandler - def_irq_handler FLEXCOMM2_DriverIRQHandler - def_irq_handler FLEXCOMM3_DriverIRQHandler - def_irq_handler FLEXCOMM4_DriverIRQHandler - def_irq_handler FLEXCOMM5_DriverIRQHandler - def_irq_handler FLEXCOMM6_DriverIRQHandler - def_irq_handler FLEXCOMM7_DriverIRQHandler - def_irq_handler ADC0_SEQA_DriverIRQHandler - def_irq_handler ADC0_SEQB_DriverIRQHandler - def_irq_handler ADC0_THCMP_DriverIRQHandler - def_irq_handler Reserved41_DriverIRQHandler - def_irq_handler Reserved42_DriverIRQHandler - def_irq_handler USB0_NEEDCLK_DriverIRQHandler - def_irq_handler USB0_DriverIRQHandler - def_irq_handler RTC_DriverIRQHandler - def_irq_handler Reserved46_DriverIRQHandler - def_irq_handler Reserved47_DriverIRQHandler - - .end diff --git a/hw/mcu/nxp/lpc_driver b/hw/mcu/nxp/lpc_driver index dee2dad8e..7bada68d1 160000 --- a/hw/mcu/nxp/lpc_driver +++ b/hw/mcu/nxp/lpc_driver @@ -1 +1 @@ -Subproject commit dee2dad8e9246afdad7c6ed0e331b2f79f21fb8a +Subproject commit 7bada68d143a17c2a60197f469e56ad60ef2357d -- cgit v1.3.1 From e99ff703dc7dc085edea6159de330ccadcbee354 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 1 Sep 2019 15:11:09 +0700 Subject: more lpc51u68 driver clean up --- hw/bsp/lpcxpresso51u68/board.mk | 22 ++++++++++++---------- hw/mcu/nxp/lpc_driver | 2 +- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk index 9a927918e..fe150dddb 100644 --- a/hw/bsp/lpcxpresso51u68/board.mk +++ b/hw/bsp/lpcxpresso51u68/board.mk @@ -9,24 +9,26 @@ CFLAGS += \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' +MCU_DIR = hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68 + # All source paths should be relative to the top level. -LD_FILE = hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68/gcc/LPC51U68_flash.ld +LD_FILE = $(MCU_DIR)/gcc/LPC51U68_flash.ld SRC_C += \ - hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68/system_LPC51U68.c \ - hw/mcu/nxp/lpc_driver/lpc51u6x/drivers/fsl_clock.c \ - hw/mcu/nxp/lpc_driver/lpc51u6x/drivers/fsl_gpio.c \ - hw/mcu/nxp/lpc_driver/lpc51u6x/drivers/fsl_power.c \ - hw/mcu/nxp/lpc_driver/lpc51u6x/drivers/fsl_reset.c + $(MCU_DIR)/system_LPC51U68.c \ + $(MCU_DIR)/drivers/fsl_clock.c \ + $(MCU_DIR)/drivers/fsl_gpio.c \ + $(MCU_DIR)/drivers/fsl_power.c \ + $(MCU_DIR)/drivers/fsl_reset.c INC += \ $(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/CMSIS/Include \ - $(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68 \ - $(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/drivers + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/drivers -SRC_S += hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68/gcc/startup_LPC51U68.S +SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S -LIBS += $(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68/gcc/libpower.a +LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a # For TinyUSB port source VENDOR = nxp diff --git a/hw/mcu/nxp/lpc_driver b/hw/mcu/nxp/lpc_driver index 7bada68d1..6634dc80d 160000 --- a/hw/mcu/nxp/lpc_driver +++ b/hw/mcu/nxp/lpc_driver @@ -1 +1 @@ -Subproject commit 7bada68d143a17c2a60197f469e56ad60ef2357d +Subproject commit 6634dc80d48ca461df46dc593e9c39f467f62329 -- cgit v1.3.1 From 96f0f8d2d7d693c10874820ce6dfb52afc44764a Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 1 Sep 2019 15:13:56 +0700 Subject: update lpc_driver --- hw/mcu/nxp/lpc_driver | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/mcu/nxp/lpc_driver b/hw/mcu/nxp/lpc_driver index 6634dc80d..d57fc04da 160000 --- a/hw/mcu/nxp/lpc_driver +++ b/hw/mcu/nxp/lpc_driver @@ -1 +1 @@ -Subproject commit 6634dc80d48ca461df46dc593e9c39f467f62329 +Subproject commit d57fc04da5d0cdac43e408cfce61ce347220f477 -- cgit v1.3.1 From fb1ca24b025bbda6372eb6fe6d40a60ad332cde7 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 1 Sep 2019 15:30:25 +0700 Subject: adding lpc54114 port --- hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c | 2 +- hw/bsp/lpcxpresso54114/board.mk | 47 +++++++++ hw/bsp/lpcxpresso54114/lpcxpresso54114.c | 169 +++++++++++++++++++++++++++++++ 3 files changed, 217 insertions(+), 1 deletion(-) create mode 100644 hw/bsp/lpcxpresso54114/board.mk create mode 100644 hw/bsp/lpcxpresso54114/lpcxpresso54114.c diff --git a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c b/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c index 8b57ce7b9..df915a720 100644 --- a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c +++ b/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c @@ -25,7 +25,7 @@ */ #include "../board.h" -#include "LPC51U68.h" +#include "fsl_device_registers.h" #include "fsl_gpio.h" #include "fsl_power.h" #include "fsl_iocon.h" diff --git a/hw/bsp/lpcxpresso54114/board.mk b/hw/bsp/lpcxpresso54114/board.mk new file mode 100644 index 000000000..78a980388 --- /dev/null +++ b/hw/bsp/lpcxpresso54114/board.mk @@ -0,0 +1,47 @@ +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -DCORE_M4 \ + -DCFG_TUSB_MCU=OPT_MCU_LPC54XXX \ + -DCPU_LPC54114J256BD64_cm4 \ + -Wfatal-errors \ + -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \ + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + +MCU_DIR = hw/mcu/nxp/lpc_driver/lpc54xxx/devices/LPC54114 + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/LPC54114J256_cm4_flash.ld + +SRC_C += \ + $(MCU_DIR)/system_LPC54114_cm4.c \ + $(MCU_DIR)/drivers/fsl_clock.c \ + $(MCU_DIR)/drivers/fsl_gpio.c \ + $(MCU_DIR)/drivers/fsl_power.c \ + $(MCU_DIR)/drivers/fsl_reset.c + +INC += \ + $(TOP)/hw/mcu/nxp/lpc_driver/lpc54xxx/CMSIS/Include \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/drivers + +SRC_S += $(MCU_DIR)/gcc/startup_LPC54114_cm4.S + +LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_cm4_hardabi.a + +# For TinyUSB port source +VENDOR = nxp +CHIP_FAMILY = lpc_usbd + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM4 + +# For flash-jlink target +JLINK_DEVICE = LPC54114 +JLINK_IF = swd + +# flash using jlink +#flash: flash-jlink diff --git a/hw/bsp/lpcxpresso54114/lpcxpresso54114.c b/hw/bsp/lpcxpresso54114/lpcxpresso54114.c new file mode 100644 index 000000000..cf9830862 --- /dev/null +++ b/hw/bsp/lpcxpresso54114/lpcxpresso54114.c @@ -0,0 +1,169 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" +#include "fsl_device_registers.h" +#include "fsl_gpio.h" +#include "fsl_power.h" +#include "fsl_iocon.h" + +#define LED_PORT 1 +#define LED_PIN 10 +#define LED_STATE_ON 0 + +// WAKE button +#define BUTTON_PORT 0 +#define BUTTON_PIN 24 + +// IOCON pin mux +#define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */ +#define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */ +#define IOCON_PIO_FUNC7 0x07u /*!< Selects pin function 7 */ +#define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */ +#define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */ +#define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */ +#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */ +#define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */ + +/**************************************************************** +name: BOARD_BootClockFROHF96M +outputs: +- {id: SYSTICK_clock.outFreq, value: 96 MHz} +- {id: System_clock.outFreq, value: 96 MHz} +settings: +- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf} +sources: +- {id: SYSCON.fro_hf.outFreq, value: 96 MHz} +******************************************************************/ +void BootClockFROHF96M(void) +{ + /*!< Set up the clock sources */ + /*!< Set up FRO */ + POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */ + CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without + accidentally being below the voltage for current speed */ + POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */ + CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */ + + CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ + + /*!< Set SystemCoreClock variable. */ + SystemCoreClock = 96000000U; +} + +void board_init(void) +{ + // Enable IOCON clock + CLOCK_EnableClock(kCLOCK_Iocon); + + // Enable GPIO0 clock + CLOCK_EnableClock(kCLOCK_Gpio0); + + // Init 96 MHz clock + BootClockFROHF96M(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + GPIO_PortInit(GPIO, LED_PORT); + GPIO_PortInit(GPIO, BUTTON_PORT); + + // LED + gpio_pin_config_t const led_config = { kGPIO_DigitalOutput, 0}; + GPIO_PinInit(GPIO, LED_PORT, LED_PIN, &led_config); + board_led_write(true); + + // Button + gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0}; + GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config); + + // USB +// const uint32_t port1_pin6_config = ( +// IOCON_PIO_FUNC7 | /* Pin is configured as USB0_VBUS */ +// IOCON_PIO_MODE_INACT | /* No addition pin function */ +// IOCON_PIO_INV_DI | /* Input function is not inverted */ +// IOCON_PIO_DIGITAL_EN | /* Enables digital function */ +// IOCON_PIO_INPFILT_OFF | /* Input filter disabled */ +// IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */ +// ); +// IOCON_PinMuxSet(IOCON, 1, 6, port1_pin6_config); /* PORT1 PIN6 (coords: 26) is configured as USB0_VBUS */ +// +// POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*Turn on USB Phy */ +// CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB IP clock */ +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + // active low + return 1-GPIO_PinRead(GPIO, BUTTON_PORT, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ + (void) buf; + (void) len; + return 0; +} + +int board_uart_write(void const * buf, int len) +{ + (void) buf; + (void) len; + return 0; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif -- cgit v1.3.1 From 403662a1d6b49e32cbf1adb4a05a1b3ac8982083 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 1 Sep 2019 15:58:42 +0700 Subject: board_test run with lpc54114 --- hw/bsp/lpcxpresso54114/board.mk | 7 ++++--- hw/bsp/lpcxpresso54114/lpcxpresso54114.c | 22 ++++++++++++---------- src/tusb_option.h | 1 + 3 files changed, 17 insertions(+), 13 deletions(-) diff --git a/hw/bsp/lpcxpresso54114/board.mk b/hw/bsp/lpcxpresso54114/board.mk index 78a980388..71c227f9f 100644 --- a/hw/bsp/lpcxpresso54114/board.mk +++ b/hw/bsp/lpcxpresso54114/board.mk @@ -40,8 +40,9 @@ CHIP_FAMILY = lpc_usbd FREERTOS_PORT = ARM_CM4 # For flash-jlink target -JLINK_DEVICE = LPC54114 +JLINK_DEVICE = LPC54114J256_M4 JLINK_IF = swd -# flash using jlink -#flash: flash-jlink +# flash using pyocd +flash: $(BUILD)/$(BOARD)-firmware.elf + pyocd flash -v -e auto -t LPC54114 $< diff --git a/hw/bsp/lpcxpresso54114/lpcxpresso54114.c b/hw/bsp/lpcxpresso54114/lpcxpresso54114.c index cf9830862..9da1c6e5f 100644 --- a/hw/bsp/lpcxpresso54114/lpcxpresso54114.c +++ b/hw/bsp/lpcxpresso54114/lpcxpresso54114.c @@ -30,8 +30,8 @@ #include "fsl_power.h" #include "fsl_iocon.h" -#define LED_PORT 1 -#define LED_PIN 10 +#define LED_PORT 0 +#define LED_PIN 29 #define LED_STATE_ON 0 // WAKE button @@ -39,14 +39,16 @@ #define BUTTON_PIN 24 // IOCON pin mux -#define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */ -#define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */ -#define IOCON_PIO_FUNC7 0x07u /*!< Selects pin function 7 */ -#define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */ -#define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */ -#define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */ -#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */ -#define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */ +#define IOCON_PIO_DIGITAL_EN 0x80u /*!<@brief Enables digital function */ +#define IOCON_PIO_FUNC0 0x00u +#define IOCON_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */ +#define IOCON_PIO_FUNC7 0x07u /*!<@brief Selects pin function 7 */ +#define IOCON_PIO_INPFILT_OFF 0x0100u /*!<@brief Input filter disabled */ +#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */ +#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */ +#define IOCON_PIO_MODE_PULLUP 0x10u +#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */ +#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */ /**************************************************************** name: BOARD_BootClockFROHF96M diff --git a/src/tusb_option.h b/src/tusb_option.h index bf1fac6ea..83a5c119b 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -43,6 +43,7 @@ #define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx #define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx #define OPT_MCU_LPC51UXX 9 ///< NXP LPC51U6x +#define OPT_MCU_LPC54XXX 10 ///< NXP LPC54xxx #define OPT_MCU_NRF5X 100 ///< Nordic nRF5x series -- cgit v1.3.1 From 30678099577f60aa36c9ab40f7eacd9fbf844873 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 1 Sep 2019 16:15:23 +0700 Subject: adding lpc54xxx to dcd, able to go through enumeration --- hw/bsp/lpcxpresso54114/lpcxpresso54114.c | 24 ++++++++++++------------ src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c | 8 +++++--- 2 files changed, 17 insertions(+), 15 deletions(-) diff --git a/hw/bsp/lpcxpresso54114/lpcxpresso54114.c b/hw/bsp/lpcxpresso54114/lpcxpresso54114.c index 9da1c6e5f..090c1a95e 100644 --- a/hw/bsp/lpcxpresso54114/lpcxpresso54114.c +++ b/hw/bsp/lpcxpresso54114/lpcxpresso54114.c @@ -114,18 +114,18 @@ void board_init(void) GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config); // USB -// const uint32_t port1_pin6_config = ( -// IOCON_PIO_FUNC7 | /* Pin is configured as USB0_VBUS */ -// IOCON_PIO_MODE_INACT | /* No addition pin function */ -// IOCON_PIO_INV_DI | /* Input function is not inverted */ -// IOCON_PIO_DIGITAL_EN | /* Enables digital function */ -// IOCON_PIO_INPFILT_OFF | /* Input filter disabled */ -// IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */ -// ); -// IOCON_PinMuxSet(IOCON, 1, 6, port1_pin6_config); /* PORT1 PIN6 (coords: 26) is configured as USB0_VBUS */ -// -// POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*Turn on USB Phy */ -// CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB IP clock */ + const uint32_t port1_pin6_config = ( + IOCON_PIO_FUNC7 | /* Pin is configured as USB0_VBUS */ + IOCON_PIO_MODE_INACT | /* No addition pin function */ + IOCON_PIO_INV_DI | /* Input function is not inverted */ + IOCON_PIO_DIGITAL_EN | /* Enables digital function */ + IOCON_PIO_INPFILT_OFF | /* Input filter disabled */ + IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */ + ); + IOCON_PinMuxSet(IOCON, 1, 6, port1_pin6_config); /* PORT1 PIN6 (coords: 26) is configured as USB0_VBUS */ + + POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*Turn on USB Phy */ + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB IP clock */ } //--------------------------------------------------------------------+ diff --git a/src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c b/src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c index 223c39c1a..d8e4de5a5 100644 --- a/src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c +++ b/src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c @@ -38,14 +38,15 @@ #if TUSB_OPT_DEVICE_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_LPC11UXX || \ CFG_TUSB_MCU == OPT_MCU_LPC13XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC51UXX ) + CFG_TUSB_MCU == OPT_MCU_LPC51UXX || \ + CFG_TUSB_MCU == OPT_MCU_LPC54XXX ) #if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX // LPC11Uxx and LPC13xx use lpcopen #include "chip.h" #define DCD_REGS LPC_USB #define DCD_IRQHandler USB_IRQHandler -#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX +#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX #include "fsl_device_registers.h" #define DCD_REGS USB0 #define DCD_IRQHandler USB0_IRQHandler @@ -60,7 +61,8 @@ // Number of endpoints #define EP_COUNT 10 -// only SRAM1 & USB RAM can be used for transfer +// only SRAM1 & USB RAM can be used for transfer. +// Used to set DATABUFSTART which is 22-bit aligned // 2000 0000 to 203F FFFF #define SRAM_REGION 0x20000000 -- cgit v1.3.1 From aeea6754af258bafa138f6bff894ee2b617c9f13 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 1 Sep 2019 16:44:40 +0700 Subject: rename lpc_usbd to lpc_ip3511 --- hw/bsp/lpcxpresso11u68/board.mk | 2 +- hw/bsp/lpcxpresso1347/board.mk | 2 +- hw/bsp/lpcxpresso51u68/board.mk | 2 +- hw/bsp/lpcxpresso54114/board.mk | 2 +- src/class/msc/msc_device.c | 1 + src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 399 +++++++++++++++++++++++++++ src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c | 399 --------------------------- 7 files changed, 404 insertions(+), 403 deletions(-) create mode 100644 src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c delete mode 100644 src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c diff --git a/hw/bsp/lpcxpresso11u68/board.mk b/hw/bsp/lpcxpresso11u68/board.mk index 29287692e..b2899a2e0 100644 --- a/hw/bsp/lpcxpresso11u68/board.mk +++ b/hw/bsp/lpcxpresso11u68/board.mk @@ -26,7 +26,7 @@ INC += \ # For TinyUSB port source VENDOR = nxp -CHIP_FAMILY = lpc_usbd +CHIP_FAMILY = lpc_ip3511 # For freeRTOS port source FREERTOS_PORT = ARM_CM0 diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk index f7600f427..7e620f97a 100644 --- a/hw/bsp/lpcxpresso1347/board.mk +++ b/hw/bsp/lpcxpresso1347/board.mk @@ -25,7 +25,7 @@ INC += \ # For TinyUSB port source VENDOR = nxp -CHIP_FAMILY = lpc_usbd +CHIP_FAMILY = lpc_ip3511 # For freeRTOS port source FREERTOS_PORT = ARM_CM3 diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk index fe150dddb..d1e9533f5 100644 --- a/hw/bsp/lpcxpresso51u68/board.mk +++ b/hw/bsp/lpcxpresso51u68/board.mk @@ -32,7 +32,7 @@ LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a # For TinyUSB port source VENDOR = nxp -CHIP_FAMILY = lpc_usbd +CHIP_FAMILY = lpc_ip3511 # For freeRTOS port source FREERTOS_PORT = ARM_CM0 diff --git a/hw/bsp/lpcxpresso54114/board.mk b/hw/bsp/lpcxpresso54114/board.mk index 71c227f9f..1d2bf9531 100644 --- a/hw/bsp/lpcxpresso54114/board.mk +++ b/hw/bsp/lpcxpresso54114/board.mk @@ -34,7 +34,7 @@ LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_cm4_hardabi.a # For TinyUSB port source VENDOR = nxp -CHIP_FAMILY = lpc_usbd +CHIP_FAMILY = lpc_ip3511 # For freeRTOS port source FREERTOS_PORT = ARM_CM4 diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index 2ec8962ae..a77282ed5 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -44,6 +44,7 @@ enum typedef struct { + // TODO optimize alignment CFG_TUSB_MEM_ALIGN msc_cbw_t cbw; CFG_TUSB_MEM_ALIGN msc_csw_t csw; diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c new file mode 100644 index 000000000..101698f17 --- /dev/null +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -0,0 +1,399 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +/* Since 2012 starting with LPC11uxx, NXP start to use common USB Device Controller with code name LPC IP3511 + * for almost their new MCUs. Currently supported and tested families are + * - LPC11Uxx + * - LPC13xx + * - LPC51Uxx + * + * For similar controller of other families, this file may require some minimal changes to work with. + * Previous MCUs such as LPC17xx, LPC40xx, LPC18xx, LPC43xx have their own driver implementation. + */ + +#if TUSB_OPT_DEVICE_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_LPC11UXX || \ + CFG_TUSB_MCU == OPT_MCU_LPC13XX || \ + CFG_TUSB_MCU == OPT_MCU_LPC51UXX || \ + CFG_TUSB_MCU == OPT_MCU_LPC54XXX ) + +#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX + // LPC11Uxx and LPC13xx use lpcopen + #include "chip.h" + #define DCD_REGS LPC_USB + #define DCD_IRQHandler USB_IRQHandler +#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX + #include "fsl_device_registers.h" + #define DCD_REGS USB0 + #define DCD_IRQHandler USB0_IRQHandler +#endif + +#include "device/dcd.h" + +//--------------------------------------------------------------------+ +// MACRO CONSTANT TYPEDEF +//--------------------------------------------------------------------+ + +// Number of endpoints +#define EP_COUNT 10 + +// only SRAM1 & USB RAM can be used for transfer. +// Used to set DATABUFSTART which is 22-bit aligned +// 2000 0000 to 203F FFFF +#define SRAM_REGION 0x20000000 + +/* Although device controller are the same. DMA of + * - M0/M+ can only transfer up to nbytes = 64 + * - M3/M4 can transfer nbytes = 1023 (maximum) + */ +enum { + #ifdef __ARM_ARCH_6M__ // Cortex M0/M0+ + DMA_NBYTES_MAX = 64 + #else + DMA_NBYTES_MAX = 1023 + #endif +}; + +enum { + INT_SOF_MASK = TU_BIT(30), + INT_DEVICE_STATUS_MASK = TU_BIT(31) +}; + +enum { + CMDSTAT_DEVICE_ADDR_MASK = TU_BIT(7 )-1, + CMDSTAT_DEVICE_ENABLE_MASK = TU_BIT(7 ), + CMDSTAT_SETUP_RECEIVED_MASK = TU_BIT(8 ), + CMDSTAT_DEVICE_CONNECT_MASK = TU_BIT(16), ///< reflect the softconnect only, does not reflect the actual attached state + CMDSTAT_DEVICE_SUSPEND_MASK = TU_BIT(17), + CMDSTAT_CONNECT_CHANGE_MASK = TU_BIT(24), + CMDSTAT_SUSPEND_CHANGE_MASK = TU_BIT(25), + CMDSTAT_RESET_CHANGE_MASK = TU_BIT(26), + CMDSTAT_VBUS_DEBOUNCED_MASK = TU_BIT(28), +}; + +typedef struct TU_ATTR_PACKED +{ + // Bits 21:6 (aligned 64) used in conjunction with bit 31:22 of DATABUFSTART + volatile uint16_t buffer_offset; + + volatile uint16_t nbytes : 10 ; + uint16_t is_iso : 1 ; + uint16_t toggle_mode : 1 ; + uint16_t toggle_reset : 1 ; + uint16_t stall : 1 ; + uint16_t disable : 1 ; + volatile uint16_t active : 1 ; +}ep_cmd_sts_t; + +TU_VERIFY_STATIC( sizeof(ep_cmd_sts_t) == 4, "size is not correct" ); + +typedef struct +{ + uint16_t total_bytes; + uint16_t xferred_bytes; + + uint16_t nbytes; +}xfer_dma_t; + +// NOTE data will be transferred as soon as dcd get request by dcd_pipe(_queue)_xfer using double buffering. +// current_td is used to keep track of number of remaining & xferred bytes of the current request. +typedef struct +{ + // 256 byte aligned, 2 for double buffer (not used) + // Each cmd_sts can only transfer up to DMA_NBYTES_MAX bytes each + ep_cmd_sts_t ep[EP_COUNT][2]; + + xfer_dma_t dma[EP_COUNT]; + + TU_ATTR_ALIGNED(64) uint8_t setup_packet[8]; +}dcd_data_t; + +//--------------------------------------------------------------------+ +// INTERNAL OBJECT & FUNCTION DECLARATION +//--------------------------------------------------------------------+ + +// EP list must be 256-byte aligned +CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static dcd_data_t _dcd; + +static inline uint16_t get_buf_offset(void const * buffer) +{ + uint32_t addr = (uint32_t) buffer; + TU_ASSERT( (addr & 0x3f) == 0, 0 ); + return ( (addr >> 6) & 0xFFFFUL ) ; +} + +static inline uint8_t ep_addr2id(uint8_t endpoint_addr) +{ + return 2*(endpoint_addr & 0x0F) + ((endpoint_addr & TUSB_DIR_IN_MASK) ? 1 : 0); +} + +//--------------------------------------------------------------------+ +// CONTROLLER API +//--------------------------------------------------------------------+ +void dcd_init(uint8_t rhport) +{ + (void) rhport; + + DCD_REGS->EPLISTSTART = (uint32_t) _dcd.ep; + DCD_REGS->DATABUFSTART = SRAM_REGION; // 22-bit alignment + + DCD_REGS->INTSTAT = DCD_REGS->INTSTAT; // clear all pending interrupt + DCD_REGS->INTEN = INT_DEVICE_STATUS_MASK; + DCD_REGS->DEVCMDSTAT |= CMDSTAT_DEVICE_ENABLE_MASK | CMDSTAT_DEVICE_CONNECT_MASK | + CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK; + + NVIC_ClearPendingIRQ(USB0_IRQn); +} + +void dcd_int_enable(uint8_t rhport) +{ + (void) rhport; + NVIC_EnableIRQ(USB0_IRQn); +} + +void dcd_int_disable(uint8_t rhport) +{ + (void) rhport; + NVIC_DisableIRQ(USB0_IRQn); +} + +void dcd_set_address(uint8_t rhport, uint8_t dev_addr) +{ + // Response with status first before changing device address + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); + + DCD_REGS->DEVCMDSTAT &= ~CMDSTAT_DEVICE_ADDR_MASK; + DCD_REGS->DEVCMDSTAT |= dev_addr; +} + +void dcd_set_config(uint8_t rhport, uint8_t config_num) +{ + (void) rhport; + (void) config_num; +} + +void dcd_remote_wakeup(uint8_t rhport) +{ + (void) rhport; +} + +//--------------------------------------------------------------------+ +// DCD Endpoint Port +//--------------------------------------------------------------------+ +void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) +{ + (void) rhport; + + // TODO cannot able to STALL Control OUT endpoint !!!!! FIXME try some walk-around + uint8_t const ep_id = ep_addr2id(ep_addr); + _dcd.ep[ep_id][0].stall = 1; +} + +void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) +{ + (void) rhport; + + uint8_t const ep_id = ep_addr2id(ep_addr); + + _dcd.ep[ep_id][0].stall = 0; + _dcd.ep[ep_id][0].toggle_reset = 1; + _dcd.ep[ep_id][0].toggle_mode = 0; +} + +bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) +{ + (void) rhport; + + // TODO not support ISO yet + if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) return false; + + //------------- Prepare Queue Head -------------// + uint8_t ep_id = ep_addr2id(p_endpoint_desc->bEndpointAddress); + + // Check if endpoint is available + TU_ASSERT( _dcd.ep[ep_id][0].disable && _dcd.ep[ep_id][1].disable ); + + tu_memclr(_dcd.ep[ep_id], 2*sizeof(ep_cmd_sts_t)); + _dcd.ep[ep_id][0].is_iso = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS); + + // Enable EP interrupt + DCD_REGS->INTEN |= TU_BIT(ep_id); + + return true; +} + +static void prepare_ep_xfer(uint8_t ep_id, uint16_t buf_offset, uint16_t total_bytes) +{ + uint16_t const nbytes = tu_min16(total_bytes, DMA_NBYTES_MAX); + + _dcd.dma[ep_id].nbytes = nbytes; + + _dcd.ep[ep_id][0].buffer_offset = buf_offset; + _dcd.ep[ep_id][0].nbytes = nbytes; + _dcd.ep[ep_id][0].active = 1; +} + +bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) +{ + (void) rhport; + + uint8_t const ep_id = ep_addr2id(ep_addr); + + tu_varclr(&_dcd.dma[ep_id]); + _dcd.dma[ep_id].total_bytes = total_bytes; + + prepare_ep_xfer(ep_id, get_buf_offset(buffer), total_bytes); + + return true; +} + +//--------------------------------------------------------------------+ +// IRQ +//--------------------------------------------------------------------+ +static void bus_reset(void) +{ + tu_memclr(&_dcd, sizeof(dcd_data_t)); + + // disable all non-control endpoints on bus reset + for(uint8_t ep_id = 2; ep_id < EP_COUNT; ep_id++) + { + _dcd.ep[ep_id][0].disable = _dcd.ep[ep_id][1].disable = 1; + } + + _dcd.ep[0][1].buffer_offset = get_buf_offset(_dcd.setup_packet); + + DCD_REGS->EPINUSE = 0; + DCD_REGS->EPBUFCFG = 0; + DCD_REGS->EPSKIP = 0xFFFFFFFF; + + DCD_REGS->INTSTAT = DCD_REGS->INTSTAT; // clear all pending interrupt + DCD_REGS->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; // clear setup received interrupt + DCD_REGS->INTEN = INT_DEVICE_STATUS_MASK | TU_BIT(0) | TU_BIT(1); // enable device status & control endpoints +} + +static void process_xfer_isr(uint32_t int_status) +{ + for(uint8_t ep_id = 0; ep_id < EP_COUNT; ep_id++ ) + { + if ( tu_bit_test(int_status, ep_id) ) + { + ep_cmd_sts_t * ep_cs = &_dcd.ep[ep_id][0]; + xfer_dma_t* xfer_dma = &_dcd.dma[ep_id]; + + xfer_dma->xferred_bytes += xfer_dma->nbytes - ep_cs->nbytes; + + if ( (ep_cs->nbytes == 0) && (xfer_dma->total_bytes > xfer_dma->xferred_bytes) ) + { + // There is more data to transfer + // buff_offset has been already increased by hw to correct value for next transfer + prepare_ep_xfer(ep_id, ep_cs->buffer_offset, xfer_dma->total_bytes - xfer_dma->xferred_bytes); + } + else + { + xfer_dma->total_bytes = xfer_dma->xferred_bytes; + + uint8_t const ep_addr = (ep_id / 2) | ((ep_id & 0x01) ? TUSB_DIR_IN_MASK : 0); + + // TODO no way determine if the transfer is failed or not + dcd_event_xfer_complete(0, ep_addr, xfer_dma->xferred_bytes, XFER_RESULT_SUCCESS, true); + } + } + } +} + +void DCD_IRQHandler(void) +{ + uint32_t const dev_cmd_stat = DCD_REGS->DEVCMDSTAT; + + uint32_t int_status = DCD_REGS->INTSTAT & DCD_REGS->INTEN; + DCD_REGS->INTSTAT = int_status; // Acknowledge handled interrupt + + if (int_status == 0) return; + + //------------- Device Status -------------// + if ( int_status & INT_DEVICE_STATUS_MASK ) + { + DCD_REGS->DEVCMDSTAT |= CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK; + if ( dev_cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset + { + bus_reset(); + dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + } + + if (dev_cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK) + { + // device disconnect + if (dev_cmd_stat & CMDSTAT_DEVICE_ADDR_MASK) + { + // debouncing as this can be set when device is powering + dcd_event_bus_signal(0, DCD_EVENT_UNPLUGGED, true); + } + } + + // TODO support suspend & resume + if (dev_cmd_stat & CMDSTAT_SUSPEND_CHANGE_MASK) + { + if (dev_cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK) + { // suspend signal, bus idle for more than 3ms + // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration. + if (dev_cmd_stat & CMDSTAT_DEVICE_ADDR_MASK) + { + dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true); + } + } + } +// else +// { // resume signal +// dcd_event_bus_signal(0, DCD_EVENT_RESUME, true); +// } +// } + } + + // Setup Receive + if ( tu_bit_test(int_status, 0) && (dev_cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) ) + { + // Follow UM flowchart to clear Active & Stall on both Control IN/OUT endpoints + _dcd.ep[0][0].active = _dcd.ep[1][0].active = 0; + _dcd.ep[0][0].stall = _dcd.ep[1][0].stall = 0; + + DCD_REGS->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; + + dcd_event_setup_received(0, _dcd.setup_packet, true); + + // keep waiting for next setup + _dcd.ep[0][1].buffer_offset = get_buf_offset(_dcd.setup_packet); + + // clear bit0 + int_status = tu_bit_clear(int_status, 0); + } + + // Endpoint transfer complete interrupt + process_xfer_isr(int_status); +} + +#endif + diff --git a/src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c b/src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c deleted file mode 100644 index d8e4de5a5..000000000 --- a/src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c +++ /dev/null @@ -1,399 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -/* Since 2012 starting with LPC11uxx, NXP start to use common USB Device Controller - * for almost their new MCUs. Currently supported and tested families are - * - LPC11Uxx - * - LPC13xx - * - LPC51Uxx - * - * For similar controller of other families, this file may require some minimal changes to work with. - * Previous MCUs such as LPC17xx, LPC40xx, LPC18xx, LPC43xx have their own driver implementation. - */ - -#if TUSB_OPT_DEVICE_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_LPC11UXX || \ - CFG_TUSB_MCU == OPT_MCU_LPC13XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC51UXX || \ - CFG_TUSB_MCU == OPT_MCU_LPC54XXX ) - -#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX - // LPC11Uxx and LPC13xx use lpcopen - #include "chip.h" - #define DCD_REGS LPC_USB - #define DCD_IRQHandler USB_IRQHandler -#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX - #include "fsl_device_registers.h" - #define DCD_REGS USB0 - #define DCD_IRQHandler USB0_IRQHandler -#endif - -#include "device/dcd.h" - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ - -// Number of endpoints -#define EP_COUNT 10 - -// only SRAM1 & USB RAM can be used for transfer. -// Used to set DATABUFSTART which is 22-bit aligned -// 2000 0000 to 203F FFFF -#define SRAM_REGION 0x20000000 - -/* Although device controller are the same. DMA of - * - M0/M+ can only transfer up to nbytes = 64 - * - M3/M4 can transfer nbytes = 1023 (maximum) - */ -enum { - #ifdef __ARM_ARCH_6M__ // Cortex M0/M0+ - DMA_NBYTES_MAX = 64 - #else - DMA_NBYTES_MAX = 1023 - #endif -}; - -enum { - INT_SOF_MASK = TU_BIT(30), - INT_DEVICE_STATUS_MASK = TU_BIT(31) -}; - -enum { - CMDSTAT_DEVICE_ADDR_MASK = TU_BIT(7 )-1, - CMDSTAT_DEVICE_ENABLE_MASK = TU_BIT(7 ), - CMDSTAT_SETUP_RECEIVED_MASK = TU_BIT(8 ), - CMDSTAT_DEVICE_CONNECT_MASK = TU_BIT(16), ///< reflect the softconnect only, does not reflect the actual attached state - CMDSTAT_DEVICE_SUSPEND_MASK = TU_BIT(17), - CMDSTAT_CONNECT_CHANGE_MASK = TU_BIT(24), - CMDSTAT_SUSPEND_CHANGE_MASK = TU_BIT(25), - CMDSTAT_RESET_CHANGE_MASK = TU_BIT(26), - CMDSTAT_VBUS_DEBOUNCED_MASK = TU_BIT(28), -}; - -typedef struct TU_ATTR_PACKED -{ - // Bits 21:6 (aligned 64) used in conjunction with bit 31:22 of DATABUFSTART - volatile uint16_t buffer_offset; - - volatile uint16_t nbytes : 10 ; - uint16_t is_iso : 1 ; - uint16_t toggle_mode : 1 ; - uint16_t toggle_reset : 1 ; - uint16_t stall : 1 ; - uint16_t disable : 1 ; - volatile uint16_t active : 1 ; -}ep_cmd_sts_t; - -TU_VERIFY_STATIC( sizeof(ep_cmd_sts_t) == 4, "size is not correct" ); - -typedef struct -{ - uint16_t total_bytes; - uint16_t xferred_bytes; - - uint16_t nbytes; -}xfer_dma_t; - -// NOTE data will be transferred as soon as dcd get request by dcd_pipe(_queue)_xfer using double buffering. -// current_td is used to keep track of number of remaining & xferred bytes of the current request. -typedef struct -{ - // 256 byte aligned, 2 for double buffer (not used) - // Each cmd_sts can only transfer up to DMA_NBYTES_MAX bytes each - ep_cmd_sts_t ep[EP_COUNT][2]; - - xfer_dma_t dma[EP_COUNT]; - - TU_ATTR_ALIGNED(64) uint8_t setup_packet[8]; -}dcd_data_t; - -//--------------------------------------------------------------------+ -// INTERNAL OBJECT & FUNCTION DECLARATION -//--------------------------------------------------------------------+ - -// EP list must be 256-byte aligned -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static dcd_data_t _dcd; - -static inline uint16_t get_buf_offset(void const * buffer) -{ - uint32_t addr = (uint32_t) buffer; - TU_ASSERT( (addr & 0x3f) == 0, 0 ); - return ( (addr >> 6) & 0xFFFFUL ) ; -} - -static inline uint8_t ep_addr2id(uint8_t endpoint_addr) -{ - return 2*(endpoint_addr & 0x0F) + ((endpoint_addr & TUSB_DIR_IN_MASK) ? 1 : 0); -} - -//--------------------------------------------------------------------+ -// CONTROLLER API -//--------------------------------------------------------------------+ -void dcd_init(uint8_t rhport) -{ - (void) rhport; - - DCD_REGS->EPLISTSTART = (uint32_t) _dcd.ep; - DCD_REGS->DATABUFSTART = SRAM_REGION; // 22-bit alignment - - DCD_REGS->INTSTAT = DCD_REGS->INTSTAT; // clear all pending interrupt - DCD_REGS->INTEN = INT_DEVICE_STATUS_MASK; - DCD_REGS->DEVCMDSTAT |= CMDSTAT_DEVICE_ENABLE_MASK | CMDSTAT_DEVICE_CONNECT_MASK | - CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK; - - NVIC_ClearPendingIRQ(USB0_IRQn); -} - -void dcd_int_enable(uint8_t rhport) -{ - (void) rhport; - NVIC_EnableIRQ(USB0_IRQn); -} - -void dcd_int_disable(uint8_t rhport) -{ - (void) rhport; - NVIC_DisableIRQ(USB0_IRQn); -} - -void dcd_set_address(uint8_t rhport, uint8_t dev_addr) -{ - // Response with status first before changing device address - dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); - - DCD_REGS->DEVCMDSTAT &= ~CMDSTAT_DEVICE_ADDR_MASK; - DCD_REGS->DEVCMDSTAT |= dev_addr; -} - -void dcd_set_config(uint8_t rhport, uint8_t config_num) -{ - (void) rhport; - (void) config_num; -} - -void dcd_remote_wakeup(uint8_t rhport) -{ - (void) rhport; -} - -//--------------------------------------------------------------------+ -// DCD Endpoint Port -//--------------------------------------------------------------------+ -void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - - // TODO cannot able to STALL Control OUT endpoint !!!!! FIXME try some walk-around - uint8_t const ep_id = ep_addr2id(ep_addr); - _dcd.ep[ep_id][0].stall = 1; -} - -void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - - uint8_t const ep_id = ep_addr2id(ep_addr); - - _dcd.ep[ep_id][0].stall = 0; - _dcd.ep[ep_id][0].toggle_reset = 1; - _dcd.ep[ep_id][0].toggle_mode = 0; -} - -bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) -{ - (void) rhport; - - // TODO not support ISO yet - if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) return false; - - //------------- Prepare Queue Head -------------// - uint8_t ep_id = ep_addr2id(p_endpoint_desc->bEndpointAddress); - - // Check if endpoint is available - TU_ASSERT( _dcd.ep[ep_id][0].disable && _dcd.ep[ep_id][1].disable ); - - tu_memclr(_dcd.ep[ep_id], 2*sizeof(ep_cmd_sts_t)); - _dcd.ep[ep_id][0].is_iso = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS); - - // Enable EP interrupt - DCD_REGS->INTEN |= TU_BIT(ep_id); - - return true; -} - -static void prepare_ep_xfer(uint8_t ep_id, uint16_t buf_offset, uint16_t total_bytes) -{ - uint16_t const nbytes = tu_min16(total_bytes, DMA_NBYTES_MAX); - - _dcd.dma[ep_id].nbytes = nbytes; - - _dcd.ep[ep_id][0].buffer_offset = buf_offset; - _dcd.ep[ep_id][0].nbytes = nbytes; - _dcd.ep[ep_id][0].active = 1; -} - -bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) -{ - (void) rhport; - - uint8_t const ep_id = ep_addr2id(ep_addr); - - tu_varclr(&_dcd.dma[ep_id]); - _dcd.dma[ep_id].total_bytes = total_bytes; - - prepare_ep_xfer(ep_id, get_buf_offset(buffer), total_bytes); - - return true; -} - -//--------------------------------------------------------------------+ -// IRQ -//--------------------------------------------------------------------+ -static void bus_reset(void) -{ - tu_memclr(&_dcd, sizeof(dcd_data_t)); - - // disable all non-control endpoints on bus reset - for(uint8_t ep_id = 2; ep_id < EP_COUNT; ep_id++) - { - _dcd.ep[ep_id][0].disable = _dcd.ep[ep_id][1].disable = 1; - } - - _dcd.ep[0][1].buffer_offset = get_buf_offset(_dcd.setup_packet); - - DCD_REGS->EPINUSE = 0; - DCD_REGS->EPBUFCFG = 0; - DCD_REGS->EPSKIP = 0xFFFFFFFF; - - DCD_REGS->INTSTAT = DCD_REGS->INTSTAT; // clear all pending interrupt - DCD_REGS->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; // clear setup received interrupt - DCD_REGS->INTEN = INT_DEVICE_STATUS_MASK | TU_BIT(0) | TU_BIT(1); // enable device status & control endpoints -} - -static void process_xfer_isr(uint32_t int_status) -{ - for(uint8_t ep_id = 0; ep_id < EP_COUNT; ep_id++ ) - { - if ( tu_bit_test(int_status, ep_id) ) - { - ep_cmd_sts_t * ep_cs = &_dcd.ep[ep_id][0]; - xfer_dma_t* xfer_dma = &_dcd.dma[ep_id]; - - xfer_dma->xferred_bytes += xfer_dma->nbytes - ep_cs->nbytes; - - if ( (ep_cs->nbytes == 0) && (xfer_dma->total_bytes > xfer_dma->xferred_bytes) ) - { - // There is more data to transfer - // buff_offset has been already increased by hw to correct value for next transfer - prepare_ep_xfer(ep_id, ep_cs->buffer_offset, xfer_dma->total_bytes - xfer_dma->xferred_bytes); - } - else - { - xfer_dma->total_bytes = xfer_dma->xferred_bytes; - - uint8_t const ep_addr = (ep_id / 2) | ((ep_id & 0x01) ? TUSB_DIR_IN_MASK : 0); - - // TODO no way determine if the transfer is failed or not - dcd_event_xfer_complete(0, ep_addr, xfer_dma->xferred_bytes, XFER_RESULT_SUCCESS, true); - } - } - } -} - -void DCD_IRQHandler(void) -{ - uint32_t const dev_cmd_stat = DCD_REGS->DEVCMDSTAT; - - uint32_t int_status = DCD_REGS->INTSTAT & DCD_REGS->INTEN; - DCD_REGS->INTSTAT = int_status; // Acknowledge handled interrupt - - if (int_status == 0) return; - - //------------- Device Status -------------// - if ( int_status & INT_DEVICE_STATUS_MASK ) - { - DCD_REGS->DEVCMDSTAT |= CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK; - if ( dev_cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset - { - bus_reset(); - dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); - } - - if (dev_cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK) - { - // device disconnect - if (dev_cmd_stat & CMDSTAT_DEVICE_ADDR_MASK) - { - // debouncing as this can be set when device is powering - dcd_event_bus_signal(0, DCD_EVENT_UNPLUGGED, true); - } - } - - // TODO support suspend & resume - if (dev_cmd_stat & CMDSTAT_SUSPEND_CHANGE_MASK) - { - if (dev_cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK) - { // suspend signal, bus idle for more than 3ms - // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration. - if (dev_cmd_stat & CMDSTAT_DEVICE_ADDR_MASK) - { - dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true); - } - } - } -// else -// { // resume signal -// dcd_event_bus_signal(0, DCD_EVENT_RESUME, true); -// } -// } - } - - // Setup Receive - if ( tu_bit_test(int_status, 0) && (dev_cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) ) - { - // Follow UM flowchart to clear Active & Stall on both Control IN/OUT endpoints - _dcd.ep[0][0].active = _dcd.ep[1][0].active = 0; - _dcd.ep[0][0].stall = _dcd.ep[1][0].stall = 0; - - DCD_REGS->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; - - dcd_event_setup_received(0, _dcd.setup_packet, true); - - // keep waiting for next setup - _dcd.ep[0][1].buffer_offset = get_buf_offset(_dcd.setup_packet); - - // clear bit0 - int_status = tu_bit_clear(int_status, 0); - } - - // Endpoint transfer complete interrupt - process_xfer_isr(int_status); -} - -#endif - -- cgit v1.3.1 From 074681da8bab89e108f43988b347683812b0be9a Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 1 Sep 2019 17:05:34 +0700 Subject: dma of lpc54114 can also execute up to 64 bytes each transfer There is still issue with cdc_msc_hid example --- src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 101698f17..0f0858b1b 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -66,15 +66,15 @@ // 2000 0000 to 203F FFFF #define SRAM_REGION 0x20000000 -/* Although device controller are the same. DMA of - * - M0/M+ can only transfer up to nbytes = 64 - * - M3/M4 can transfer nbytes = 1023 (maximum) +/* Although device controller are the same. Somehow only LPC134x can execute + * DMA with 1023 bytes for Bulk/Control. Others (11u, 51u, 54xxx) can only work + * with max 64 bytes */ enum { - #ifdef __ARM_ARCH_6M__ // Cortex M0/M0+ - DMA_NBYTES_MAX = 64 - #else + #if CFG_TUSB_MCU == OPT_MCU_LPC13XX DMA_NBYTES_MAX = 1023 + #else + DMA_NBYTES_MAX = 64 #endif }; -- cgit v1.3.1 From 80cde5b0b5008200d6020d9a55b74260245a4e3b Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 1 Sep 2019 17:20:10 +0700 Subject: fix potential bug with mis-align issue --- src/class/hid/hid_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c index 949fd183d..572f2cad2 100644 --- a/src/class/hid/hid_device.c +++ b/src/class/hid/hid_device.c @@ -178,7 +178,7 @@ bool hidd_open(uint8_t rhport, tusb_desc_interface_t const * desc_itf, uint16_t p_hid->boot_mode = false; // default mode is REPORT p_hid->itf_num = desc_itf->bInterfaceNumber; - p_hid->reprot_desc_len = desc_hid->wReportLength; + memcpy(&p_hid->reprot_desc_len, &desc_hid->wReportLength, 2); *p_len = sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + desc_itf->bNumEndpoints*sizeof(tusb_desc_endpoint_t); -- cgit v1.3.1 From 67d2cf39d5b776f4b540dda3547547ab3ad839be Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 1 Sep 2019 21:04:43 +0700 Subject: clean up --- hw/bsp/lpcxpresso11u68/board.mk | 5 +++-- hw/bsp/lpcxpresso51u68/board.mk | 5 +++-- hw/bsp/lpcxpresso54114/board.mk | 4 ++-- 3 files changed, 8 insertions(+), 6 deletions(-) diff --git a/hw/bsp/lpcxpresso11u68/board.mk b/hw/bsp/lpcxpresso11u68/board.mk index b2899a2e0..b637b4b02 100644 --- a/hw/bsp/lpcxpresso11u68/board.mk +++ b/hw/bsp/lpcxpresso11u68/board.mk @@ -35,5 +35,6 @@ FREERTOS_PORT = ARM_CM0 JLINK_DEVICE = LPC11U68 JLINK_IF = swd -# flash using jlink -flash: flash-jlink +# flash using pyocd +flash: $(BUILD)/$(BOARD)-firmware.hex + pyocd flash -t lpc11u68 $< diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk index d1e9533f5..60485463c 100644 --- a/hw/bsp/lpcxpresso51u68/board.mk +++ b/hw/bsp/lpcxpresso51u68/board.mk @@ -41,5 +41,6 @@ FREERTOS_PORT = ARM_CM0 JLINK_DEVICE = LPC51U68 JLINK_IF = swd -# flash using jlink -#flash: flash-jlink +# flash using pyocd (51u68 is not supported yet) +flash: $(BUILD)/$(BOARD)-firmware.hex + pyocd flash -t LPC51U68 $< diff --git a/hw/bsp/lpcxpresso54114/board.mk b/hw/bsp/lpcxpresso54114/board.mk index 1d2bf9531..d4ef8c262 100644 --- a/hw/bsp/lpcxpresso54114/board.mk +++ b/hw/bsp/lpcxpresso54114/board.mk @@ -44,5 +44,5 @@ JLINK_DEVICE = LPC54114J256_M4 JLINK_IF = swd # flash using pyocd -flash: $(BUILD)/$(BOARD)-firmware.elf - pyocd flash -v -e auto -t LPC54114 $< +flash: $(BUILD)/$(BOARD)-firmware.hex + pyocd flash -t LPC54114 $< -- cgit v1.3.1 From f2bbb75695650a6f1d43c6d648a9ad10d75019d9 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 1 Sep 2019 22:44:56 +0700 Subject: clean up --- hw/bsp/lpcxpresso51u68/board.mk | 1 - hw/bsp/lpcxpresso54114/board.mk | 1 - 2 files changed, 2 deletions(-) diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk index 60485463c..7b83759aa 100644 --- a/hw/bsp/lpcxpresso51u68/board.mk +++ b/hw/bsp/lpcxpresso51u68/board.mk @@ -5,7 +5,6 @@ CFLAGS += \ -DCORE_M0PLUS \ -DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \ -DCPU_LPC51U68JBD64 \ - -Wfatal-errors \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' diff --git a/hw/bsp/lpcxpresso54114/board.mk b/hw/bsp/lpcxpresso54114/board.mk index d4ef8c262..bc49c3e30 100644 --- a/hw/bsp/lpcxpresso54114/board.mk +++ b/hw/bsp/lpcxpresso54114/board.mk @@ -7,7 +7,6 @@ CFLAGS += \ -DCORE_M4 \ -DCFG_TUSB_MCU=OPT_MCU_LPC54XXX \ -DCPU_LPC54114J256BD64_cm4 \ - -Wfatal-errors \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' -- cgit v1.3.1