From 4f4ba3b16d9bcb98a1cb51cb6030f0be4dfd7513 Mon Sep 17 00:00:00 2001
From: Niklas Hauser <niklas.hauser@rwth-aachen.de>
Date: Sat, 17 May 2025 17:35:45 +0200
Subject: [stm32] Wait until the PHYC PLL is stable

---
 src/portable/synopsys/dwc2/dwc2_stm32.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h
index c11c1eb05..0bbad55f5 100644
--- a/src/portable/synopsys/dwc2/dwc2_stm32.h
+++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
@@ -222,6 +222,10 @@ static inline void dwc2_phy_init(dwc2_regs_t* dwc2, uint8_t hs_phy_type) {
 
       // Enable PLL internal PHY
       USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL_PLLEN;
+
+      // Wait ~2ms until the PLL is ready (there's no RDY bit to query)
+      uint32_t count = (SystemCoreClock / 1000) * 2;
+      while (count--) __NOP();
       #else
 
       #endif
-- 
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