From 80be1aa13dcdd0b86c01212b6266a099669c98b2 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 19 Mar 2023 17:19:33 +0700 Subject: bsp lpc11 --- .github/workflows/build_arm.yml | 2 +- hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk | 24 ++ hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld | 195 +++++++++++++++++ .../lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c | 208 ++++++++++++++++++ hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk | 18 ++ hw/bsp/lpc11/boards/lpcxpresso11u68/lpc11u68.ld | 242 +++++++++++++++++++++ .../lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c | 135 ++++++++++++ hw/bsp/lpc11/family.mk | 43 ++++ hw/bsp/lpcxpresso11u37/board.mk | 46 ---- hw/bsp/lpcxpresso11u37/lpc11u37.ld | 195 ----------------- hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c | 208 ------------------ hw/bsp/lpcxpresso11u68/board.mk | 42 ---- hw/bsp/lpcxpresso11u68/lpc11u68.ld | 242 --------------------- hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c | 135 ------------ 14 files changed, 866 insertions(+), 869 deletions(-) create mode 100644 hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk create mode 100644 hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld create mode 100644 hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c create mode 100644 hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk create mode 100644 hw/bsp/lpc11/boards/lpcxpresso11u68/lpc11u68.ld create mode 100644 hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c create mode 100644 hw/bsp/lpc11/family.mk delete mode 100644 hw/bsp/lpcxpresso11u37/board.mk delete mode 100644 hw/bsp/lpcxpresso11u37/lpc11u37.ld delete mode 100644 hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c delete mode 100644 hw/bsp/lpcxpresso11u68/board.mk delete mode 100644 hw/bsp/lpcxpresso11u68/lpc11u68.ld delete mode 100644 hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index ee3d9f533..1a0e556e9 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -35,7 +35,7 @@ jobs: - 'broadcom_32bit' - 'imxrt' - 'kinetis_k32 kinetis_kl' - - 'lpc15 lpc18' + - 'lpc11 lpc15 lpc18' - 'lpc54 lpc55' - 'mm32 msp432e4' - 'nrf' diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk b/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk new file mode 100644 index 000000000..fdc17374b --- /dev/null +++ b/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk @@ -0,0 +1,24 @@ +MCU = 11uxx +MCU_DRV = 11xx + +CFLAGS += \ + -DCORE_M0 \ + -DCFG_EXAMPLE_MSC_READONLY \ + -DCFG_EXAMPLE_VIDEO_READONLY \ + -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' + +# mcu driver cause following warnings +CFLAGS += \ + -Wno-error=strict-prototypes \ + -Wno-error=unused-parameter \ + -Wno-error=redundant-decls + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/lpc11u37.ld + +# For flash-jlink target +JLINK_DEVICE = LPC11U37/401 +PYOCD_TARGET = lpc11u37 + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld new file mode 100644 index 000000000..8e0a4e4c6 --- /dev/null +++ b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld @@ -0,0 +1,195 @@ +/* + * GENERATED FILE - DO NOT EDIT + * Copyright (c) 2008-2013 Code Red Technologies Ltd, + * Copyright 2015, 2018-2019 NXP + * (c) NXP Semiconductors 2013-2019 + * Generated linker script file for LPC11U37/401 + * Created from linkscript.ldt by FMCreateLinkLibraries + * Using Freemarker v2.3.23 + * MCUXpresso IDE v11.0.0 [Build 2516] [2019-06-05] on Sep 6, 2019 12:16:06 PM + */ + +MEMORY +{ + /* Define each memory region */ + MFlash128 (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes (alias Flash) */ + RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */ + RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ +} + + /* Define a symbol for the top of each memory region */ + __base_MFlash128 = 0x0 ; /* MFlash128 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash128 = 0x0 + 0x20000 ; /* 128K bytes */ + __top_Flash = 0x0 + 0x20000 ; /* 128K bytes */ + __base_RamLoc8 = 0x10000000 ; /* RamLoc8 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */ + __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */ + __base_RamUsb2 = 0x20004000 ; /* RamUsb2 */ + __base_RAM2 = 0x20004000 ; /* RAM2 */ + __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */ + __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */ + + +ENTRY(ResetISR) + +SECTIONS +{ + /* MAIN TEXT SECTION */ + .text : ALIGN(4) + { + FILL(0xff) + __vectors_start__ = ABSOLUTE(.) ; + KEEP(*(.isr_vector)) + /* Global Section Table */ + . = ALIGN(4) ; + __section_table_start = .; + __data_section_table = .; + LONG(LOADADDR(.data)); + LONG( ADDR(.data)); + LONG( SIZEOF(.data)); + LONG(LOADADDR(.data_RAM2)); + LONG( ADDR(.data_RAM2)); + LONG( SIZEOF(.data_RAM2)); + __data_section_table_end = .; + __bss_section_table = .; + LONG( ADDR(.bss)); + LONG( SIZEOF(.bss)); + LONG( ADDR(.bss_RAM2)); + LONG( SIZEOF(.bss_RAM2)); + __bss_section_table_end = .; + __section_table_end = . ; + /* End of Global Section Table */ + + *(.after_vectors*) + + } > MFlash128 + + .text : ALIGN(4) + { + *(.text*) + *(.rodata .rodata.* .constdata .constdata.*) + . = ALIGN(4); + } > MFlash128 + /* + * for exception handling/unwind - some Newlib functions (in common + * with C++ and STDC++) use this. + */ + .ARM.extab : ALIGN(4) + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > MFlash128 + + __exidx_start = .; + + .ARM.exidx : ALIGN(4) + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > MFlash128 + __exidx_end = .; + + _etext = .; + + /* DATA section for RamUsb2 */ + + .data_RAM2 : ALIGN(4) + { + FILL(0xff) + PROVIDE(__start_data_RAM2 = .) ; + *(.ramfunc.$RAM2) + *(.ramfunc.$RamUsb2) + *(.data.$RAM2) + *(.data.$RamUsb2) + *(.data.$RAM2.*) + *(.data.$RamUsb2.*) + . = ALIGN(4) ; + PROVIDE(__end_data_RAM2 = .) ; + } > RamUsb2 AT>MFlash128 + /* MAIN DATA SECTION */ + .uninit_RESERVED (NOLOAD) : + { + . = ALIGN(4) ; + KEEP(*(.bss.$RESERVED*)) + . = ALIGN(4) ; + _end_uninit_RESERVED = .; + } > RamLoc8 + + /* Main DATA section (RamLoc8) */ + .data : ALIGN(4) + { + FILL(0xff) + _data = . ; + *(vtable) + *(.ramfunc*) + *(.data*) + . = ALIGN(4) ; + _edata = . ; + } > RamLoc8 AT>MFlash128 + + /* BSS section for RamUsb2 */ + .bss_RAM2 : + { + . = ALIGN(4) ; + PROVIDE(__start_bss_RAM2 = .) ; + *(.bss.$RAM2) + *(.bss.$RamUsb2) + *(.bss.$RAM2.*) + *(.bss.$RamUsb2.*) + . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ + PROVIDE(__end_bss_RAM2 = .) ; + } > RamUsb2 + + /* MAIN BSS SECTION */ + .bss : + { + . = ALIGN(4) ; + _bss = .; + *(.bss*) + *(COMMON) + . = ALIGN(4) ; + _ebss = .; + PROVIDE(end = .); + } > RamLoc8 + + /* NOINIT section for RamUsb2 */ + .noinit_RAM2 (NOLOAD) : + { + . = ALIGN(4) ; + *(.noinit.$RAM2) + *(.noinit.$RamUsb2) + *(.noinit.$RAM2.*) + *(.noinit.$RamUsb2.*) + . = ALIGN(4) ; + } > RamUsb2 + + /* DEFAULT NOINIT SECTION */ + .noinit (NOLOAD): + { + . = ALIGN(4) ; + _noinit = .; + *(.noinit*) + . = ALIGN(4) ; + _end_noinit = .; + } > RamLoc8 + PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .); + PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc8 - 0); + + /* ## Create checksum value (used in startup) ## */ + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) + + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) + ) + ); + + /* Provide basic symbols giving location and size of main text + * block, including initial values of RW data sections. Note that + * these will need extending to give a complete picture with + * complex images (e.g multiple Flash banks). + */ + _image_start = LOADADDR(.text); + _image_end = LOADADDR(.data) + SIZEOF(.data); + _image_size = _image_end - _image_start; +} diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c new file mode 100644 index 000000000..02dc2cbf9 --- /dev/null +++ b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c @@ -0,0 +1,208 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "chip.h" +#include "bsp/board.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB_IRQHandler(void) +{ + tud_int_handler(0); +} + +//---------------------------------------------------------------- ----+ +// MACRO TYPEDEF CONSTANT ENUM +//--------------------------------------------------------------------+ +#define LED_PORT 1 +#define LED_PIN 24 +#define LED_STATE_ON 0 + +// Wake up Switch +#define BUTTON_PORT 0 +#define BUTTON_PIN 16 +#define BUTTON_STATE_ACTIVE 0 + +/* System oscillator rate and RTC oscillator rate */ +const uint32_t OscRateIn = 12000000; +const uint32_t ExtRateIn = 0; + +/* Pin muxing table, only items that need changing from their default pin + state are in this table. Not every pin is mapped. */ +/* IOCON pin definitions for pin muxing */ +typedef struct { + uint32_t port : 8; /* Pin port */ + uint32_t pin : 8; /* Pin number */ + uint32_t modefunc : 16; /* Function and mode */ +} PINMUX_GRP_T; + +static const PINMUX_GRP_T pinmuxing[] = +{ + {0, 3, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // USB VBUS + {0, 6, (IOCON_FUNC1 | IOCON_MODE_INACT)}, /* PIO0_6 used for USB_CONNECT */ + + {0, 18, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 RX + {0, 19, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 TX +}; + +/* Setup system clocking */ +static void SystemSetupClocking(void) +{ + volatile int i; + + /* Powerup main oscillator */ + Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSOSC_PD); + + /* Wait 200us for OSC to be stablized, no status + indication, dummy wait. */ + for (i = 0; i < 0x100; i++) {} + + /* Set system PLL input to main oscillator */ + Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); + + /* Power down PLL to change the PLL divider ratio */ + Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD); + + /* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 4 = 48MHz + MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) + FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz + FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ + Chip_Clock_SetupSystemPLL(3, 1); + + /* Powerup system PLL */ + Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD); + + /* Wait for PLL to lock */ + while (!Chip_Clock_IsSystemPLLLocked()) {} + + /* Set system clock divider to 1 */ + Chip_Clock_SetSysClockDiv(1); + + /* Setup FLASH access to 3 clocks */ + Chip_FMC_SetFLASHAccess(FLASHTIM_50MHZ_CPU); + + /* Set main clock source to the system PLL. This will drive 48MHz + for the main clock and 48MHz for the system clock */ + Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT); + + /* Set USB PLL input to main oscillator */ + Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); + /* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz + MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) + FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz + FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ + Chip_Clock_SetupUSBPLL(3, 1); + + /* Powerup USB PLL */ + Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD); + + /* Wait for PLL to lock */ + while (!Chip_Clock_IsUSBPLLLocked()) {} +} + +// Invoked by startup code +void SystemInit(void) +{ + SystemSetupClocking(); + Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_RAM1); + + /* Enable IOCON clock */ + Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON); + for (uint32_t i = 0; i < (sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); i++) + { + Chip_IOCON_PinMuxSet(LPC_IOCON, pinmuxing[i].port, pinmuxing[i].pin, pinmuxing[i].modefunc); + } +} + +void board_init(void) +{ + SystemCoreClockUpdate(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + Chip_GPIO_Init(LPC_GPIO); + + // LED + Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN); + + // Button + Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); + + // USB: Setup PLL clock, and power + /* enable USB main clock */ + Chip_Clock_SetUSBClockSource(SYSCTL_USBCLKSRC_PLLOUT, 1); + /* Enable AHB clock to the USB block and USB RAM. */ + Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USB); + Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USBRAM); + /* power UP USB Phy */ + Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPAD_PD); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ + (void) buf; (void) len; + return 0; +} + +int board_uart_write(void const * buf, int len) +{ + (void) buf; (void) len; + return 0; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk new file mode 100644 index 000000000..fbe97b853 --- /dev/null +++ b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk @@ -0,0 +1,18 @@ +MCU = 11u6x +MCU_DRV = 11u6x + +CFLAGS += \ + -DCORE_M0PLUS \ + -D__VTOR_PRESENT=0 \ + -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/lpc11u68.ld + +# For flash-jlink target +JLINK_DEVICE = LPC11U68 +PYOCD_TARGET = lpc11u68 + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u68/lpc11u68.ld b/hw/bsp/lpc11/boards/lpcxpresso11u68/lpc11u68.ld new file mode 100644 index 000000000..4a35b192e --- /dev/null +++ b/hw/bsp/lpc11/boards/lpcxpresso11u68/lpc11u68.ld @@ -0,0 +1,242 @@ +/* + * GENERATED FILE - DO NOT EDIT + * (c) Code Red Technologies Ltd, 2008-2013 + * (c) NXP Semiconductors 2013-2019 + * Generated linker script file for LPC11U68 + * Created from linkscript.ldt by FMCreateLinkLibraries + * Using Freemarker v2.3.23 + * MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 14, 2019 4:55:54 PM + */ + +MEMORY +{ + /* Define each memory region */ + MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */ + Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ + Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */ +} + + /* Define a symbol for the top of each memory region */ + __base_MFlash256 = 0x0 ; /* MFlash256 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */ + __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */ + __base_Ram0_32 = 0x10000000 ; /* Ram0_32 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_Ram0_32 = 0x10000000 + 0x8000 ; /* 32K bytes */ + __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ + __base_Ram1_2 = 0x20000000 ; /* Ram1_2 */ + __base_RAM2 = 0x20000000 ; /* RAM2 */ + __top_Ram1_2 = 0x20000000 + 0x800 ; /* 2K bytes */ + __top_RAM2 = 0x20000000 + 0x800 ; /* 2K bytes */ + __base_Ram2USB_2 = 0x20004000 ; /* Ram2USB_2 */ + __base_RAM3 = 0x20004000 ; /* RAM3 */ + __top_Ram2USB_2 = 0x20004000 + 0x800 ; /* 2K bytes */ + __top_RAM3 = 0x20004000 + 0x800 ; /* 2K bytes */ + +ENTRY(ResetISR) + +SECTIONS +{ + /* MAIN TEXT SECTION */ + .text : ALIGN(4) + { + FILL(0xff) + __vectors_start__ = ABSOLUTE(.) ; + KEEP(*(.isr_vector)) + /* Global Section Table */ + . = ALIGN(4) ; + __section_table_start = .; + __data_section_table = .; + LONG(LOADADDR(.data)); + LONG( ADDR(.data)); + LONG( SIZEOF(.data)); + LONG(LOADADDR(.data_RAM2)); + LONG( ADDR(.data_RAM2)); + LONG( SIZEOF(.data_RAM2)); + LONG(LOADADDR(.data_RAM3)); + LONG( ADDR(.data_RAM3)); + LONG( SIZEOF(.data_RAM3)); + __data_section_table_end = .; + __bss_section_table = .; + LONG( ADDR(.bss)); + LONG( SIZEOF(.bss)); + LONG( ADDR(.bss_RAM2)); + LONG( SIZEOF(.bss_RAM2)); + LONG( ADDR(.bss_RAM3)); + LONG( SIZEOF(.bss_RAM3)); + __bss_section_table_end = .; + __section_table_end = . ; + /* End of Global Section Table */ + + *(.after_vectors*) + + } > MFlash256 + + .text : ALIGN(4) + { + *(.text*) + *(.rodata .rodata.* .constdata .constdata.*) + . = ALIGN(4); + } > MFlash256 + /* + * for exception handling/unwind - some Newlib functions (in common + * with C++ and STDC++) use this. + */ + .ARM.extab : ALIGN(4) + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > MFlash256 + + __exidx_start = .; + + .ARM.exidx : ALIGN(4) + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > MFlash256 + __exidx_end = .; + + _etext = .; + + /* possible MTB section for Ram1_2 */ + .mtb_buffer_RAM2 (NOLOAD) : + { + KEEP(*(.mtb.$RAM2*)) + KEEP(*(.mtb.$Ram1_2*)) + } > Ram1_2 + + /* DATA section for Ram1_2 */ + + .data_RAM2 : ALIGN(4) + { + FILL(0xff) + PROVIDE(__start_data_RAM2 = .) ; + *(.ramfunc.$RAM2) + *(.ramfunc.$Ram1_2) + *(.data.$RAM2*) + *(.data.$Ram1_2*) + . = ALIGN(4) ; + PROVIDE(__end_data_RAM2 = .) ; + } > Ram1_2 AT>MFlash256 + /* possible MTB section for Ram2USB_2 */ + .mtb_buffer_RAM3 (NOLOAD) : + { + KEEP(*(.mtb.$RAM3*)) + KEEP(*(.mtb.$Ram2USB_2*)) + } > Ram2USB_2 + + /* DATA section for Ram2USB_2 */ + + .data_RAM3 : ALIGN(4) + { + FILL(0xff) + PROVIDE(__start_data_RAM3 = .) ; + *(.ramfunc.$RAM3) + *(.ramfunc.$Ram2USB_2) + *(.data.$RAM3*) + *(.data.$Ram2USB_2*) + . = ALIGN(4) ; + PROVIDE(__end_data_RAM3 = .) ; + } > Ram2USB_2 AT>MFlash256 + /* MAIN DATA SECTION */ + /* Default MTB section */ + .mtb_buffer_default (NOLOAD) : + { + KEEP(*(.mtb*)) + } > Ram0_32 + .uninit_RESERVED : ALIGN(4) + { + KEEP(*(.bss.$RESERVED*)) + . = ALIGN(4) ; + _end_uninit_RESERVED = .; + } > Ram0_32 + + /* Main DATA section (Ram0_32) */ + .data : ALIGN(4) + { + FILL(0xff) + _data = . ; + *(vtable) + *(.ramfunc*) + *(.data*) + . = ALIGN(4) ; + _edata = . ; + } > Ram0_32 AT>MFlash256 + + /* BSS section for Ram1_2 */ + .bss_RAM2 : ALIGN(4) + { + PROVIDE(__start_bss_RAM2 = .) ; + *(.bss.$RAM2*) + *(.bss.$Ram1_2*) + . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ + PROVIDE(__end_bss_RAM2 = .) ; + } > Ram1_2 + + /* BSS section for Ram2USB_2 */ + .bss_RAM3 : ALIGN(4) + { + PROVIDE(__start_bss_RAM3 = .) ; + *(.bss.$RAM3*) + *(.bss.$Ram2USB_2*) + . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ + PROVIDE(__end_bss_RAM3 = .) ; + } > Ram2USB_2 + + /* MAIN BSS SECTION */ + .bss : ALIGN(4) + { + _bss = .; + *(.bss*) + *(COMMON) + . = ALIGN(4) ; + _ebss = .; + PROVIDE(end = .); + } > Ram0_32 + + /* NOINIT section for Ram1_2 */ + .noinit_RAM2 (NOLOAD) : ALIGN(4) + { + *(.noinit.$RAM2*) + *(.noinit.$Ram1_2*) + . = ALIGN(4) ; + } > Ram1_2 + + /* NOINIT section for Ram2USB_2 */ + .noinit_RAM3 (NOLOAD) : ALIGN(4) + { + *(.noinit.$RAM3*) + *(.noinit.$Ram2USB_2*) + . = ALIGN(4) ; + } > Ram2USB_2 + + /* DEFAULT NOINIT SECTION */ + .noinit (NOLOAD): ALIGN(4) + { + _noinit = .; + *(.noinit*) + . = ALIGN(4) ; + _end_noinit = .; + } > Ram0_32 + PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .); + PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_32 - 0); + + /* ## Create checksum value (used in startup) ## */ + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) + + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) + ) + ); + + /* Provide basic symbols giving location and size of main text + * block, including initial values of RW data sections. Note that + * these will need extending to give a complete picture with + * complex images (e.g multiple Flash banks). + */ + _image_start = LOADADDR(.text); + _image_end = LOADADDR(.data) + SIZEOF(.data); + _image_size = _image_end - _image_start; +} diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c b/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c new file mode 100644 index 000000000..44d091511 --- /dev/null +++ b/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c @@ -0,0 +1,135 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "chip.h" +#include "bsp/board.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB_IRQHandler(void) +{ + tud_int_handler(0); +} + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM +//--------------------------------------------------------------------+ +#define LED_PORT 2 +#define LED_PIN 17 +#define LED_STATE_ON 0 + +// Wake up Switch +#define BUTTON_PORT 0 +#define BUTTON_PIN 16 +#define BUTTON_STATE_ACTIVE 0 + +/* System oscillator rate and RTC oscillator rate */ +const uint32_t OscRateIn = 12000000; +const uint32_t RTCOscRateIn = 32768; + +/* Pin muxing table, only items that need changing from their default pin + state are in this table. Not every pin is mapped. */ +static const PINMUX_GRP_T pinmuxing[] = +{ + {0, 3, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // USB VBUS + {0, 18, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 RX + {0, 19, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 TX + {2, 0, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // XTALIN + {2, 1, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // XTALOUT +}; + +// Invoked by startup code +void SystemInit(void) +{ + /* Enable IOCON clock */ + Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON); + Chip_IOCON_SetPinMuxing(LPC_IOCON, pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); + Chip_SetupXtalClocking(); +} + +void board_init(void) +{ + SystemCoreClockUpdate(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + Chip_GPIO_Init(LPC_GPIO); + + // LED + Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN); + + // Button + Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); + + // USB: Setup PLL clock, and power + Chip_USB_Init(); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ + (void) buf; (void) len; + return 0; +} + +int board_uart_write(void const * buf, int len) +{ + (void) buf; (void) len; + return 0; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/lpc11/family.mk b/hw/bsp/lpc11/family.mk new file mode 100644 index 000000000..eb427c09d --- /dev/null +++ b/hw/bsp/lpc11/family.mk @@ -0,0 +1,43 @@ +DEPS_SUBMODULES += hw/mcu/nxp/lpcopen + +MCU_DIR = hw/mcu/nxp/lpcopen/lpc$(MCU)/lpc_chip_$(MCU) +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m0plus \ + -nostdlib \ + -D__USE_LPCOPEN \ + -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \ + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + +SRC_C += \ + src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ + $(MCU_DIR)/../gcc/cr_startup_lpc$(MCU_DRV).c \ + $(MCU_DIR)/src/chip_$(MCU_DRV).c \ + $(MCU_DIR)/src/clock_$(MCU_DRV).c \ + $(MCU_DIR)/src/iocon_$(MCU_DRV).c \ + $(MCU_DIR)/src/sysinit_$(MCU_DRV).c + +ifeq ($(MCU),11u6x) +SRC_C += \ + $(MCU_DIR)/src/gpio_$(MCU_DRV).c \ + $(MCU_DIR)/src/syscon_$(MCU_DRV).c \ + +else + +SRC_C += \ + $(MCU_DIR)/src/gpio_$(MCU_DRV)_1.c \ + $(MCU_DIR)/src/sysctl_$(MCU_DRV).c +endif + +INC += \ + $(TOP)/$(MCU_DIR)/inc + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = LPC11U68 diff --git a/hw/bsp/lpcxpresso11u37/board.mk b/hw/bsp/lpcxpresso11u37/board.mk deleted file mode 100644 index 61e5eda7e..000000000 --- a/hw/bsp/lpcxpresso11u37/board.mk +++ /dev/null @@ -1,46 +0,0 @@ -DEPS_SUBMODULES += hw/mcu/nxp/lpcopen - -CFLAGS += \ - -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0 \ - -nostdlib \ - -DCORE_M0 \ - -D__USE_LPCOPEN \ - -DCFG_EXAMPLE_MSC_READONLY \ - -DCFG_EXAMPLE_VIDEO_READONLY \ - -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \ - -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \ - -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' - -# mcu driver cause following warnings -CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=redundant-decls - -MCU_DIR = hw/mcu/nxp/lpcopen/lpc11uxx/lpc_chip_11uxx - -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/lpc11u37.ld - -SRC_C += \ - src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ - $(MCU_DIR)/../gcc/cr_startup_lpc11xx.c \ - $(MCU_DIR)/src/chip_11xx.c \ - $(MCU_DIR)/src/clock_11xx.c \ - $(MCU_DIR)/src/gpio_11xx_1.c \ - $(MCU_DIR)/src/iocon_11xx.c \ - $(MCU_DIR)/src/sysctl_11xx.c \ - $(MCU_DIR)/src/sysinit_11xx.c - -INC += \ - $(TOP)/$(MCU_DIR)/inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = LPC11U37/401 - -# flash using pyocd -flash: $(BUILD)/$(PROJECT).hex - pyocd flash -t lpc11u37 $< diff --git a/hw/bsp/lpcxpresso11u37/lpc11u37.ld b/hw/bsp/lpcxpresso11u37/lpc11u37.ld deleted file mode 100644 index 8e0a4e4c6..000000000 --- a/hw/bsp/lpcxpresso11u37/lpc11u37.ld +++ /dev/null @@ -1,195 +0,0 @@ -/* - * GENERATED FILE - DO NOT EDIT - * Copyright (c) 2008-2013 Code Red Technologies Ltd, - * Copyright 2015, 2018-2019 NXP - * (c) NXP Semiconductors 2013-2019 - * Generated linker script file for LPC11U37/401 - * Created from linkscript.ldt by FMCreateLinkLibraries - * Using Freemarker v2.3.23 - * MCUXpresso IDE v11.0.0 [Build 2516] [2019-06-05] on Sep 6, 2019 12:16:06 PM - */ - -MEMORY -{ - /* Define each memory region */ - MFlash128 (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes (alias Flash) */ - RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */ - RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ -} - - /* Define a symbol for the top of each memory region */ - __base_MFlash128 = 0x0 ; /* MFlash128 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash128 = 0x0 + 0x20000 ; /* 128K bytes */ - __top_Flash = 0x0 + 0x20000 ; /* 128K bytes */ - __base_RamLoc8 = 0x10000000 ; /* RamLoc8 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */ - __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */ - __base_RamUsb2 = 0x20004000 ; /* RamUsb2 */ - __base_RAM2 = 0x20004000 ; /* RAM2 */ - __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */ - __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */ - - -ENTRY(ResetISR) - -SECTIONS -{ - /* MAIN TEXT SECTION */ - .text : ALIGN(4) - { - FILL(0xff) - __vectors_start__ = ABSOLUTE(.) ; - KEEP(*(.isr_vector)) - /* Global Section Table */ - . = ALIGN(4) ; - __section_table_start = .; - __data_section_table = .; - LONG(LOADADDR(.data)); - LONG( ADDR(.data)); - LONG( SIZEOF(.data)); - LONG(LOADADDR(.data_RAM2)); - LONG( ADDR(.data_RAM2)); - LONG( SIZEOF(.data_RAM2)); - __data_section_table_end = .; - __bss_section_table = .; - LONG( ADDR(.bss)); - LONG( SIZEOF(.bss)); - LONG( ADDR(.bss_RAM2)); - LONG( SIZEOF(.bss_RAM2)); - __bss_section_table_end = .; - __section_table_end = . ; - /* End of Global Section Table */ - - *(.after_vectors*) - - } > MFlash128 - - .text : ALIGN(4) - { - *(.text*) - *(.rodata .rodata.* .constdata .constdata.*) - . = ALIGN(4); - } > MFlash128 - /* - * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. - */ - .ARM.extab : ALIGN(4) - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > MFlash128 - - __exidx_start = .; - - .ARM.exidx : ALIGN(4) - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > MFlash128 - __exidx_end = .; - - _etext = .; - - /* DATA section for RamUsb2 */ - - .data_RAM2 : ALIGN(4) - { - FILL(0xff) - PROVIDE(__start_data_RAM2 = .) ; - *(.ramfunc.$RAM2) - *(.ramfunc.$RamUsb2) - *(.data.$RAM2) - *(.data.$RamUsb2) - *(.data.$RAM2.*) - *(.data.$RamUsb2.*) - . = ALIGN(4) ; - PROVIDE(__end_data_RAM2 = .) ; - } > RamUsb2 AT>MFlash128 - /* MAIN DATA SECTION */ - .uninit_RESERVED (NOLOAD) : - { - . = ALIGN(4) ; - KEEP(*(.bss.$RESERVED*)) - . = ALIGN(4) ; - _end_uninit_RESERVED = .; - } > RamLoc8 - - /* Main DATA section (RamLoc8) */ - .data : ALIGN(4) - { - FILL(0xff) - _data = . ; - *(vtable) - *(.ramfunc*) - *(.data*) - . = ALIGN(4) ; - _edata = . ; - } > RamLoc8 AT>MFlash128 - - /* BSS section for RamUsb2 */ - .bss_RAM2 : - { - . = ALIGN(4) ; - PROVIDE(__start_bss_RAM2 = .) ; - *(.bss.$RAM2) - *(.bss.$RamUsb2) - *(.bss.$RAM2.*) - *(.bss.$RamUsb2.*) - . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ - PROVIDE(__end_bss_RAM2 = .) ; - } > RamUsb2 - - /* MAIN BSS SECTION */ - .bss : - { - . = ALIGN(4) ; - _bss = .; - *(.bss*) - *(COMMON) - . = ALIGN(4) ; - _ebss = .; - PROVIDE(end = .); - } > RamLoc8 - - /* NOINIT section for RamUsb2 */ - .noinit_RAM2 (NOLOAD) : - { - . = ALIGN(4) ; - *(.noinit.$RAM2) - *(.noinit.$RamUsb2) - *(.noinit.$RAM2.*) - *(.noinit.$RamUsb2.*) - . = ALIGN(4) ; - } > RamUsb2 - - /* DEFAULT NOINIT SECTION */ - .noinit (NOLOAD): - { - . = ALIGN(4) ; - _noinit = .; - *(.noinit*) - . = ALIGN(4) ; - _end_noinit = .; - } > RamLoc8 - PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .); - PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc8 - 0); - - /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) - + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) - ) - ); - - /* Provide basic symbols giving location and size of main text - * block, including initial values of RW data sections. Note that - * these will need extending to give a complete picture with - * complex images (e.g multiple Flash banks). - */ - _image_start = LOADADDR(.text); - _image_end = LOADADDR(.data) + SIZEOF(.data); - _image_size = _image_end - _image_start; -} diff --git a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c b/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c deleted file mode 100644 index 79cd685c3..000000000 --- a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c +++ /dev/null @@ -1,208 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "chip.h" -#include "../board.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB_IRQHandler(void) -{ - tud_int_handler(0); -} - -//---------------------------------------------------------------- ----+ -// MACRO TYPEDEF CONSTANT ENUM -//--------------------------------------------------------------------+ -#define LED_PORT 1 -#define LED_PIN 24 -#define LED_STATE_ON 0 - -// Wake up Switch -#define BUTTON_PORT 0 -#define BUTTON_PIN 16 -#define BUTTON_STATE_ACTIVE 0 - -/* System oscillator rate and RTC oscillator rate */ -const uint32_t OscRateIn = 12000000; -const uint32_t ExtRateIn = 0; - -/* Pin muxing table, only items that need changing from their default pin - state are in this table. Not every pin is mapped. */ -/* IOCON pin definitions for pin muxing */ -typedef struct { - uint32_t port : 8; /* Pin port */ - uint32_t pin : 8; /* Pin number */ - uint32_t modefunc : 16; /* Function and mode */ -} PINMUX_GRP_T; - -static const PINMUX_GRP_T pinmuxing[] = -{ - {0, 3, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // USB VBUS - {0, 6, (IOCON_FUNC1 | IOCON_MODE_INACT)}, /* PIO0_6 used for USB_CONNECT */ - - {0, 18, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 RX - {0, 19, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 TX -}; - -/* Setup system clocking */ -static void SystemSetupClocking(void) -{ - volatile int i; - - /* Powerup main oscillator */ - Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSOSC_PD); - - /* Wait 200us for OSC to be stablized, no status - indication, dummy wait. */ - for (i = 0; i < 0x100; i++) {} - - /* Set system PLL input to main oscillator */ - Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); - - /* Power down PLL to change the PLL divider ratio */ - Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD); - - /* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 4 = 48MHz - MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) - FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz - FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ - Chip_Clock_SetupSystemPLL(3, 1); - - /* Powerup system PLL */ - Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD); - - /* Wait for PLL to lock */ - while (!Chip_Clock_IsSystemPLLLocked()) {} - - /* Set system clock divider to 1 */ - Chip_Clock_SetSysClockDiv(1); - - /* Setup FLASH access to 3 clocks */ - Chip_FMC_SetFLASHAccess(FLASHTIM_50MHZ_CPU); - - /* Set main clock source to the system PLL. This will drive 48MHz - for the main clock and 48MHz for the system clock */ - Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT); - - /* Set USB PLL input to main oscillator */ - Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); - /* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz - MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) - FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz - FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ - Chip_Clock_SetupUSBPLL(3, 1); - - /* Powerup USB PLL */ - Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD); - - /* Wait for PLL to lock */ - while (!Chip_Clock_IsUSBPLLLocked()) {} -} - -// Invoked by startup code -void SystemInit(void) -{ - SystemSetupClocking(); - Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_RAM1); - - /* Enable IOCON clock */ - Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON); - for (uint32_t i = 0; i < (sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); i++) - { - Chip_IOCON_PinMuxSet(LPC_IOCON, pinmuxing[i].port, pinmuxing[i].pin, pinmuxing[i].modefunc); - } -} - -void board_init(void) -{ - SystemCoreClockUpdate(); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - Chip_GPIO_Init(LPC_GPIO); - - // LED - Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN); - - // Button - Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); - - // USB: Setup PLL clock, and power - /* enable USB main clock */ - Chip_Clock_SetUSBClockSource(SYSCTL_USBCLKSRC_PLLOUT, 1); - /* Enable AHB clock to the USB block and USB RAM. */ - Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USB); - Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USBRAM); - /* power UP USB Phy */ - Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPAD_PD); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ - return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); -} - -int board_uart_read(uint8_t* buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -int board_uart_write(void const * buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler (void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/hw/bsp/lpcxpresso11u68/board.mk b/hw/bsp/lpcxpresso11u68/board.mk deleted file mode 100644 index cd6ad3617..000000000 --- a/hw/bsp/lpcxpresso11u68/board.mk +++ /dev/null @@ -1,42 +0,0 @@ -DEPS_SUBMODULES += hw/mcu/nxp/lpcopen - -CFLAGS += \ - -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -nostdlib \ - -DCORE_M0PLUS \ - -D__VTOR_PRESENT=0 \ - -D__USE_LPCOPEN \ - -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \ - -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ - -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' - -MCU_DIR = hw/mcu/nxp/lpcopen/lpc11u6x/lpc_chip_11u6x - -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/lpc11u68.ld - -SRC_C += \ - src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \ - $(MCU_DIR)/../gcc/cr_startup_lpc11u6x.c \ - $(MCU_DIR)/src/chip_11u6x.c \ - $(MCU_DIR)/src/clock_11u6x.c \ - $(MCU_DIR)/src/gpio_11u6x.c \ - $(MCU_DIR)/src/iocon_11u6x.c \ - $(MCU_DIR)/src/syscon_11u6x.c \ - $(MCU_DIR)/src/sysinit_11u6x.c - -INC += \ - $(TOP)/$(MCU_DIR)/inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = LPC11U68 - -# flash using pyocd -flash: $(BUILD)/$(PROJECT).hex - pyocd flash -t lpc11u68 $< diff --git a/hw/bsp/lpcxpresso11u68/lpc11u68.ld b/hw/bsp/lpcxpresso11u68/lpc11u68.ld deleted file mode 100644 index 4a35b192e..000000000 --- a/hw/bsp/lpcxpresso11u68/lpc11u68.ld +++ /dev/null @@ -1,242 +0,0 @@ -/* - * GENERATED FILE - DO NOT EDIT - * (c) Code Red Technologies Ltd, 2008-2013 - * (c) NXP Semiconductors 2013-2019 - * Generated linker script file for LPC11U68 - * Created from linkscript.ldt by FMCreateLinkLibraries - * Using Freemarker v2.3.23 - * MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 14, 2019 4:55:54 PM - */ - -MEMORY -{ - /* Define each memory region */ - MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */ - Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ - Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */ -} - - /* Define a symbol for the top of each memory region */ - __base_MFlash256 = 0x0 ; /* MFlash256 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */ - __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */ - __base_Ram0_32 = 0x10000000 ; /* Ram0_32 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_Ram0_32 = 0x10000000 + 0x8000 ; /* 32K bytes */ - __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ - __base_Ram1_2 = 0x20000000 ; /* Ram1_2 */ - __base_RAM2 = 0x20000000 ; /* RAM2 */ - __top_Ram1_2 = 0x20000000 + 0x800 ; /* 2K bytes */ - __top_RAM2 = 0x20000000 + 0x800 ; /* 2K bytes */ - __base_Ram2USB_2 = 0x20004000 ; /* Ram2USB_2 */ - __base_RAM3 = 0x20004000 ; /* RAM3 */ - __top_Ram2USB_2 = 0x20004000 + 0x800 ; /* 2K bytes */ - __top_RAM3 = 0x20004000 + 0x800 ; /* 2K bytes */ - -ENTRY(ResetISR) - -SECTIONS -{ - /* MAIN TEXT SECTION */ - .text : ALIGN(4) - { - FILL(0xff) - __vectors_start__ = ABSOLUTE(.) ; - KEEP(*(.isr_vector)) - /* Global Section Table */ - . = ALIGN(4) ; - __section_table_start = .; - __data_section_table = .; - LONG(LOADADDR(.data)); - LONG( ADDR(.data)); - LONG( SIZEOF(.data)); - LONG(LOADADDR(.data_RAM2)); - LONG( ADDR(.data_RAM2)); - LONG( SIZEOF(.data_RAM2)); - LONG(LOADADDR(.data_RAM3)); - LONG( ADDR(.data_RAM3)); - LONG( SIZEOF(.data_RAM3)); - __data_section_table_end = .; - __bss_section_table = .; - LONG( ADDR(.bss)); - LONG( SIZEOF(.bss)); - LONG( ADDR(.bss_RAM2)); - LONG( SIZEOF(.bss_RAM2)); - LONG( ADDR(.bss_RAM3)); - LONG( SIZEOF(.bss_RAM3)); - __bss_section_table_end = .; - __section_table_end = . ; - /* End of Global Section Table */ - - *(.after_vectors*) - - } > MFlash256 - - .text : ALIGN(4) - { - *(.text*) - *(.rodata .rodata.* .constdata .constdata.*) - . = ALIGN(4); - } > MFlash256 - /* - * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. - */ - .ARM.extab : ALIGN(4) - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > MFlash256 - - __exidx_start = .; - - .ARM.exidx : ALIGN(4) - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > MFlash256 - __exidx_end = .; - - _etext = .; - - /* possible MTB section for Ram1_2 */ - .mtb_buffer_RAM2 (NOLOAD) : - { - KEEP(*(.mtb.$RAM2*)) - KEEP(*(.mtb.$Ram1_2*)) - } > Ram1_2 - - /* DATA section for Ram1_2 */ - - .data_RAM2 : ALIGN(4) - { - FILL(0xff) - PROVIDE(__start_data_RAM2 = .) ; - *(.ramfunc.$RAM2) - *(.ramfunc.$Ram1_2) - *(.data.$RAM2*) - *(.data.$Ram1_2*) - . = ALIGN(4) ; - PROVIDE(__end_data_RAM2 = .) ; - } > Ram1_2 AT>MFlash256 - /* possible MTB section for Ram2USB_2 */ - .mtb_buffer_RAM3 (NOLOAD) : - { - KEEP(*(.mtb.$RAM3*)) - KEEP(*(.mtb.$Ram2USB_2*)) - } > Ram2USB_2 - - /* DATA section for Ram2USB_2 */ - - .data_RAM3 : ALIGN(4) - { - FILL(0xff) - PROVIDE(__start_data_RAM3 = .) ; - *(.ramfunc.$RAM3) - *(.ramfunc.$Ram2USB_2) - *(.data.$RAM3*) - *(.data.$Ram2USB_2*) - . = ALIGN(4) ; - PROVIDE(__end_data_RAM3 = .) ; - } > Ram2USB_2 AT>MFlash256 - /* MAIN DATA SECTION */ - /* Default MTB section */ - .mtb_buffer_default (NOLOAD) : - { - KEEP(*(.mtb*)) - } > Ram0_32 - .uninit_RESERVED : ALIGN(4) - { - KEEP(*(.bss.$RESERVED*)) - . = ALIGN(4) ; - _end_uninit_RESERVED = .; - } > Ram0_32 - - /* Main DATA section (Ram0_32) */ - .data : ALIGN(4) - { - FILL(0xff) - _data = . ; - *(vtable) - *(.ramfunc*) - *(.data*) - . = ALIGN(4) ; - _edata = . ; - } > Ram0_32 AT>MFlash256 - - /* BSS section for Ram1_2 */ - .bss_RAM2 : ALIGN(4) - { - PROVIDE(__start_bss_RAM2 = .) ; - *(.bss.$RAM2*) - *(.bss.$Ram1_2*) - . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ - PROVIDE(__end_bss_RAM2 = .) ; - } > Ram1_2 - - /* BSS section for Ram2USB_2 */ - .bss_RAM3 : ALIGN(4) - { - PROVIDE(__start_bss_RAM3 = .) ; - *(.bss.$RAM3*) - *(.bss.$Ram2USB_2*) - . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ - PROVIDE(__end_bss_RAM3 = .) ; - } > Ram2USB_2 - - /* MAIN BSS SECTION */ - .bss : ALIGN(4) - { - _bss = .; - *(.bss*) - *(COMMON) - . = ALIGN(4) ; - _ebss = .; - PROVIDE(end = .); - } > Ram0_32 - - /* NOINIT section for Ram1_2 */ - .noinit_RAM2 (NOLOAD) : ALIGN(4) - { - *(.noinit.$RAM2*) - *(.noinit.$Ram1_2*) - . = ALIGN(4) ; - } > Ram1_2 - - /* NOINIT section for Ram2USB_2 */ - .noinit_RAM3 (NOLOAD) : ALIGN(4) - { - *(.noinit.$RAM3*) - *(.noinit.$Ram2USB_2*) - . = ALIGN(4) ; - } > Ram2USB_2 - - /* DEFAULT NOINIT SECTION */ - .noinit (NOLOAD): ALIGN(4) - { - _noinit = .; - *(.noinit*) - . = ALIGN(4) ; - _end_noinit = .; - } > Ram0_32 - PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .); - PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_32 - 0); - - /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) - + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) - ) - ); - - /* Provide basic symbols giving location and size of main text - * block, including initial values of RW data sections. Note that - * these will need extending to give a complete picture with - * complex images (e.g multiple Flash banks). - */ - _image_start = LOADADDR(.text); - _image_end = LOADADDR(.data) + SIZEOF(.data); - _image_size = _image_end - _image_start; -} diff --git a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c b/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c deleted file mode 100644 index a04e43867..000000000 --- a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "chip.h" -#include "../board.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB_IRQHandler(void) -{ - tud_int_handler(0); -} - -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM -//--------------------------------------------------------------------+ -#define LED_PORT 2 -#define LED_PIN 17 -#define LED_STATE_ON 0 - -// Wake up Switch -#define BUTTON_PORT 0 -#define BUTTON_PIN 16 -#define BUTTON_STATE_ACTIVE 0 - -/* System oscillator rate and RTC oscillator rate */ -const uint32_t OscRateIn = 12000000; -const uint32_t RTCOscRateIn = 32768; - -/* Pin muxing table, only items that need changing from their default pin - state are in this table. Not every pin is mapped. */ -static const PINMUX_GRP_T pinmuxing[] = -{ - {0, 3, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // USB VBUS - {0, 18, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 RX - {0, 19, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 TX - {2, 0, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // XTALIN - {2, 1, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // XTALOUT -}; - -// Invoked by startup code -void SystemInit(void) -{ - /* Enable IOCON clock */ - Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON); - Chip_IOCON_SetPinMuxing(LPC_IOCON, pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); - Chip_SetupXtalClocking(); -} - -void board_init(void) -{ - SystemCoreClockUpdate(); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - Chip_GPIO_Init(LPC_GPIO); - - // LED - Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN); - - // Button - Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); - - // USB: Setup PLL clock, and power - Chip_USB_Init(); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ - return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); -} - -int board_uart_read(uint8_t* buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -int board_uart_write(void const * buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler (void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif -- cgit v1.3.1